diff options
| author | Lewis Gaul <lewis.gaul@gmail.com> | 2021-07-18 23:26:02 +0100 |
|---|---|---|
| committer | Andrew Kelley <andrew@ziglang.org> | 2021-07-20 12:19:16 -0700 |
| commit | bf8e347b1b99ab711036c76df44a4eed2f6677d5 (patch) | |
| tree | cb8a57abf019d50c6c56500360646e94dca1a020 /src/codegen.zig | |
| parent | 7381431e68eba09f76ddc41cff8931d3e4f1a798 (diff) | |
| download | zig-bf8e347b1b99ab711036c76df44a4eed2f6677d5.tar.gz zig-bf8e347b1b99ab711036c76df44a4eed2f6677d5.zip | |
Get codegen.zig to compile - use '{d}' format for Air.Inst.Index values
Diffstat (limited to 'src/codegen.zig')
| -rw-r--r-- | src/codegen.zig | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/codegen.zig b/src/codegen.zig index 20d7035822..fa096bc13f 100644 --- a/src/codegen.zig +++ b/src/codegen.zig @@ -1048,7 +1048,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { pub fn spillInstruction(self: *Self, reg: Register, inst: Air.Inst.Index) !void { const stack_mcv = try self.allocRegOrMem(inst, false); - log.debug("spilling {*} to stack mcv {any}", .{ inst, stack_mcv }); + log.debug("spilling {d} to stack mcv {any}", .{ inst, stack_mcv }); const reg_mcv = self.getResolvedInstValue(inst); assert(reg == toCanonicalReg(reg_mcv.register)); const branch = &self.branch_stack.items[self.branch_stack.items.len - 1]; @@ -3115,7 +3115,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { } } }; - log.debug("consolidating else_entry {*} {}=>{}", .{ else_key, else_value, canon_mcv }); + log.debug("consolidating else_entry {d} {}=>{}", .{ else_key, else_value, canon_mcv }); // TODO make sure the destination stack offset / register does not already have something // going on there. try self.setRegOrMem(self.air.typeOfIndex(else_key), canon_mcv, else_value); @@ -3142,7 +3142,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { } } }; - log.debug("consolidating then_entry {*} {}=>{}", .{ then_key, parent_mcv, then_value }); + log.debug("consolidating then_entry {d} {}=>{}", .{ then_key, parent_mcv, then_value }); // TODO make sure the destination stack offset / register does not already have something // going on there. try self.setRegOrMem(self.air.typeOfIndex(then_key), parent_mcv, then_value); |