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| author | Andrew Kelley <andrew@ziglang.org> | 2021-04-08 00:01:46 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-04-08 00:01:46 -0700 |
| commit | ab5a445d252ba090d25ae0c49a9b0820ffbb73d3 (patch) | |
| tree | 86bc779596dd3080be2a66413f23140b4c708089 /src/codegen.zig | |
| parent | 2d2316f5c0087a610127883f0593e8e9c0e939b7 (diff) | |
| parent | 4ff5a3cd94b0532f2cd713082948b00a8a36336f (diff) | |
| download | zig-ab5a445d252ba090d25ae0c49a9b0820ffbb73d3.tar.gz zig-ab5a445d252ba090d25ae0c49a9b0820ffbb73d3.zip | |
Merge pull request #8459 from joachimschmidt557/stage2-regalloc
Stage2 Register Manager: add getReg function
Diffstat (limited to 'src/codegen.zig')
| -rw-r--r-- | src/codegen.zig | 39 |
1 files changed, 26 insertions, 13 deletions
diff --git a/src/codegen.zig b/src/codegen.zig index fbd412ceba..220a8fa374 100644 --- a/src/codegen.zig +++ b/src/codegen.zig @@ -1735,7 +1735,8 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { switch (result) { .register => |reg| { - try self.register_manager.getRegAssumeFree(toCanonicalReg(reg), &inst.base); + try self.register_manager.registers.ensureCapacity(self.gpa, self.register_manager.registers.count() + 1); + self.register_manager.getRegAssumeFree(toCanonicalReg(reg), &inst.base); }, else => {}, } @@ -1783,8 +1784,8 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { switch (mc_arg) { .none => continue, .register => |reg| { + try self.register_manager.getRegWithoutTracking(reg); try self.genSetReg(arg.src, arg.ty, reg, arg_mcv); - // TODO interact with the register allocator to mark the instruction as moved. }, .stack_offset => { // Here we need to emit instructions like this: @@ -1925,8 +1926,8 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { .compare_flags_signed => unreachable, .compare_flags_unsigned => unreachable, .register => |reg| { + try self.register_manager.getRegWithoutTracking(reg); try self.genSetReg(arg.src, arg.ty, reg, arg_mcv); - // TODO interact with the register allocator to mark the instruction as moved. }, .stack_offset => { return self.fail(inst.base.src, "TODO implement calling with parameters in memory", .{}); @@ -1988,8 +1989,8 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { .compare_flags_signed => unreachable, .compare_flags_unsigned => unreachable, .register => |reg| { + try self.register_manager.getRegWithoutTracking(reg); try self.genSetReg(arg.src, arg.ty, reg, arg_mcv); - // TODO interact with the register allocator to mark the instruction as moved. }, .stack_offset => { return self.fail(inst.base.src, "TODO implement calling with parameters in memory", .{}); @@ -2039,8 +2040,8 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { switch (mc_arg) { .none => continue, .register => |reg| { + try self.register_manager.getRegWithoutTracking(reg); try self.genSetReg(arg.src, arg.ty, reg, arg_mcv); - // TODO interact with the register allocator to mark the instruction as moved. }, .stack_offset => { // Here we need to emit instructions like this: @@ -2704,8 +2705,11 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { const reg_name = input[1 .. input.len - 1]; const reg = parseRegName(reg_name) orelse return self.fail(inst.base.src, "unrecognized register: '{s}'", .{reg_name}); - const arg = try self.resolveInst(inst.args[i]); - try self.genSetReg(inst.base.src, inst.args[i].ty, reg, arg); + + const arg = inst.args[i]; + const arg_mcv = try self.resolveInst(arg); + try self.register_manager.getRegWithoutTracking(reg); + try self.genSetReg(inst.base.src, arg.ty, reg, arg_mcv); } if (mem.eql(u8, inst.asm_source, "svc #0")) { @@ -2734,8 +2738,11 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { const reg_name = input[1 .. input.len - 1]; const reg = parseRegName(reg_name) orelse return self.fail(inst.base.src, "unrecognized register: '{s}'", .{reg_name}); - const arg = try self.resolveInst(inst.args[i]); - try self.genSetReg(inst.base.src, inst.args[i].ty, reg, arg); + + const arg = inst.args[i]; + const arg_mcv = try self.resolveInst(arg); + try self.register_manager.getRegWithoutTracking(reg); + try self.genSetReg(inst.base.src, arg.ty, reg, arg_mcv); } if (mem.eql(u8, inst.asm_source, "svc #0")) { @@ -2766,8 +2773,11 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { const reg_name = input[1 .. input.len - 1]; const reg = parseRegName(reg_name) orelse return self.fail(inst.base.src, "unrecognized register: '{s}'", .{reg_name}); - const arg = try self.resolveInst(inst.args[i]); - try self.genSetReg(inst.base.src, inst.args[i].ty, reg, arg); + + const arg = inst.args[i]; + const arg_mcv = try self.resolveInst(arg); + try self.register_manager.getRegWithoutTracking(reg); + try self.genSetReg(inst.base.src, arg.ty, reg, arg_mcv); } if (mem.eql(u8, inst.asm_source, "ecall")) { @@ -2796,8 +2806,11 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { const reg_name = input[1 .. input.len - 1]; const reg = parseRegName(reg_name) orelse return self.fail(inst.base.src, "unrecognized register: '{s}'", .{reg_name}); - const arg = try self.resolveInst(inst.args[i]); - try self.genSetReg(inst.base.src, inst.args[i].ty, reg, arg); + + const arg = inst.args[i]; + const arg_mcv = try self.resolveInst(arg); + try self.register_manager.getRegWithoutTracking(reg); + try self.genSetReg(inst.base.src, arg.ty, reg, arg_mcv); } if (mem.eql(u8, inst.asm_source, "syscall")) { |