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authorjoachimschmidt557 <joachim.schmidt557@outlook.com>2021-06-09 14:03:14 +0800
committerVeikka Tuominen <git@vexu.eu>2021-06-09 21:37:23 +0300
commit96c60bcca5fd1a76ded5eba576bfdb1def38139f (patch)
treeb92752c4dd0c19864c06c367dbac8cb64566023e /src/codegen.zig
parentf62f35e346f3ebe732974ca3a945b6da5cd12b0f (diff)
downloadzig-96c60bcca5fd1a76ded5eba576bfdb1def38139f.tar.gz
zig-96c60bcca5fd1a76ded5eba576bfdb1def38139f.zip
stage2 codegen: Remove hacks for discontinued SPU II backend
Diffstat (limited to 'src/codegen.zig')
-rw-r--r--src/codegen.zig34
1 files changed, 8 insertions, 26 deletions
diff --git a/src/codegen.zig b/src/codegen.zig
index c3895b7778..b35b8d5986 100644
--- a/src/codegen.zig
+++ b/src/codegen.zig
@@ -781,12 +781,8 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
branch.inst_table.putAssumeCapacity(inst, .dead);
switch (prev_value) {
.register => |reg| {
- // TODO separate architectures with registers from
- // stack-based architectures (spu_2)
- if (callee_preserved_regs.len > 0) {
- const canon_reg = toCanonicalReg(reg);
- self.register_manager.freeReg(canon_reg);
- }
+ const canon_reg = toCanonicalReg(reg);
+ self.register_manager.freeReg(canon_reg);
},
else => {}, // TODO process stack allocation death
}
@@ -926,12 +922,8 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
const ptr_bits = arch.ptrBitWidth();
const ptr_bytes: u64 = @divExact(ptr_bits, 8);
if (abi_size <= ptr_bytes) {
- // TODO separate architectures with registers from
- // stack-based architectures (spu_2)
- if (callee_preserved_regs.len > 0) {
- if (self.register_manager.tryAllocReg(inst, &.{})) |reg| {
- return MCValue{ .register = registerAlias(reg, abi_size) };
- }
+ if (self.register_manager.tryAllocReg(inst, &.{})) |reg| {
+ return MCValue{ .register = registerAlias(reg, abi_size) };
}
}
}
@@ -1249,16 +1241,12 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
.register => |reg| {
// If it's in the registers table, need to associate the register with the
// new instruction.
- // TODO separate architectures with registers from
- // stack-based architectures (spu_2)
- if (callee_preserved_regs.len > 0) {
- if (reg.allocIndex()) |index| {
- if (!self.register_manager.isRegFree(reg)) {
- self.register_manager.registers[index] = inst;
- }
+ if (reg.allocIndex()) |index| {
+ if (!self.register_manager.isRegFree(reg)) {
+ self.register_manager.registers[index] = inst;
}
- log.debug("reusing {} => {*}", .{ reg, inst });
}
+ log.debug("reusing {} => {*}", .{ reg, inst });
},
.stack_offset => |off| {
log.debug("reusing stack offset {} => {*}", .{ off, inst });
@@ -2182,12 +2170,6 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
const arg_index = self.arg_index;
self.arg_index += 1;
- // TODO separate architectures with registers from
- // stack-based architectures (spu_2)
- if (callee_preserved_regs.len == 0) {
- return self.fail(inst.base.src, "TODO implement Register enum for {}", .{self.target.cpu.arch});
- }
-
const result = self.args[arg_index];
const mcv = switch (arch) {
// TODO support stack-only arguments on all target architectures