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| author | Jacob G-W <jacoblevgw@gmail.com> | 2021-08-18 22:22:12 -0400 |
|---|---|---|
| committer | Jacob G-W <jacoblevgw@gmail.com> | 2021-08-19 16:18:40 -0400 |
| commit | 2e6ce11eb29434231102c00fddd0a1b3e0ba5608 (patch) | |
| tree | e2cec62c094336d3582cb7b5d5c851dcbb04fe18 /src/codegen.zig | |
| parent | 7e7d67d8eed45bcf3908edd2f4ca864144fffad5 (diff) | |
| download | zig-2e6ce11eb29434231102c00fddd0a1b3e0ba5608.tar.gz zig-2e6ce11eb29434231102c00fddd0a1b3e0ba5608.zip | |
stage2: implement shr and boilerplate for shl
This implements it in the llvm and c backends.
x86_64 will have to be a little more work.
Diffstat (limited to 'src/codegen.zig')
| -rw-r--r-- | src/codegen.zig | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/src/codegen.zig b/src/codegen.zig index d5b106dbe3..584b2bf8f4 100644 --- a/src/codegen.zig +++ b/src/codegen.zig @@ -822,6 +822,8 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { .bit_and => try self.airBitAnd(inst), .bit_or => try self.airBitOr(inst), .xor => try self.airXor(inst), + .shr => try self.airShr(inst), + .shl => try self.airShl(inst), .alloc => try self.airAlloc(inst), .arg => try self.airArg(inst), @@ -1270,6 +1272,24 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { return self.finishAir(inst, result, .{ bin_op.lhs, bin_op.rhs, .none }); } + fn airShl(self: *Self, inst: Air.Inst.Index) !void { + const bin_op = self.air.instructions.items(.data)[inst].bin_op; + const result: MCValue = if (self.liveness.isUnused(inst)) .dead else switch (arch) { + .arm, .armeb => try self.genArmBinOp(inst, bin_op.lhs, bin_op.rhs, .shl), + else => return self.fail("TODO implement shl for {}", .{self.target.cpu.arch}), + }; + return self.finishAir(inst, result, .{ bin_op.lhs, bin_op.rhs, .none }); + } + + fn airShr(self: *Self, inst: Air.Inst.Index) !void { + const bin_op = self.air.instructions.items(.data)[inst].bin_op; + const result: MCValue = if (self.liveness.isUnused(inst)) .dead else switch (arch) { + .arm, .armeb => try self.genArmBinOp(inst, bin_op.lhs, bin_op.rhs, .shr), + else => return self.fail("TODO implement shr for {}", .{self.target.cpu.arch}), + }; + return self.finishAir(inst, result, .{ bin_op.lhs, bin_op.rhs, .none }); + } + fn airOptionalPayload(self: *Self, inst: Air.Inst.Index) !void { const ty_op = self.air.instructions.items(.data)[inst].ty_op; const result: MCValue = if (self.liveness.isUnused(inst)) .dead else switch (arch) { |
