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| author | Jakub Konka <kubkon@jakubkonka.com> | 2023-04-11 22:45:50 +0200 |
|---|---|---|
| committer | Jakub Konka <kubkon@jakubkonka.com> | 2023-04-13 11:47:51 +0200 |
| commit | 397dd77697934a808b3545c5691399d8d69b841d (patch) | |
| tree | 605c21a2f04e732e2c17ec5c0b25b663c34066b9 /src/arch | |
| parent | ee6b4fad4714d596255f034c0b000438ee6ca943 (diff) | |
| download | zig-397dd77697934a808b3545c5691399d8d69b841d.tar.gz zig-397dd77697934a808b3545c5691399d8d69b841d.zip | |
x86_64: simplify store() logic when value is in memory
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/x86_64/CodeGen.zig | 22 |
1 files changed, 20 insertions, 2 deletions
diff --git a/src/arch/x86_64/CodeGen.zig b/src/arch/x86_64/CodeGen.zig index 374029c64c..f7992969e3 100644 --- a/src/arch/x86_64/CodeGen.zig +++ b/src/arch/x86_64/CodeGen.zig @@ -3809,11 +3809,29 @@ fn store(self: *Self, ptr: MCValue, value: MCValue, ptr_ty: Type, value_ty: Type try self.store(ptr, .{ .register = tmp_reg }, ptr_ty, value_ty); } else { - const addr_reg = try self.register_manager.allocReg(null, gp); + const addr_reg = (try self.register_manager.allocReg(null, gp)).to64(); const addr_lock = self.register_manager.lockRegAssumeUnused(addr_reg); defer self.register_manager.unlockReg(addr_lock); - try self.loadMemPtrIntoRegister(addr_reg, Type.usize, value); + switch (value) { + .memory => |addr| try self.genSetReg(Type.usize, addr_reg, .{ .immediate = addr }), + .linker_load => |load_struct| { + const atom_index = if (self.bin_file.cast(link.File.MachO)) |macho_file| blk: { + const atom = try macho_file.getOrCreateAtomForDecl(self.mod_fn.owner_decl); + break :blk macho_file.getAtom(atom).getSymbolIndex().?; + } else if (self.bin_file.cast(link.File.Coff)) |coff_file| blk: { + const atom = try coff_file.getOrCreateAtomForDecl(self.mod_fn.owner_decl); + break :blk coff_file.getAtom(atom).getSymbolIndex().?; + } else unreachable; + switch (load_struct.type) { + .import => unreachable, + .got => try self.asmMovLinker(addr_reg, atom_index, load_struct), + .direct => try self.asmLeaLinker(addr_reg, atom_index, load_struct), + } + }, + else => unreachable, + } + try self.genInlineMemcpy( ptr, .{ .register = addr_reg }, |