aboutsummaryrefslogtreecommitdiff
path: root/src/arch/x86_64/CodeGen.zig
diff options
context:
space:
mode:
authorJakub Konka <kubkon@jakubkonka.com>2023-04-22 13:39:07 +0200
committerGitHub <noreply@github.com>2023-04-22 13:39:07 +0200
commitc4a63389e4eefb78c1ee2028047447094bb864dc (patch)
tree95edea0e36efa81c2a6ea8d0574feeb5ba90f25e /src/arch/x86_64/CodeGen.zig
parent68e4a5784791f733774e161b72a283b69a75b0de (diff)
parent14dfbbc21365131c7ac85f08f543058f43fca0c2 (diff)
downloadzig-c4a63389e4eefb78c1ee2028047447094bb864dc.tar.gz
zig-c4a63389e4eefb78c1ee2028047447094bb864dc.zip
Merge pull request #15371 from ziglang/better-elf
link: make GOT (and other synthetic sections) handling common across linkers
Diffstat (limited to 'src/arch/x86_64/CodeGen.zig')
-rw-r--r--src/arch/x86_64/CodeGen.zig14
1 files changed, 10 insertions, 4 deletions
diff --git a/src/arch/x86_64/CodeGen.zig b/src/arch/x86_64/CodeGen.zig
index 1c72e2296b..f237b98e75 100644
--- a/src/arch/x86_64/CodeGen.zig
+++ b/src/arch/x86_64/CodeGen.zig
@@ -5624,7 +5624,9 @@ fn airCall(self: *Self, inst: Air.Inst.Index, modifier: std.builtin.CallModifier
if (self.bin_file.cast(link.File.Elf)) |elf_file| {
const atom_index = try elf_file.getOrCreateAtomForDecl(func.owner_decl);
- const got_addr = elf_file.getAtom(atom_index).getOffsetTableAddress(elf_file);
+ const atom = elf_file.getAtom(atom_index);
+ _ = try atom.getOrCreateOffsetTableEntry(elf_file);
+ const got_addr = atom.getOffsetTableAddress(elf_file);
try self.asmMemory(.call, Memory.sib(.qword, .{
.base = .ds,
.disp = @intCast(i32, got_addr),
@@ -5853,7 +5855,9 @@ fn airCmpLtErrorsLen(self: *Self, inst: Air.Inst.Index) !void {
.{ .kind = .const_data, .ty = Type.anyerror },
4, // dword alignment
);
- const got_addr = elf_file.getAtom(atom_index).getOffsetTableAddress(elf_file);
+ const atom = elf_file.getAtom(atom_index);
+ _ = try atom.getOrCreateOffsetTableEntry(elf_file);
+ const got_addr = atom.getOffsetTableAddress(elf_file);
try self.asmRegisterMemory(.mov, addr_reg.to64(), Memory.sib(.qword, .{
.base = .ds,
.disp = @intCast(i32, got_addr),
@@ -7574,7 +7578,7 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void
const atom_index = try self.getSymbolIndexForDecl(self.mod_fn.owner_decl);
if (self.bin_file.cast(link.File.MachO)) |_| {
_ = try self.addInst(.{
- .tag = .mov_linker,
+ .tag = .lea_linker,
.ops = .tlv_reloc,
.data = .{ .payload = try self.addExtra(Mir.LeaRegisterReloc{
.reg = @enumToInt(Register.rdi),
@@ -8230,7 +8234,9 @@ fn airErrorName(self: *Self, inst: Air.Inst.Index) !void {
.{ .kind = .const_data, .ty = Type.anyerror },
4, // dword alignment
);
- const got_addr = elf_file.getAtom(atom_index).getOffsetTableAddress(elf_file);
+ const atom = elf_file.getAtom(atom_index);
+ _ = try atom.getOrCreateOffsetTableEntry(elf_file);
+ const got_addr = atom.getOffsetTableAddress(elf_file);
try self.asmRegisterMemory(.mov, addr_reg.to64(), Memory.sib(.qword, .{
.base = .ds,
.disp = @intCast(i32, got_addr),