diff options
| author | Jacob Young <jacobly0@users.noreply.github.com> | 2024-06-15 16:10:53 -0400 |
|---|---|---|
| committer | Jacob Young <jacobly0@users.noreply.github.com> | 2024-07-07 22:59:52 -0400 |
| commit | 525f341f33af9b8aad53931fd5511f00a82cb090 (patch) | |
| tree | cec3280498c1122858580946ac5e31f8feb807ce /src/arch/x86_64/CodeGen.zig | |
| parent | 8f20e81b8816aadd8ceb1b04bd3727cc1d124464 (diff) | |
| download | zig-525f341f33af9b8aad53931fd5511f00a82cb090.tar.gz zig-525f341f33af9b8aad53931fd5511f00a82cb090.zip | |
Zcu: introduce `PerThread` and pass to all the functions
Diffstat (limited to 'src/arch/x86_64/CodeGen.zig')
| -rw-r--r-- | src/arch/x86_64/CodeGen.zig | 1206 |
1 files changed, 655 insertions, 551 deletions
diff --git a/src/arch/x86_64/CodeGen.zig b/src/arch/x86_64/CodeGen.zig index 538b740042..dafeed00b8 100644 --- a/src/arch/x86_64/CodeGen.zig +++ b/src/arch/x86_64/CodeGen.zig @@ -19,7 +19,7 @@ const CodeGenError = codegen.CodeGenError; const Compilation = @import("../../Compilation.zig"); const DebugInfoOutput = codegen.DebugInfoOutput; const DW = std.dwarf; -const ErrorMsg = Module.ErrorMsg; +const ErrorMsg = Zcu.ErrorMsg; const Result = codegen.Result; const Emit = @import("Emit.zig"); const Liveness = @import("../../Liveness.zig"); @@ -27,8 +27,6 @@ const Lower = @import("Lower.zig"); const Mir = @import("Mir.zig"); const Package = @import("../../Package.zig"); const Zcu = @import("../../Zcu.zig"); -/// Deprecated. -const Module = Zcu; const InternPool = @import("../../InternPool.zig"); const Alignment = InternPool.Alignment; const Target = std.Target; @@ -52,6 +50,7 @@ const FrameIndex = bits.FrameIndex; const InnerError = CodeGenError || error{OutOfRegisters}; gpa: Allocator, +pt: Zcu.PerThread, air: Air, liveness: Liveness, bin_file: *link.File, @@ -74,7 +73,7 @@ va_info: union { ret_mcv: InstTracking, fn_type: Type, arg_index: u32, -src_loc: Module.LazySrcLoc, +src_loc: Zcu.LazySrcLoc, eflags_inst: ?Air.Inst.Index = null, @@ -120,18 +119,18 @@ const Owner = union(enum) { func_index: InternPool.Index, lazy_sym: link.File.LazySymbol, - fn getDecl(owner: Owner, mod: *Module) InternPool.DeclIndex { + fn getDecl(owner: Owner, zcu: *Zcu) InternPool.DeclIndex { return switch (owner) { - .func_index => |func_index| mod.funcOwnerDeclIndex(func_index), - .lazy_sym => |lazy_sym| lazy_sym.ty.getOwnerDecl(mod), + .func_index => |func_index| zcu.funcOwnerDeclIndex(func_index), + .lazy_sym => |lazy_sym| lazy_sym.ty.getOwnerDecl(zcu), }; } fn getSymbolIndex(owner: Owner, ctx: *Self) !u32 { + const pt = ctx.pt; switch (owner) { .func_index => |func_index| { - const mod = ctx.bin_file.comp.module.?; - const decl_index = mod.funcOwnerDeclIndex(func_index); + const decl_index = ctx.pt.zcu.funcOwnerDeclIndex(func_index); if (ctx.bin_file.cast(link.File.Elf)) |elf_file| { return elf_file.zigObjectPtr().?.getOrCreateMetadataForDecl(elf_file, decl_index); } else if (ctx.bin_file.cast(link.File.MachO)) |macho_file| { @@ -145,17 +144,17 @@ const Owner = union(enum) { }, .lazy_sym => |lazy_sym| { if (ctx.bin_file.cast(link.File.Elf)) |elf_file| { - return elf_file.zigObjectPtr().?.getOrCreateMetadataForLazySymbol(elf_file, lazy_sym) catch |err| + return elf_file.zigObjectPtr().?.getOrCreateMetadataForLazySymbol(elf_file, pt, lazy_sym) catch |err| ctx.fail("{s} creating lazy symbol", .{@errorName(err)}); } else if (ctx.bin_file.cast(link.File.MachO)) |macho_file| { - return macho_file.getZigObject().?.getOrCreateMetadataForLazySymbol(macho_file, lazy_sym) catch |err| + return macho_file.getZigObject().?.getOrCreateMetadataForLazySymbol(macho_file, pt, lazy_sym) catch |err| ctx.fail("{s} creating lazy symbol", .{@errorName(err)}); } else if (ctx.bin_file.cast(link.File.Coff)) |coff_file| { - const atom = coff_file.getOrCreateAtomForLazySymbol(lazy_sym) catch |err| + const atom = coff_file.getOrCreateAtomForLazySymbol(pt, lazy_sym) catch |err| return ctx.fail("{s} creating lazy symbol", .{@errorName(err)}); return coff_file.getAtom(atom).getSymbolIndex().?; } else if (ctx.bin_file.cast(link.File.Plan9)) |p9_file| { - return p9_file.getOrCreateAtomForLazySymbol(lazy_sym) catch |err| + return p9_file.getOrCreateAtomForLazySymbol(pt, lazy_sym) catch |err| return ctx.fail("{s} creating lazy symbol", .{@errorName(err)}); } else unreachable; }, @@ -753,14 +752,14 @@ const FrameAlloc = struct { .ref_count = 0, }; } - fn initType(ty: Type, mod: *Module) FrameAlloc { + fn initType(ty: Type, pt: Zcu.PerThread) FrameAlloc { return init(.{ - .size = ty.abiSize(mod), - .alignment = ty.abiAlignment(mod), + .size = ty.abiSize(pt), + .alignment = ty.abiAlignment(pt), }); } - fn initSpill(ty: Type, mod: *Module) FrameAlloc { - const abi_size = ty.abiSize(mod); + fn initSpill(ty: Type, pt: Zcu.PerThread) FrameAlloc { + const abi_size = ty.abiSize(pt); const spill_size = if (abi_size < 8) math.ceilPowerOfTwoAssert(u64, abi_size) else @@ -768,7 +767,7 @@ const FrameAlloc = struct { return init(.{ .size = spill_size, .pad = @intCast(spill_size - abi_size), - .alignment = ty.abiAlignment(mod).maxStrict( + .alignment = ty.abiAlignment(pt).maxStrict( Alignment.fromNonzeroByteUnits(@min(spill_size, 8)), ), }); @@ -777,7 +776,7 @@ const FrameAlloc = struct { const StackAllocation = struct { inst: ?Air.Inst.Index, - /// TODO do we need size? should be determined by inst.ty.abiSize(mod) + /// TODO do we need size? should be determined by inst.ty.abiSize(pt) size: u32, }; @@ -795,16 +794,17 @@ const Self = @This(); pub fn generate( bin_file: *link.File, - src_loc: Module.LazySrcLoc, + pt: Zcu.PerThread, + src_loc: Zcu.LazySrcLoc, func_index: InternPool.Index, air: Air, liveness: Liveness, code: *std.ArrayList(u8), debug_output: DebugInfoOutput, ) CodeGenError!Result { - const comp = bin_file.comp; - const gpa = comp.gpa; - const zcu = comp.module.?; + const zcu = pt.zcu; + const gpa = zcu.gpa; + const comp = zcu.comp; const func = zcu.funcInfo(func_index); const fn_owner_decl = zcu.declPtr(func.owner_decl); assert(fn_owner_decl.has_tv); @@ -812,8 +812,9 @@ pub fn generate( const namespace = zcu.namespacePtr(fn_owner_decl.src_namespace); const mod = namespace.fileScope(zcu).mod; - var function = Self{ + var function: Self = .{ .gpa = gpa, + .pt = pt, .air = air, .liveness = liveness, .target = &mod.resolved_target.result, @@ -882,11 +883,11 @@ pub fn generate( function.args = call_info.args; function.ret_mcv = call_info.return_value; function.frame_allocs.set(@intFromEnum(FrameIndex.ret_addr), FrameAlloc.init(.{ - .size = Type.usize.abiSize(zcu), - .alignment = Type.usize.abiAlignment(zcu).min(call_info.stack_align), + .size = Type.usize.abiSize(pt), + .alignment = Type.usize.abiAlignment(pt).min(call_info.stack_align), })); function.frame_allocs.set(@intFromEnum(FrameIndex.base_ptr), FrameAlloc.init(.{ - .size = Type.usize.abiSize(zcu), + .size = Type.usize.abiSize(pt), .alignment = Alignment.min( call_info.stack_align, Alignment.fromNonzeroByteUnits(function.target.stackAlignment()), @@ -971,7 +972,8 @@ pub fn generate( pub fn generateLazy( bin_file: *link.File, - src_loc: Module.LazySrcLoc, + pt: Zcu.PerThread, + src_loc: Zcu.LazySrcLoc, lazy_sym: link.File.LazySymbol, code: *std.ArrayList(u8), debug_output: DebugInfoOutput, @@ -980,8 +982,9 @@ pub fn generateLazy( const gpa = comp.gpa; // This function is for generating global code, so we use the root module. const mod = comp.root_mod; - var function = Self{ + var function: Self = .{ .gpa = gpa, + .pt = pt, .air = undefined, .liveness = undefined, .target = &mod.resolved_target.result, @@ -1065,7 +1068,7 @@ pub fn generateLazy( } const FormatDeclData = struct { - mod: *Module, + zcu: *Zcu, decl_index: InternPool.DeclIndex, }; fn formatDecl( @@ -1074,11 +1077,11 @@ fn formatDecl( _: std.fmt.FormatOptions, writer: anytype, ) @TypeOf(writer).Error!void { - try data.mod.declPtr(data.decl_index).renderFullyQualifiedName(data.mod, writer); + try data.zcu.declPtr(data.decl_index).renderFullyQualifiedName(data.zcu, writer); } fn fmtDecl(self: *Self, decl_index: InternPool.DeclIndex) std.fmt.Formatter(formatDecl) { return .{ .data = .{ - .mod = self.bin_file.comp.module.?, + .zcu = self.pt.zcu, .decl_index = decl_index, } }; } @@ -1095,7 +1098,7 @@ fn formatAir( ) @TypeOf(writer).Error!void { @import("../../print_air.zig").dumpInst( data.inst, - data.self.bin_file.comp.module.?, + data.self.pt, data.self.air, data.self.liveness, ); @@ -1746,7 +1749,8 @@ fn asmMemoryRegisterImmediate( } fn gen(self: *Self) InnerError!void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const fn_info = mod.typeToFunc(self.fn_type).?; const cc = abi.resolveCallingConvention(fn_info.cc, self.target.*); if (cc != .Naked) { @@ -1764,7 +1768,7 @@ fn gen(self: *Self) InnerError!void { // The address where to store the return value for the caller is in a // register which the callee is free to clobber. Therefore, we purposely // spill it to stack immediately. - const frame_index = try self.allocFrameIndex(FrameAlloc.initSpill(Type.usize, mod)); + const frame_index = try self.allocFrameIndex(FrameAlloc.initSpill(Type.usize, pt)); try self.genSetMem( .{ .frame = frame_index }, 0, @@ -1800,7 +1804,7 @@ fn gen(self: *Self) InnerError!void { try self.asmRegisterImmediate(.{ ._, .cmp }, .al, Immediate.u(info.fp_count)); const skip_sse_reloc = try self.asmJccReloc(.na, undefined); - const vec_2_f64 = try mod.vectorType(.{ .len = 2, .child = .f64_type }); + const vec_2_f64 = try pt.vectorType(.{ .len = 2, .child = .f64_type }); for (abi.SysV.c_abi_sse_param_regs[info.fp_count..], info.fp_count..) |reg, reg_i| try self.genSetMem( .{ .frame = reg_save_area_fi }, @@ -1951,7 +1955,8 @@ fn gen(self: *Self) InnerError!void { } fn genBody(self: *Self, body: []const Air.Inst.Index) InnerError!void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ip = &mod.intern_pool; const air_tags = self.air.instructions.items(.tag); @@ -2222,12 +2227,13 @@ fn genBody(self: *Self, body: []const Air.Inst.Index) InnerError!void { } fn genLazy(self: *Self, lazy_sym: link.File.LazySymbol) InnerError!void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ip = &mod.intern_pool; switch (lazy_sym.ty.zigTypeTag(mod)) { .Enum => { const enum_ty = lazy_sym.ty; - wip_mir_log.debug("{}.@tagName:", .{enum_ty.fmt(mod)}); + wip_mir_log.debug("{}.@tagName:", .{enum_ty.fmt(pt)}); const resolved_cc = abi.resolveCallingConvention(.Unspecified, self.target.*); const param_regs = abi.getCAbiIntParamRegs(resolved_cc); @@ -2249,7 +2255,7 @@ fn genLazy(self: *Self, lazy_sym: link.File.LazySymbol) InnerError!void { const tag_names = enum_ty.enumFields(mod); for (exitlude_jump_relocs, 0..) |*exitlude_jump_reloc, tag_index| { const tag_name_len = tag_names.get(ip)[tag_index].length(ip); - const tag_val = try mod.enumValueFieldIndex(enum_ty, @intCast(tag_index)); + const tag_val = try pt.enumValueFieldIndex(enum_ty, @intCast(tag_index)); const tag_mcv = try self.genTypedValue(tag_val); try self.genBinOpMir(.{ ._, .cmp }, enum_ty, enum_mcv, tag_mcv); const skip_reloc = try self.asmJccReloc(.ne, undefined); @@ -2282,7 +2288,7 @@ fn genLazy(self: *Self, lazy_sym: link.File.LazySymbol) InnerError!void { }, else => return self.fail( "TODO implement {s} for {}", - .{ @tagName(lazy_sym.kind), lazy_sym.ty.fmt(mod) }, + .{ @tagName(lazy_sym.kind), lazy_sym.ty.fmt(pt) }, ), } } @@ -2481,14 +2487,15 @@ fn allocFrameIndex(self: *Self, alloc: FrameAlloc) !FrameIndex { /// Use a pointer instruction as the basis for allocating stack memory. fn allocMemPtr(self: *Self, inst: Air.Inst.Index) !FrameIndex { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ptr_ty = self.typeOfIndex(inst); const val_ty = ptr_ty.childType(mod); return self.allocFrameIndex(FrameAlloc.init(.{ - .size = math.cast(u32, val_ty.abiSize(mod)) orelse { - return self.fail("type '{}' too big to fit into stack frame", .{val_ty.fmt(mod)}); + .size = math.cast(u32, val_ty.abiSize(pt)) orelse { + return self.fail("type '{}' too big to fit into stack frame", .{val_ty.fmt(pt)}); }, - .alignment = ptr_ty.ptrAlignment(mod).max(.@"1"), + .alignment = ptr_ty.ptrAlignment(pt).max(.@"1"), })); } @@ -2501,9 +2508,10 @@ fn allocTempRegOrMem(self: *Self, elem_ty: Type, reg_ok: bool) !MCValue { } fn allocRegOrMemAdvanced(self: *Self, ty: Type, inst: ?Air.Inst.Index, reg_ok: bool) !MCValue { - const mod = self.bin_file.comp.module.?; - const abi_size = math.cast(u32, ty.abiSize(mod)) orelse { - return self.fail("type '{}' too big to fit into stack frame", .{ty.fmt(mod)}); + const pt = self.pt; + const mod = pt.zcu; + const abi_size = math.cast(u32, ty.abiSize(pt)) orelse { + return self.fail("type '{}' too big to fit into stack frame", .{ty.fmt(pt)}); }; if (reg_ok) need_mem: { @@ -2529,12 +2537,13 @@ fn allocRegOrMemAdvanced(self: *Self, ty: Type, inst: ?Air.Inst.Index, reg_ok: b } } - const frame_index = try self.allocFrameIndex(FrameAlloc.initSpill(ty, mod)); + const frame_index = try self.allocFrameIndex(FrameAlloc.initSpill(ty, pt)); return .{ .load_frame = .{ .index = frame_index } }; } fn regClassForType(self: *Self, ty: Type) RegisterManager.RegisterBitSet { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; return switch (ty.zigTypeTag(mod)) { .Float => switch (ty.floatBits(self.target.*)) { 80 => abi.RegisterClass.x87, @@ -2849,7 +2858,8 @@ fn airFptrunc(self: *Self, inst: Air.Inst.Index) !void { } fn airFpext(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const dst_ty = self.typeOfIndex(inst); const dst_scalar_ty = dst_ty.scalarType(mod); @@ -2892,14 +2902,14 @@ fn airFpext(self: *Self, inst: Air.Inst.Index) !void { } }, &.{src_scalar_ty}, &.{.{ .air_ref = ty_op.operand }}); } - const src_abi_size: u32 = @intCast(src_ty.abiSize(mod)); + const src_abi_size: u32 = @intCast(src_ty.abiSize(pt)); const src_mcv = try self.resolveInst(ty_op.operand); const dst_mcv = if (src_mcv.isRegister() and self.reuseOperand(inst, ty_op.operand, 0, src_mcv)) src_mcv else try self.copyToRegisterWithInstTracking(inst, dst_ty, src_mcv); const dst_reg = dst_mcv.getReg().?; - const dst_alias = registerAlias(dst_reg, @intCast(@max(dst_ty.abiSize(mod), 16))); + const dst_alias = registerAlias(dst_reg, @intCast(@max(dst_ty.abiSize(pt), 16))); const dst_lock = self.register_manager.lockReg(dst_reg); defer if (dst_lock) |lock| self.register_manager.unlockReg(lock); @@ -2978,19 +2988,20 @@ fn airFpext(self: *Self, inst: Air.Inst.Index) !void { } break :result dst_mcv; } orelse return self.fail("TODO implement airFpext from {} to {}", .{ - src_ty.fmt(mod), dst_ty.fmt(mod), + src_ty.fmt(pt), dst_ty.fmt(pt), }); return self.finishAir(inst, result, .{ ty_op.operand, .none, .none }); } fn airIntCast(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const src_ty = self.typeOf(ty_op.operand); const dst_ty = self.typeOfIndex(inst); const result = @as(?MCValue, result: { - const dst_abi_size: u32 = @intCast(dst_ty.abiSize(mod)); + const dst_abi_size: u32 = @intCast(dst_ty.abiSize(pt)); const src_int_info = src_ty.intInfo(mod); const dst_int_info = dst_ty.intInfo(mod); @@ -3001,13 +3012,13 @@ fn airIntCast(self: *Self, inst: Air.Inst.Index) !void { const src_mcv = try self.resolveInst(ty_op.operand); if (dst_ty.isVector(mod)) { - const src_abi_size: u32 = @intCast(src_ty.abiSize(mod)); + const src_abi_size: u32 = @intCast(src_ty.abiSize(pt)); const max_abi_size = @max(dst_abi_size, src_abi_size); if (max_abi_size > @as(u32, if (self.hasFeature(.avx2)) 32 else 16)) break :result null; const has_avx = self.hasFeature(.avx); - const dst_elem_abi_size = dst_ty.childType(mod).abiSize(mod); - const src_elem_abi_size = src_ty.childType(mod).abiSize(mod); + const dst_elem_abi_size = dst_ty.childType(mod).abiSize(pt); + const src_elem_abi_size = src_ty.childType(mod).abiSize(pt); switch (math.order(dst_elem_abi_size, src_elem_abi_size)) { .lt => { const mir_tag: Mir.Inst.FixedTag = switch (dst_elem_abi_size) { @@ -3236,19 +3247,20 @@ fn airIntCast(self: *Self, inst: Air.Inst.Index) !void { break :result dst_mcv; }) orelse return self.fail("TODO implement airIntCast from {} to {}", .{ - src_ty.fmt(mod), dst_ty.fmt(mod), + src_ty.fmt(pt), dst_ty.fmt(pt), }); return self.finishAir(inst, result, .{ ty_op.operand, .none, .none }); } fn airTrunc(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const dst_ty = self.typeOfIndex(inst); - const dst_abi_size: u32 = @intCast(dst_ty.abiSize(mod)); + const dst_abi_size: u32 = @intCast(dst_ty.abiSize(pt)); const src_ty = self.typeOf(ty_op.operand); - const src_abi_size: u32 = @intCast(src_ty.abiSize(mod)); + const src_abi_size: u32 = @intCast(src_ty.abiSize(pt)); const result = result: { const src_mcv = try self.resolveInst(ty_op.operand); @@ -3278,9 +3290,9 @@ fn airTrunc(self: *Self, inst: Air.Inst.Index) !void { if (dst_ty.zigTypeTag(mod) == .Vector) { assert(src_ty.zigTypeTag(mod) == .Vector and dst_ty.vectorLen(mod) == src_ty.vectorLen(mod)); const dst_elem_ty = dst_ty.childType(mod); - const dst_elem_abi_size: u32 = @intCast(dst_elem_ty.abiSize(mod)); + const dst_elem_abi_size: u32 = @intCast(dst_elem_ty.abiSize(pt)); const src_elem_ty = src_ty.childType(mod); - const src_elem_abi_size: u32 = @intCast(src_elem_ty.abiSize(mod)); + const src_elem_abi_size: u32 = @intCast(src_elem_ty.abiSize(pt)); const mir_tag = @as(?Mir.Inst.FixedTag, switch (dst_elem_abi_size) { 1 => switch (src_elem_abi_size) { @@ -3305,20 +3317,20 @@ fn airTrunc(self: *Self, inst: Air.Inst.Index) !void { else => null, }, else => null, - }) orelse return self.fail("TODO implement airTrunc for {}", .{dst_ty.fmt(mod)}); + }) orelse return self.fail("TODO implement airTrunc for {}", .{dst_ty.fmt(pt)}); const dst_info = dst_elem_ty.intInfo(mod); const src_info = src_elem_ty.intInfo(mod); - const mask_val = try mod.intValue(src_elem_ty, @as(u64, math.maxInt(u64)) >> @intCast(64 - dst_info.bits)); + const mask_val = try pt.intValue(src_elem_ty, @as(u64, math.maxInt(u64)) >> @intCast(64 - dst_info.bits)); - const splat_ty = try mod.vectorType(.{ + const splat_ty = try pt.vectorType(.{ .len = @intCast(@divExact(@as(u64, if (src_abi_size > 16) 256 else 128), src_info.bits)), .child = src_elem_ty.ip_index, }); - const splat_abi_size: u32 = @intCast(splat_ty.abiSize(mod)); + const splat_abi_size: u32 = @intCast(splat_ty.abiSize(pt)); - const splat_val = try mod.intern(.{ .aggregate = .{ + const splat_val = try pt.intern(.{ .aggregate = .{ .ty = splat_ty.ip_index, .storage = .{ .repeated_elem = mask_val.ip_index }, } }); @@ -3375,7 +3387,7 @@ fn airTrunc(self: *Self, inst: Air.Inst.Index) !void { } } else if (dst_abi_size <= 16) { const dst_info = dst_ty.intInfo(mod); - const high_ty = try mod.intType(dst_info.signedness, dst_info.bits - 64); + const high_ty = try pt.intType(dst_info.signedness, dst_info.bits - 64); if (self.regExtraBits(high_ty) > 0) { try self.truncateRegister(high_ty, dst_mcv.register_pair[1].to64()); } @@ -3400,12 +3412,12 @@ fn airIntFromBool(self: *Self, inst: Air.Inst.Index) !void { } fn airSlice(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; const ty_pl = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_pl; const bin_op = self.air.extraData(Air.Bin, ty_pl.payload).data; const slice_ty = self.typeOfIndex(inst); - const frame_index = try self.allocFrameIndex(FrameAlloc.initSpill(slice_ty, mod)); + const frame_index = try self.allocFrameIndex(FrameAlloc.initSpill(slice_ty, pt)); const ptr_ty = self.typeOf(bin_op.lhs); try self.genSetMem(.{ .frame = frame_index }, 0, ptr_ty, .{ .air_ref = bin_op.lhs }, .{}); @@ -3413,7 +3425,7 @@ fn airSlice(self: *Self, inst: Air.Inst.Index) !void { const len_ty = self.typeOf(bin_op.rhs); try self.genSetMem( .{ .frame = frame_index }, - @intCast(ptr_ty.abiSize(mod)), + @intCast(ptr_ty.abiSize(pt)), len_ty, .{ .air_ref = bin_op.rhs }, .{}, @@ -3430,14 +3442,15 @@ fn airUnOp(self: *Self, inst: Air.Inst.Index, tag: Air.Inst.Tag) !void { } fn airBinOp(self: *Self, inst: Air.Inst.Index, tag: Air.Inst.Tag) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const bin_op = self.air.instructions.items(.data)[@intFromEnum(inst)].bin_op; const dst_mcv = try self.genBinOp(inst, tag, bin_op.lhs, bin_op.rhs); const dst_ty = self.typeOfIndex(inst); if (dst_ty.isAbiInt(mod)) { - const abi_size: u32 = @intCast(dst_ty.abiSize(mod)); - const bit_size: u32 = @intCast(dst_ty.bitSize(mod)); + const abi_size: u32 = @intCast(dst_ty.abiSize(pt)); + const bit_size: u32 = @intCast(dst_ty.bitSize(pt)); if (abi_size * 8 > bit_size) { const dst_lock = switch (dst_mcv) { .register => |dst_reg| self.register_manager.lockRegAssumeUnused(dst_reg), @@ -3452,7 +3465,7 @@ fn airBinOp(self: *Self, inst: Air.Inst.Index, tag: Air.Inst.Tag) !void { const tmp_lock = self.register_manager.lockRegAssumeUnused(tmp_reg); defer self.register_manager.unlockReg(tmp_lock); - const hi_ty = try mod.intType(.unsigned, @intCast((dst_ty.bitSize(mod) - 1) % 64 + 1)); + const hi_ty = try pt.intType(.unsigned, @intCast((dst_ty.bitSize(pt) - 1) % 64 + 1)); const hi_mcv = dst_mcv.address().offset(@intCast(bit_size / 64 * 8)).deref(); try self.genSetReg(tmp_reg, hi_ty, hi_mcv, .{}); try self.truncateRegister(dst_ty, tmp_reg); @@ -3471,7 +3484,8 @@ fn airPtrArithmetic(self: *Self, inst: Air.Inst.Index, tag: Air.Inst.Tag) !void } fn activeIntBits(self: *Self, dst_air: Air.Inst.Ref) u16 { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const air_tag = self.air.instructions.items(.tag); const air_data = self.air.instructions.items(.data); @@ -3497,7 +3511,7 @@ fn activeIntBits(self: *Self, dst_air: Air.Inst.Ref) u16 { } } else if (dst_air.toInterned()) |ip_index| { var space: Value.BigIntSpace = undefined; - const src_int = Value.fromInterned(ip_index).toBigInt(&space, mod); + const src_int = Value.fromInterned(ip_index).toBigInt(&space, pt); return @as(u16, @intCast(src_int.bitCountTwosComp())) + @intFromBool(src_int.positive and dst_info.signedness == .signed); } @@ -3505,7 +3519,8 @@ fn activeIntBits(self: *Self, dst_air: Air.Inst.Ref) u16 { } fn airMulDivBinOp(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const bin_op = self.air.instructions.items(.data)[@intFromEnum(inst)].bin_op; const result = result: { const tag = self.air.instructions.items(.tag)[@intFromEnum(inst)]; @@ -3514,10 +3529,10 @@ fn airMulDivBinOp(self: *Self, inst: Air.Inst.Index) !void { .Float, .Vector => break :result try self.genBinOp(inst, tag, bin_op.lhs, bin_op.rhs), else => {}, } - const dst_abi_size: u32 = @intCast(dst_ty.abiSize(mod)); + const dst_abi_size: u32 = @intCast(dst_ty.abiSize(pt)); const dst_info = dst_ty.intInfo(mod); - const src_ty = try mod.intType(dst_info.signedness, switch (tag) { + const src_ty = try pt.intType(dst_info.signedness, switch (tag) { else => unreachable, .mul, .mul_wrap => @max( self.activeIntBits(bin_op.lhs), @@ -3526,7 +3541,7 @@ fn airMulDivBinOp(self: *Self, inst: Air.Inst.Index) !void { ), .div_trunc, .div_floor, .div_exact, .rem, .mod => dst_info.bits, }); - const src_abi_size: u32 = @intCast(src_ty.abiSize(mod)); + const src_abi_size: u32 = @intCast(src_ty.abiSize(pt)); if (dst_abi_size == 16 and src_abi_size == 16) switch (tag) { else => unreachable, @@ -3539,7 +3554,7 @@ fn airMulDivBinOp(self: *Self, inst: Air.Inst.Index) !void { state: State, reloc: Mir.Inst.Index, } = if (signed and tag == .div_floor) state: { - const frame_index = try self.allocFrameIndex(FrameAlloc.initType(Type.usize, mod)); + const frame_index = try self.allocFrameIndex(FrameAlloc.initType(Type.usize, pt)); try self.asmMemoryImmediate( .{ ._, .mov }, .{ .base = .{ .frame = frame_index }, .mod = .{ .rm = .{ .size = .qword } } }, @@ -3614,7 +3629,7 @@ fn airMulDivBinOp(self: *Self, inst: Air.Inst.Index) !void { .rem, .mod => "mod", else => unreachable, }, - intCompilerRtAbiName(@intCast(dst_ty.bitSize(mod))), + intCompilerRtAbiName(@intCast(dst_ty.bitSize(pt))), }) catch unreachable, } }, &.{ src_ty, src_ty }, @@ -3643,7 +3658,7 @@ fn airMulDivBinOp(self: *Self, inst: Air.Inst.Index) !void { .return_type = dst_ty.toIntern(), .param_types = &.{ src_ty.toIntern(), src_ty.toIntern() }, .callee = std.fmt.bufPrint(&callee_buf, "__div{c}i3", .{ - intCompilerRtAbiName(@intCast(dst_ty.bitSize(mod))), + intCompilerRtAbiName(@intCast(dst_ty.bitSize(pt))), }) catch unreachable, } }, &.{ src_ty, src_ty }, @@ -3734,12 +3749,13 @@ fn airMulDivBinOp(self: *Self, inst: Air.Inst.Index) !void { } fn airAddSat(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const bin_op = self.air.instructions.items(.data)[@intFromEnum(inst)].bin_op; const ty = self.typeOf(bin_op.lhs); - if (ty.zigTypeTag(mod) == .Vector or ty.abiSize(mod) > 8) return self.fail( + if (ty.zigTypeTag(mod) == .Vector or ty.abiSize(pt) > 8) return self.fail( "TODO implement airAddSat for {}", - .{ty.fmt(mod)}, + .{ty.fmt(pt)}, ); const lhs_mcv = try self.resolveInst(bin_op.lhs); @@ -3804,7 +3820,7 @@ fn airAddSat(self: *Self, inst: Air.Inst.Index) !void { break :cc .o; } else cc: { try self.genSetReg(limit_reg, ty, .{ - .immediate = @as(u64, math.maxInt(u64)) >> @intCast(64 - ty.bitSize(mod)), + .immediate = @as(u64, math.maxInt(u64)) >> @intCast(64 - ty.bitSize(pt)), }, .{}); try self.genBinOpMir(.{ ._, .add }, ty, dst_mcv, rhs_mcv); @@ -3815,7 +3831,7 @@ fn airAddSat(self: *Self, inst: Air.Inst.Index) !void { break :cc .c; }; - const cmov_abi_size = @max(@as(u32, @intCast(ty.abiSize(mod))), 2); + const cmov_abi_size = @max(@as(u32, @intCast(ty.abiSize(pt))), 2); try self.asmCmovccRegisterRegister( cc, registerAlias(dst_reg, cmov_abi_size), @@ -3834,12 +3850,13 @@ fn airAddSat(self: *Self, inst: Air.Inst.Index) !void { } fn airSubSat(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const bin_op = self.air.instructions.items(.data)[@intFromEnum(inst)].bin_op; const ty = self.typeOf(bin_op.lhs); - if (ty.zigTypeTag(mod) == .Vector or ty.abiSize(mod) > 8) return self.fail( + if (ty.zigTypeTag(mod) == .Vector or ty.abiSize(pt) > 8) return self.fail( "TODO implement airSubSat for {}", - .{ty.fmt(mod)}, + .{ty.fmt(pt)}, ); const lhs_mcv = try self.resolveInst(bin_op.lhs); @@ -3908,7 +3925,7 @@ fn airSubSat(self: *Self, inst: Air.Inst.Index) !void { break :cc .c; }; - const cmov_abi_size = @max(@as(u32, @intCast(ty.abiSize(mod))), 2); + const cmov_abi_size = @max(@as(u32, @intCast(ty.abiSize(pt))), 2); try self.asmCmovccRegisterRegister( cc, registerAlias(dst_reg, cmov_abi_size), @@ -3927,13 +3944,14 @@ fn airSubSat(self: *Self, inst: Air.Inst.Index) !void { } fn airMulSat(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const bin_op = self.air.instructions.items(.data)[@intFromEnum(inst)].bin_op; const ty = self.typeOf(bin_op.lhs); const result = result: { if (ty.toIntern() == .i128_type) { - const ptr_c_int = try mod.singleMutPtrType(Type.c_int); + const ptr_c_int = try pt.singleMutPtrType(Type.c_int); const overflow = try self.allocTempRegOrMem(Type.c_int, false); const dst_mcv = try self.genCall(.{ .lib = .{ @@ -4010,9 +4028,9 @@ fn airMulSat(self: *Self, inst: Air.Inst.Index) !void { break :result dst_mcv; } - if (ty.zigTypeTag(mod) == .Vector or ty.abiSize(mod) > 8) return self.fail( + if (ty.zigTypeTag(mod) == .Vector or ty.abiSize(pt) > 8) return self.fail( "TODO implement airMulSat for {}", - .{ty.fmt(mod)}, + .{ty.fmt(pt)}, ); try self.spillRegisters(&.{ .rax, .rcx, .rdx }); @@ -4061,7 +4079,7 @@ fn airMulSat(self: *Self, inst: Air.Inst.Index) !void { }; const dst_mcv = try self.genMulDivBinOp(.mul, inst, ty, ty, lhs_mcv, rhs_mcv); - const cmov_abi_size = @max(@as(u32, @intCast(ty.abiSize(mod))), 2); + const cmov_abi_size = @max(@as(u32, @intCast(ty.abiSize(pt))), 2); try self.asmCmovccRegisterRegister( cc, registerAlias(dst_mcv.register, cmov_abi_size), @@ -4073,7 +4091,8 @@ fn airMulSat(self: *Self, inst: Air.Inst.Index) !void { } fn airAddSubWithOverflow(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_pl = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_pl; const bin_op = self.air.extraData(Air.Bin, ty_pl.payload).data; const result: MCValue = result: { @@ -4109,17 +4128,17 @@ fn airAddSubWithOverflow(self: *Self, inst: Air.Inst.Index) !void { } const frame_index = - try self.allocFrameIndex(FrameAlloc.initSpill(tuple_ty, mod)); + try self.allocFrameIndex(FrameAlloc.initSpill(tuple_ty, pt)); try self.genSetMem( .{ .frame = frame_index }, - @intCast(tuple_ty.structFieldOffset(1, mod)), + @intCast(tuple_ty.structFieldOffset(1, pt)), Type.u1, .{ .eflags = cc }, .{}, ); try self.genSetMem( .{ .frame = frame_index }, - @intCast(tuple_ty.structFieldOffset(0, mod)), + @intCast(tuple_ty.structFieldOffset(0, pt)), ty, partial_mcv, .{}, @@ -4128,7 +4147,7 @@ fn airAddSubWithOverflow(self: *Self, inst: Air.Inst.Index) !void { } const frame_index = - try self.allocFrameIndex(FrameAlloc.initSpill(tuple_ty, mod)); + try self.allocFrameIndex(FrameAlloc.initSpill(tuple_ty, pt)); try self.genSetFrameTruncatedOverflowCompare(tuple_ty, frame_index, partial_mcv, cc); break :result .{ .load_frame = .{ .index = frame_index } }; }, @@ -4139,7 +4158,8 @@ fn airAddSubWithOverflow(self: *Self, inst: Air.Inst.Index) !void { } fn airShlWithOverflow(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_pl = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_pl; const bin_op = self.air.extraData(Air.Bin, ty_pl.payload).data; const result: MCValue = result: { @@ -4186,17 +4206,17 @@ fn airShlWithOverflow(self: *Self, inst: Air.Inst.Index) !void { } const frame_index = - try self.allocFrameIndex(FrameAlloc.initSpill(tuple_ty, mod)); + try self.allocFrameIndex(FrameAlloc.initSpill(tuple_ty, pt)); try self.genSetMem( .{ .frame = frame_index }, - @intCast(tuple_ty.structFieldOffset(1, mod)), + @intCast(tuple_ty.structFieldOffset(1, pt)), tuple_ty.structFieldType(1, mod), .{ .eflags = cc }, .{}, ); try self.genSetMem( .{ .frame = frame_index }, - @intCast(tuple_ty.structFieldOffset(0, mod)), + @intCast(tuple_ty.structFieldOffset(0, pt)), tuple_ty.structFieldType(0, mod), partial_mcv, .{}, @@ -4205,7 +4225,7 @@ fn airShlWithOverflow(self: *Self, inst: Air.Inst.Index) !void { } const frame_index = - try self.allocFrameIndex(FrameAlloc.initSpill(tuple_ty, mod)); + try self.allocFrameIndex(FrameAlloc.initSpill(tuple_ty, pt)); try self.genSetFrameTruncatedOverflowCompare(tuple_ty, frame_index, partial_mcv, cc); break :result .{ .load_frame = .{ .index = frame_index } }; }, @@ -4222,7 +4242,8 @@ fn genSetFrameTruncatedOverflowCompare( src_mcv: MCValue, overflow_cc: ?Condition, ) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const src_lock = switch (src_mcv) { .register => |reg| self.register_manager.lockReg(reg), else => null, @@ -4233,12 +4254,12 @@ fn genSetFrameTruncatedOverflowCompare( const int_info = ty.intInfo(mod); const hi_bits = (int_info.bits - 1) % 64 + 1; - const hi_ty = try mod.intType(int_info.signedness, hi_bits); + const hi_ty = try pt.intType(int_info.signedness, hi_bits); const limb_bits: u16 = @intCast(if (int_info.bits <= 64) self.regBitSize(ty) else 64); - const limb_ty = try mod.intType(int_info.signedness, limb_bits); + const limb_ty = try pt.intType(int_info.signedness, limb_bits); - const rest_ty = try mod.intType(.unsigned, int_info.bits - hi_bits); + const rest_ty = try pt.intType(.unsigned, int_info.bits - hi_bits); const temp_regs = try self.register_manager.allocRegs(3, .{null} ** 3, abi.RegisterClass.gp); @@ -4269,7 +4290,7 @@ fn genSetFrameTruncatedOverflowCompare( ); } - const payload_off: i32 = @intCast(tuple_ty.structFieldOffset(0, mod)); + const payload_off: i32 = @intCast(tuple_ty.structFieldOffset(0, pt)); if (hi_limb_off > 0) try self.genSetMem( .{ .frame = frame_index }, payload_off, @@ -4286,7 +4307,7 @@ fn genSetFrameTruncatedOverflowCompare( ); try self.genSetMem( .{ .frame = frame_index }, - @intCast(tuple_ty.structFieldOffset(1, mod)), + @intCast(tuple_ty.structFieldOffset(1, pt)), tuple_ty.structFieldType(1, mod), if (overflow_cc) |_| .{ .register = overflow_reg.to8() } else .{ .eflags = .ne }, .{}, @@ -4294,18 +4315,19 @@ fn genSetFrameTruncatedOverflowCompare( } fn airMulWithOverflow(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_pl = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_pl; const bin_op = self.air.extraData(Air.Bin, ty_pl.payload).data; const tuple_ty = self.typeOfIndex(inst); const dst_ty = self.typeOf(bin_op.lhs); const result: MCValue = switch (dst_ty.zigTypeTag(mod)) { - .Vector => return self.fail("TODO implement airMulWithOverflow for {}", .{dst_ty.fmt(mod)}), + .Vector => return self.fail("TODO implement airMulWithOverflow for {}", .{dst_ty.fmt(pt)}), .Int => result: { const dst_info = dst_ty.intInfo(mod); if (dst_info.bits > 128 and dst_info.signedness == .unsigned) { const slow_inc = self.hasFeature(.slow_incdec); - const abi_size: u32 = @intCast(dst_ty.abiSize(mod)); + const abi_size: u32 = @intCast(dst_ty.abiSize(pt)); const limb_len = math.divCeil(u32, abi_size, 8) catch unreachable; try self.spillRegisters(&.{ .rax, .rcx, .rdx }); @@ -4316,7 +4338,7 @@ fn airMulWithOverflow(self: *Self, inst: Air.Inst.Index) !void { try self.genInlineMemset( dst_mcv.address(), .{ .immediate = 0 }, - .{ .immediate = tuple_ty.abiSize(mod) }, + .{ .immediate = tuple_ty.abiSize(pt) }, .{}, ); const lhs_mcv = try self.resolveInst(bin_op.lhs); @@ -4356,7 +4378,7 @@ fn airMulWithOverflow(self: *Self, inst: Air.Inst.Index) !void { .index = temp_regs[3].to64(), .scale = .@"8", .disp = dst_mcv.load_frame.off + - @as(i32, @intCast(tuple_ty.structFieldOffset(0, mod))), + @as(i32, @intCast(tuple_ty.structFieldOffset(0, pt))), } }, }, .rdx); try self.asmSetccRegister(.c, .cl); @@ -4380,7 +4402,7 @@ fn airMulWithOverflow(self: *Self, inst: Air.Inst.Index) !void { .index = temp_regs[3].to64(), .scale = .@"8", .disp = dst_mcv.load_frame.off + - @as(i32, @intCast(tuple_ty.structFieldOffset(0, mod))), + @as(i32, @intCast(tuple_ty.structFieldOffset(0, pt))), } }, }, .rax); try self.asmSetccRegister(.c, .ch); @@ -4429,7 +4451,7 @@ fn airMulWithOverflow(self: *Self, inst: Air.Inst.Index) !void { .mod = .{ .rm = .{ .size = .byte, .disp = dst_mcv.load_frame.off + - @as(i32, @intCast(tuple_ty.structFieldOffset(1, mod))), + @as(i32, @intCast(tuple_ty.structFieldOffset(1, pt))), } }, }, Immediate.u(1)); self.performReloc(no_overflow); @@ -4453,11 +4475,11 @@ fn airMulWithOverflow(self: *Self, inst: Air.Inst.Index) !void { const lhs_active_bits = self.activeIntBits(bin_op.lhs); const rhs_active_bits = self.activeIntBits(bin_op.rhs); const src_bits = @max(lhs_active_bits, rhs_active_bits, dst_info.bits / 2); - const src_ty = try mod.intType(dst_info.signedness, src_bits); + const src_ty = try pt.intType(dst_info.signedness, src_bits); if (src_bits > 64 and src_bits <= 128 and dst_info.bits > 64 and dst_info.bits <= 128) switch (dst_info.signedness) { .signed => { - const ptr_c_int = try mod.singleMutPtrType(Type.c_int); + const ptr_c_int = try pt.singleMutPtrType(Type.c_int); const overflow = try self.allocTempRegOrMem(Type.c_int, false); const result = try self.genCall(.{ .lib = .{ .return_type = .i128_type, @@ -4472,7 +4494,7 @@ fn airMulWithOverflow(self: *Self, inst: Air.Inst.Index) !void { const dst_mcv = try self.allocRegOrMem(inst, false); try self.genSetMem( .{ .frame = dst_mcv.load_frame.index }, - @intCast(tuple_ty.structFieldOffset(0, mod)), + @intCast(tuple_ty.structFieldOffset(0, pt)), tuple_ty.structFieldType(0, mod), result, .{}, @@ -4484,7 +4506,7 @@ fn airMulWithOverflow(self: *Self, inst: Air.Inst.Index) !void { ); try self.genSetMem( .{ .frame = dst_mcv.load_frame.index }, - @intCast(tuple_ty.structFieldOffset(1, mod)), + @intCast(tuple_ty.structFieldOffset(1, pt)), tuple_ty.structFieldType(1, mod), .{ .eflags = .ne }, .{}, @@ -4596,14 +4618,14 @@ fn airMulWithOverflow(self: *Self, inst: Air.Inst.Index) !void { const dst_mcv = try self.allocRegOrMem(inst, false); try self.genSetMem( .{ .frame = dst_mcv.load_frame.index }, - @intCast(tuple_ty.structFieldOffset(0, mod)), + @intCast(tuple_ty.structFieldOffset(0, pt)), tuple_ty.structFieldType(0, mod), .{ .register_pair = .{ .rax, .rdx } }, .{}, ); try self.genSetMem( .{ .frame = dst_mcv.load_frame.index }, - @intCast(tuple_ty.structFieldOffset(1, mod)), + @intCast(tuple_ty.structFieldOffset(1, pt)), tuple_ty.structFieldType(1, mod), .{ .register = tmp_regs[1] }, .{}, @@ -4636,7 +4658,7 @@ fn airMulWithOverflow(self: *Self, inst: Air.Inst.Index) !void { self.eflags_inst = inst; break :result .{ .register_overflow = .{ .reg = reg, .eflags = cc } }; } else { - const frame_index = try self.allocFrameIndex(FrameAlloc.initSpill(tuple_ty, mod)); + const frame_index = try self.allocFrameIndex(FrameAlloc.initSpill(tuple_ty, pt)); try self.genSetFrameTruncatedOverflowCompare(tuple_ty, frame_index, partial_mcv, cc); break :result .{ .load_frame = .{ .index = frame_index } }; }, @@ -4644,21 +4666,21 @@ fn airMulWithOverflow(self: *Self, inst: Air.Inst.Index) !void { // For now, this is the only supported multiply that doesn't fit in a register. if (dst_info.bits > 128 or src_bits != 64) return self.fail("TODO implement airWithOverflow from {} to {}", .{ - src_ty.fmt(mod), dst_ty.fmt(mod), + src_ty.fmt(pt), dst_ty.fmt(pt), }); - const frame_index = try self.allocFrameIndex(FrameAlloc.initSpill(tuple_ty, mod)); + const frame_index = try self.allocFrameIndex(FrameAlloc.initSpill(tuple_ty, pt)); if (dst_info.bits >= lhs_active_bits + rhs_active_bits) { try self.genSetMem( .{ .frame = frame_index }, - @intCast(tuple_ty.structFieldOffset(0, mod)), + @intCast(tuple_ty.structFieldOffset(0, pt)), tuple_ty.structFieldType(0, mod), partial_mcv, .{}, ); try self.genSetMem( .{ .frame = frame_index }, - @intCast(tuple_ty.structFieldOffset(1, mod)), + @intCast(tuple_ty.structFieldOffset(1, pt)), tuple_ty.structFieldType(1, mod), .{ .immediate = 0 }, // cc being set is impossible .{}, @@ -4682,8 +4704,8 @@ fn airMulWithOverflow(self: *Self, inst: Air.Inst.Index) !void { /// Clobbers .rax and .rdx registers. /// Quotient is saved in .rax and remainder in .rdx. fn genIntMulDivOpMir(self: *Self, tag: Mir.Inst.FixedTag, ty: Type, lhs: MCValue, rhs: MCValue) !void { - const mod = self.bin_file.comp.module.?; - const abi_size: u32 = @intCast(ty.abiSize(mod)); + const pt = self.pt; + const abi_size: u32 = @intCast(ty.abiSize(pt)); const bit_size: u32 = @intCast(self.regBitSize(ty)); if (abi_size > 8) { return self.fail("TODO implement genIntMulDivOpMir for ABI size larger than 8", .{}); @@ -4732,8 +4754,9 @@ fn genIntMulDivOpMir(self: *Self, tag: Mir.Inst.FixedTag, ty: Type, lhs: MCValue /// Always returns a register. /// Clobbers .rax and .rdx registers. fn genInlineIntDivFloor(self: *Self, ty: Type, lhs: MCValue, rhs: MCValue) !MCValue { - const mod = self.bin_file.comp.module.?; - const abi_size: u32 = @intCast(ty.abiSize(mod)); + const pt = self.pt; + const mod = pt.zcu; + const abi_size: u32 = @intCast(ty.abiSize(pt)); const int_info = ty.intInfo(mod); const dividend = switch (lhs) { .register => |reg| reg, @@ -4784,7 +4807,8 @@ fn genInlineIntDivFloor(self: *Self, ty: Type, lhs: MCValue, rhs: MCValue) !MCVa } fn airShlShrBinOp(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const bin_op = self.air.instructions.items(.data)[@intFromEnum(inst)].bin_op; const air_tags = self.air.instructions.items(.tag); @@ -4811,7 +4835,7 @@ fn airShlShrBinOp(self: *Self, inst: Air.Inst.Index) !void { const tmp_lock = self.register_manager.lockRegAssumeUnused(tmp_reg); defer self.register_manager.unlockReg(tmp_lock); - const lhs_bits: u31 = @intCast(lhs_ty.bitSize(mod)); + const lhs_bits: u31 = @intCast(lhs_ty.bitSize(pt)); const tmp_ty = if (lhs_bits > 64) Type.usize else lhs_ty; const off = frame_addr.off + (lhs_bits - 1) / 64 * 8; try self.genSetReg( @@ -4922,11 +4946,11 @@ fn airShlShrBinOp(self: *Self, inst: Air.Inst.Index) !void { .shl, .shl_exact => if (self.hasFeature(.avx2)) .{ .vp_q, .sll } else null, }, }, - })) |mir_tag| if (try self.air.value(bin_op.rhs, mod)) |rhs_val| { + })) |mir_tag| if (try self.air.value(bin_op.rhs, pt)) |rhs_val| { switch (mod.intern_pool.indexToKey(rhs_val.toIntern())) { .aggregate => |rhs_aggregate| switch (rhs_aggregate.storage) { .repeated_elem => |rhs_elem| { - const abi_size: u32 = @intCast(lhs_ty.abiSize(mod)); + const abi_size: u32 = @intCast(lhs_ty.abiSize(pt)); const lhs_mcv = try self.resolveInst(bin_op.lhs); const dst_reg, const lhs_reg = if (lhs_mcv.isRegister() and @@ -4946,7 +4970,7 @@ fn airShlShrBinOp(self: *Self, inst: Air.Inst.Index) !void { self.register_manager.unlockReg(lock); const shift_imm = - Immediate.u(@intCast(Value.fromInterned(rhs_elem).toUnsignedInt(mod))); + Immediate.u(@intCast(Value.fromInterned(rhs_elem).toUnsignedInt(pt))); if (self.hasFeature(.avx)) try self.asmRegisterRegisterImmediate( mir_tag, registerAlias(dst_reg, abi_size), @@ -4968,7 +4992,7 @@ fn airShlShrBinOp(self: *Self, inst: Air.Inst.Index) !void { } } else if (bin_op.rhs.toIndex()) |rhs_inst| switch (air_tags[@intFromEnum(rhs_inst)]) { .splat => { - const abi_size: u32 = @intCast(lhs_ty.abiSize(mod)); + const abi_size: u32 = @intCast(lhs_ty.abiSize(pt)); const lhs_mcv = try self.resolveInst(bin_op.lhs); const dst_reg, const lhs_reg = if (lhs_mcv.isRegister() and @@ -4991,13 +5015,13 @@ fn airShlShrBinOp(self: *Self, inst: Air.Inst.Index) !void { const shift_lock = self.register_manager.lockRegAssumeUnused(shift_reg); defer self.register_manager.unlockReg(shift_lock); - const mask_ty = try mod.vectorType(.{ .len = 16, .child = .u8_type }); - const mask_mcv = try self.genTypedValue(Value.fromInterned(try mod.intern(.{ .aggregate = .{ + const mask_ty = try pt.vectorType(.{ .len = 16, .child = .u8_type }); + const mask_mcv = try self.genTypedValue(Value.fromInterned(try pt.intern(.{ .aggregate = .{ .ty = mask_ty.toIntern(), .storage = .{ .elems = &([1]InternPool.Index{ - (try rhs_ty.childType(mod).maxIntScalar(mod, Type.u8)).toIntern(), + (try rhs_ty.childType(mod).maxIntScalar(pt, Type.u8)).toIntern(), } ++ [1]InternPool.Index{ - (try mod.intValue(Type.u8, 0)).toIntern(), + (try pt.intValue(Type.u8, 0)).toIntern(), } ** 15) }, } }))); const mask_addr_reg = @@ -5045,7 +5069,7 @@ fn airShlShrBinOp(self: *Self, inst: Air.Inst.Index) !void { }, else => {}, } - return self.fail("TODO implement airShlShrBinOp for {}", .{lhs_ty.fmt(mod)}); + return self.fail("TODO implement airShlShrBinOp for {}", .{lhs_ty.fmt(pt)}); }; return self.finishAir(inst, result, .{ bin_op.lhs, bin_op.rhs, .none }); } @@ -5058,11 +5082,11 @@ fn airShlSat(self: *Self, inst: Air.Inst.Index) !void { } fn airOptionalPayload(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const result: MCValue = result: { const pl_ty = self.typeOfIndex(inst); - if (!pl_ty.hasRuntimeBitsIgnoreComptime(mod)) break :result .none; + if (!pl_ty.hasRuntimeBitsIgnoreComptime(pt)) break :result .none; const opt_mcv = try self.resolveInst(ty_op.operand); if (self.reuseOperand(inst, ty_op.operand, 0, opt_mcv)) { @@ -5104,7 +5128,8 @@ fn airOptionalPayloadPtr(self: *Self, inst: Air.Inst.Index) !void { } fn airOptionalPayloadPtrSet(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const result = result: { const dst_ty = self.typeOfIndex(inst); @@ -5130,7 +5155,7 @@ fn airOptionalPayloadPtrSet(self: *Self, inst: Air.Inst.Index) !void { try self.copyToRegisterWithInstTracking(inst, dst_ty, src_mcv); const pl_ty = dst_ty.childType(mod); - const pl_abi_size: i32 = @intCast(pl_ty.abiSize(mod)); + const pl_abi_size: i32 = @intCast(pl_ty.abiSize(pt)); try self.genSetMem( .{ .reg = dst_mcv.getReg().? }, pl_abi_size, @@ -5144,7 +5169,8 @@ fn airOptionalPayloadPtrSet(self: *Self, inst: Air.Inst.Index) !void { } fn airUnwrapErrUnionErr(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const err_union_ty = self.typeOf(ty_op.operand); const err_ty = err_union_ty.errorUnionSet(mod); @@ -5156,11 +5182,11 @@ fn airUnwrapErrUnionErr(self: *Self, inst: Air.Inst.Index) !void { break :result MCValue{ .immediate = 0 }; } - if (!payload_ty.hasRuntimeBitsIgnoreComptime(mod)) { + if (!payload_ty.hasRuntimeBitsIgnoreComptime(pt)) { break :result operand; } - const err_off = errUnionErrorOffset(payload_ty, mod); + const err_off = errUnionErrorOffset(payload_ty, pt); switch (operand) { .register => |reg| { // TODO reuse operand @@ -5197,7 +5223,8 @@ fn airUnwrapErrUnionPayload(self: *Self, inst: Air.Inst.Index) !void { // *(E!T) -> E fn airUnwrapErrUnionErrPtr(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const src_ty = self.typeOf(ty_op.operand); @@ -5217,8 +5244,8 @@ fn airUnwrapErrUnionErrPtr(self: *Self, inst: Air.Inst.Index) !void { const eu_ty = src_ty.childType(mod); const pl_ty = eu_ty.errorUnionPayload(mod); const err_ty = eu_ty.errorUnionSet(mod); - const err_off: i32 = @intCast(errUnionErrorOffset(pl_ty, mod)); - const err_abi_size: u32 = @intCast(err_ty.abiSize(mod)); + const err_off: i32 = @intCast(errUnionErrorOffset(pl_ty, pt)); + const err_abi_size: u32 = @intCast(err_ty.abiSize(pt)); try self.asmRegisterMemory( .{ ._, .mov }, registerAlias(dst_reg, err_abi_size), @@ -5244,7 +5271,8 @@ fn airUnwrapErrUnionPayloadPtr(self: *Self, inst: Air.Inst.Index) !void { } fn airErrUnionPayloadPtrSet(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const result: MCValue = result: { const src_ty = self.typeOf(ty_op.operand); @@ -5259,8 +5287,8 @@ fn airErrUnionPayloadPtrSet(self: *Self, inst: Air.Inst.Index) !void { const eu_ty = src_ty.childType(mod); const pl_ty = eu_ty.errorUnionPayload(mod); const err_ty = eu_ty.errorUnionSet(mod); - const err_off: i32 = @intCast(errUnionErrorOffset(pl_ty, mod)); - const err_abi_size: u32 = @intCast(err_ty.abiSize(mod)); + const err_off: i32 = @intCast(errUnionErrorOffset(pl_ty, pt)); + const err_abi_size: u32 = @intCast(err_ty.abiSize(pt)); try self.asmMemoryImmediate( .{ ._, .mov }, .{ @@ -5283,8 +5311,8 @@ fn airErrUnionPayloadPtrSet(self: *Self, inst: Air.Inst.Index) !void { const dst_lock = self.register_manager.lockReg(dst_reg); defer if (dst_lock) |lock| self.register_manager.unlockReg(lock); - const pl_off: i32 = @intCast(errUnionPayloadOffset(pl_ty, mod)); - const dst_abi_size: u32 = @intCast(dst_ty.abiSize(mod)); + const pl_off: i32 = @intCast(errUnionPayloadOffset(pl_ty, pt)); + const dst_abi_size: u32 = @intCast(dst_ty.abiSize(pt)); try self.asmRegisterMemory( .{ ._, .lea }, registerAlias(dst_reg, dst_abi_size), @@ -5304,13 +5332,14 @@ fn genUnwrapErrUnionPayloadMir( err_union_ty: Type, err_union: MCValue, ) !MCValue { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const payload_ty = err_union_ty.errorUnionPayload(mod); const result: MCValue = result: { - if (!payload_ty.hasRuntimeBitsIgnoreComptime(mod)) break :result .none; + if (!payload_ty.hasRuntimeBitsIgnoreComptime(pt)) break :result .none; - const payload_off: u31 = @intCast(errUnionPayloadOffset(payload_ty, mod)); + const payload_off: u31 = @intCast(errUnionPayloadOffset(payload_ty, pt)); switch (err_union) { .load_frame => |frame_addr| break :result .{ .load_frame = .{ .index = frame_addr.index, @@ -5353,12 +5382,13 @@ fn genUnwrapErrUnionPayloadPtrMir( ptr_ty: Type, ptr_mcv: MCValue, ) !MCValue { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const err_union_ty = ptr_ty.childType(mod); const payload_ty = err_union_ty.errorUnionPayload(mod); const result: MCValue = result: { - const payload_off = errUnionPayloadOffset(payload_ty, mod); + const payload_off = errUnionPayloadOffset(payload_ty, pt); const result_mcv: MCValue = if (maybe_inst) |inst| try self.copyToRegisterWithInstTracking(inst, ptr_ty, ptr_mcv) else @@ -5387,11 +5417,12 @@ fn airSaveErrReturnTraceIndex(self: *Self, inst: Air.Inst.Index) !void { } fn airWrapOptional(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const result: MCValue = result: { const pl_ty = self.typeOf(ty_op.operand); - if (!pl_ty.hasRuntimeBits(mod)) break :result .{ .immediate = 1 }; + if (!pl_ty.hasRuntimeBits(pt)) break :result .{ .immediate = 1 }; const opt_ty = self.typeOfIndex(inst); const pl_mcv = try self.resolveInst(ty_op.operand); @@ -5408,7 +5439,7 @@ fn airWrapOptional(self: *Self, inst: Air.Inst.Index) !void { try self.genCopy(pl_ty, opt_mcv, pl_mcv, .{}); if (!same_repr) { - const pl_abi_size: i32 = @intCast(pl_ty.abiSize(mod)); + const pl_abi_size: i32 = @intCast(pl_ty.abiSize(pt)); switch (opt_mcv) { else => unreachable, @@ -5441,7 +5472,8 @@ fn airWrapOptional(self: *Self, inst: Air.Inst.Index) !void { /// T to E!T fn airWrapErrUnionPayload(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const eu_ty = ty_op.ty.toType(); @@ -5450,11 +5482,11 @@ fn airWrapErrUnionPayload(self: *Self, inst: Air.Inst.Index) !void { const operand = try self.resolveInst(ty_op.operand); const result: MCValue = result: { - if (!pl_ty.hasRuntimeBitsIgnoreComptime(mod)) break :result .{ .immediate = 0 }; + if (!pl_ty.hasRuntimeBitsIgnoreComptime(pt)) break :result .{ .immediate = 0 }; - const frame_index = try self.allocFrameIndex(FrameAlloc.initSpill(eu_ty, mod)); - const pl_off: i32 = @intCast(errUnionPayloadOffset(pl_ty, mod)); - const err_off: i32 = @intCast(errUnionErrorOffset(pl_ty, mod)); + const frame_index = try self.allocFrameIndex(FrameAlloc.initSpill(eu_ty, pt)); + const pl_off: i32 = @intCast(errUnionPayloadOffset(pl_ty, pt)); + const err_off: i32 = @intCast(errUnionErrorOffset(pl_ty, pt)); try self.genSetMem(.{ .frame = frame_index }, pl_off, pl_ty, operand, .{}); try self.genSetMem(.{ .frame = frame_index }, err_off, err_ty, .{ .immediate = 0 }, .{}); break :result .{ .load_frame = .{ .index = frame_index } }; @@ -5464,7 +5496,8 @@ fn airWrapErrUnionPayload(self: *Self, inst: Air.Inst.Index) !void { /// E to E!T fn airWrapErrUnionErr(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const eu_ty = ty_op.ty.toType(); @@ -5472,11 +5505,11 @@ fn airWrapErrUnionErr(self: *Self, inst: Air.Inst.Index) !void { const err_ty = eu_ty.errorUnionSet(mod); const result: MCValue = result: { - if (!pl_ty.hasRuntimeBitsIgnoreComptime(mod)) break :result try self.resolveInst(ty_op.operand); + if (!pl_ty.hasRuntimeBitsIgnoreComptime(pt)) break :result try self.resolveInst(ty_op.operand); - const frame_index = try self.allocFrameIndex(FrameAlloc.initSpill(eu_ty, mod)); - const pl_off: i32 = @intCast(errUnionPayloadOffset(pl_ty, mod)); - const err_off: i32 = @intCast(errUnionErrorOffset(pl_ty, mod)); + const frame_index = try self.allocFrameIndex(FrameAlloc.initSpill(eu_ty, pt)); + const pl_off: i32 = @intCast(errUnionPayloadOffset(pl_ty, pt)); + const err_off: i32 = @intCast(errUnionErrorOffset(pl_ty, pt)); try self.genSetMem(.{ .frame = frame_index }, pl_off, pl_ty, .undef, .{}); const operand = try self.resolveInst(ty_op.operand); try self.genSetMem(.{ .frame = frame_index }, err_off, err_ty, operand, .{}); @@ -5523,7 +5556,7 @@ fn airSliceLen(self: *Self, inst: Air.Inst.Index) !void { } fn airPtrSliceLenPtr(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const src_ty = self.typeOf(ty_op.operand); @@ -5544,7 +5577,7 @@ fn airPtrSliceLenPtr(self: *Self, inst: Air.Inst.Index) !void { const dst_lock = self.register_manager.lockReg(dst_reg); defer if (dst_lock) |lock| self.register_manager.unlockReg(lock); - const dst_abi_size: u32 = @intCast(dst_ty.abiSize(mod)); + const dst_abi_size: u32 = @intCast(dst_ty.abiSize(pt)); try self.asmRegisterMemory( .{ ._, .lea }, registerAlias(dst_reg, dst_abi_size), @@ -5591,7 +5624,8 @@ fn elemOffset(self: *Self, index_ty: Type, index: MCValue, elem_size: u64) !Regi } fn genSliceElemPtr(self: *Self, lhs: Air.Inst.Ref, rhs: Air.Inst.Ref) !MCValue { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const slice_ty = self.typeOf(lhs); const slice_mcv = try self.resolveInst(lhs); const slice_mcv_lock: ?RegisterLock = switch (slice_mcv) { @@ -5601,7 +5635,7 @@ fn genSliceElemPtr(self: *Self, lhs: Air.Inst.Ref, rhs: Air.Inst.Ref) !MCValue { defer if (slice_mcv_lock) |lock| self.register_manager.unlockReg(lock); const elem_ty = slice_ty.childType(mod); - const elem_size = elem_ty.abiSize(mod); + const elem_size = elem_ty.abiSize(pt); const slice_ptr_field_type = slice_ty.slicePtrFieldType(mod); const index_ty = self.typeOf(rhs); @@ -5627,12 +5661,13 @@ fn genSliceElemPtr(self: *Self, lhs: Air.Inst.Ref, rhs: Air.Inst.Ref) !MCValue { } fn airSliceElemVal(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const bin_op = self.air.instructions.items(.data)[@intFromEnum(inst)].bin_op; const result: MCValue = result: { const elem_ty = self.typeOfIndex(inst); - if (!elem_ty.hasRuntimeBitsIgnoreComptime(mod)) break :result .none; + if (!elem_ty.hasRuntimeBitsIgnoreComptime(pt)) break :result .none; const slice_ty = self.typeOf(bin_op.lhs); const slice_ptr_field_type = slice_ty.slicePtrFieldType(mod); @@ -5652,7 +5687,8 @@ fn airSliceElemPtr(self: *Self, inst: Air.Inst.Index) !void { } fn airArrayElemVal(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const bin_op = self.air.instructions.items(.data)[@intFromEnum(inst)].bin_op; const result: MCValue = result: { @@ -5675,7 +5711,7 @@ fn airArrayElemVal(self: *Self, inst: Air.Inst.Index) !void { defer if (index_lock) |lock| self.register_manager.unlockReg(lock); try self.spillEflagsIfOccupied(); - if (array_ty.isVector(mod) and elem_ty.bitSize(mod) == 1) { + if (array_ty.isVector(mod) and elem_ty.bitSize(pt) == 1) { const index_reg = switch (index_mcv) { .register => |reg| reg, else => try self.copyToTmpRegister(index_ty, index_mcv), @@ -5688,7 +5724,7 @@ fn airArrayElemVal(self: *Self, inst: Air.Inst.Index) !void { index_reg.to64(), ), .sse => { - const frame_index = try self.allocFrameIndex(FrameAlloc.initType(array_ty, mod)); + const frame_index = try self.allocFrameIndex(FrameAlloc.initType(array_ty, pt)); try self.genSetMem(.{ .frame = frame_index }, 0, array_ty, array_mcv, .{}); try self.asmMemoryRegister( .{ ._, .bt }, @@ -5717,7 +5753,7 @@ fn airArrayElemVal(self: *Self, inst: Air.Inst.Index) !void { index_reg.to64(), ), else => return self.fail("TODO airArrayElemVal for {s} of {}", .{ - @tagName(array_mcv), array_ty.fmt(mod), + @tagName(array_mcv), array_ty.fmt(pt), }), } @@ -5726,14 +5762,14 @@ fn airArrayElemVal(self: *Self, inst: Air.Inst.Index) !void { break :result .{ .register = dst_reg }; } - const elem_abi_size = elem_ty.abiSize(mod); + const elem_abi_size = elem_ty.abiSize(pt); const addr_reg = try self.register_manager.allocReg(null, abi.RegisterClass.gp); const addr_lock = self.register_manager.lockRegAssumeUnused(addr_reg); defer self.register_manager.unlockReg(addr_lock); switch (array_mcv) { .register => { - const frame_index = try self.allocFrameIndex(FrameAlloc.initType(array_ty, mod)); + const frame_index = try self.allocFrameIndex(FrameAlloc.initType(array_ty, pt)); try self.genSetMem(.{ .frame = frame_index }, 0, array_ty, array_mcv, .{}); try self.asmRegisterMemory( .{ ._, .lea }, @@ -5757,7 +5793,7 @@ fn airArrayElemVal(self: *Self, inst: Air.Inst.Index) !void { => try self.genSetReg(addr_reg, Type.usize, array_mcv.address(), .{}), .lea_symbol, .lea_direct, .lea_tlv => unreachable, else => return self.fail("TODO airArrayElemVal_val for {s} of {}", .{ - @tagName(array_mcv), array_ty.fmt(mod), + @tagName(array_mcv), array_ty.fmt(pt), }), } @@ -5781,7 +5817,8 @@ fn airArrayElemVal(self: *Self, inst: Air.Inst.Index) !void { } fn airPtrElemVal(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const bin_op = self.air.instructions.items(.data)[@intFromEnum(inst)].bin_op; const ptr_ty = self.typeOf(bin_op.lhs); @@ -5790,9 +5827,9 @@ fn airPtrElemVal(self: *Self, inst: Air.Inst.Index) !void { const result = result: { const elem_ty = ptr_ty.elemType2(mod); - if (!elem_ty.hasRuntimeBitsIgnoreComptime(mod)) break :result .none; + if (!elem_ty.hasRuntimeBitsIgnoreComptime(pt)) break :result .none; - const elem_abi_size: u32 = @intCast(elem_ty.abiSize(mod)); + const elem_abi_size: u32 = @intCast(elem_ty.abiSize(pt)); const index_ty = self.typeOf(bin_op.rhs); const index_mcv = try self.resolveInst(bin_op.rhs); const index_lock = switch (index_mcv) { @@ -5831,7 +5868,8 @@ fn airPtrElemVal(self: *Self, inst: Air.Inst.Index) !void { } fn airPtrElemPtr(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_pl = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_pl; const extra = self.air.extraData(Air.Bin, ty_pl.payload).data; @@ -5854,7 +5892,7 @@ fn airPtrElemPtr(self: *Self, inst: Air.Inst.Index) !void { } const elem_ty = base_ptr_ty.elemType2(mod); - const elem_abi_size = elem_ty.abiSize(mod); + const elem_abi_size = elem_ty.abiSize(pt); const index_ty = self.typeOf(extra.rhs); const index_mcv = try self.resolveInst(extra.rhs); const index_lock: ?RegisterLock = switch (index_mcv) { @@ -5876,12 +5914,13 @@ fn airPtrElemPtr(self: *Self, inst: Air.Inst.Index) !void { } fn airSetUnionTag(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const bin_op = self.air.instructions.items(.data)[@intFromEnum(inst)].bin_op; const ptr_union_ty = self.typeOf(bin_op.lhs); const union_ty = ptr_union_ty.childType(mod); const tag_ty = self.typeOf(bin_op.rhs); - const layout = union_ty.unionGetLayout(mod); + const layout = union_ty.unionGetLayout(pt); if (layout.tag_size == 0) { return self.finishAir(inst, .none, .{ bin_op.lhs, bin_op.rhs, .none }); @@ -5913,19 +5952,19 @@ fn airSetUnionTag(self: *Self, inst: Air.Inst.Index) !void { break :blk MCValue{ .register = reg }; } else ptr; - const ptr_tag_ty = try mod.adjustPtrTypeChild(ptr_union_ty, tag_ty); + const ptr_tag_ty = try pt.adjustPtrTypeChild(ptr_union_ty, tag_ty); try self.store(ptr_tag_ty, adjusted_ptr, tag, .{}); return self.finishAir(inst, .none, .{ bin_op.lhs, bin_op.rhs, .none }); } fn airGetUnionTag(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const tag_ty = self.typeOfIndex(inst); const union_ty = self.typeOf(ty_op.operand); - const layout = union_ty.unionGetLayout(mod); + const layout = union_ty.unionGetLayout(pt); if (layout.tag_size == 0) { return self.finishAir(inst, .none, .{ ty_op.operand, .none, .none }); @@ -5939,7 +5978,7 @@ fn airGetUnionTag(self: *Self, inst: Air.Inst.Index) !void { }; defer if (operand_lock) |lock| self.register_manager.unlockReg(lock); - const tag_abi_size = tag_ty.abiSize(mod); + const tag_abi_size = tag_ty.abiSize(pt); const dst_mcv: MCValue = blk: { switch (operand) { .load_frame => |frame_addr| { @@ -5983,7 +6022,8 @@ fn airGetUnionTag(self: *Self, inst: Air.Inst.Index) !void { } fn airClz(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const result = result: { try self.spillEflagsIfOccupied(); @@ -5991,7 +6031,7 @@ fn airClz(self: *Self, inst: Air.Inst.Index) !void { const dst_ty = self.typeOfIndex(inst); const src_ty = self.typeOf(ty_op.operand); if (src_ty.zigTypeTag(mod) == .Vector) return self.fail("TODO implement airClz for {}", .{ - src_ty.fmt(mod), + src_ty.fmt(pt), }); const src_mcv = try self.resolveInst(ty_op.operand); @@ -6010,8 +6050,8 @@ fn airClz(self: *Self, inst: Air.Inst.Index) !void { const dst_lock = self.register_manager.lockRegAssumeUnused(dst_reg); defer self.register_manager.unlockReg(dst_lock); - const abi_size: u31 = @intCast(src_ty.abiSize(mod)); - const src_bits: u31 = @intCast(src_ty.bitSize(mod)); + const abi_size: u31 = @intCast(src_ty.abiSize(pt)); + const src_bits: u31 = @intCast(src_ty.bitSize(pt)); const has_lzcnt = self.hasFeature(.lzcnt); if (src_bits > @as(u32, if (has_lzcnt) 128 else 64)) { const limbs_len = math.divCeil(u32, abi_size, 8) catch unreachable; @@ -6121,7 +6161,7 @@ fn airClz(self: *Self, inst: Air.Inst.Index) !void { } assert(src_bits <= 64); - const cmov_abi_size = @max(@as(u32, @intCast(dst_ty.abiSize(mod))), 2); + const cmov_abi_size = @max(@as(u32, @intCast(dst_ty.abiSize(pt))), 2); if (math.isPowerOfTwo(src_bits)) { const imm_reg = try self.copyToTmpRegister(dst_ty, .{ .immediate = src_bits ^ (src_bits - 1), @@ -6179,7 +6219,8 @@ fn airClz(self: *Self, inst: Air.Inst.Index) !void { } fn airCtz(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const result = result: { try self.spillEflagsIfOccupied(); @@ -6187,7 +6228,7 @@ fn airCtz(self: *Self, inst: Air.Inst.Index) !void { const dst_ty = self.typeOfIndex(inst); const src_ty = self.typeOf(ty_op.operand); if (src_ty.zigTypeTag(mod) == .Vector) return self.fail("TODO implement airCtz for {}", .{ - src_ty.fmt(mod), + src_ty.fmt(pt), }); const src_mcv = try self.resolveInst(ty_op.operand); @@ -6206,8 +6247,8 @@ fn airCtz(self: *Self, inst: Air.Inst.Index) !void { const dst_lock = self.register_manager.lockReg(dst_reg); defer if (dst_lock) |lock| self.register_manager.unlockReg(lock); - const abi_size: u31 = @intCast(src_ty.abiSize(mod)); - const src_bits: u31 = @intCast(src_ty.bitSize(mod)); + const abi_size: u31 = @intCast(src_ty.abiSize(pt)); + const src_bits: u31 = @intCast(src_ty.bitSize(pt)); const has_bmi = self.hasFeature(.bmi); if (src_bits > @as(u32, if (has_bmi) 128 else 64)) { const limbs_len = math.divCeil(u32, abi_size, 8) catch unreachable; @@ -6328,7 +6369,7 @@ fn airCtz(self: *Self, inst: Air.Inst.Index) !void { try self.genBinOpMir(.{ ._, .bsf }, wide_ty, dst_mcv, .{ .register = wide_reg }); } else try self.genBinOpMir(.{ ._, .bsf }, src_ty, dst_mcv, mat_src_mcv); - const cmov_abi_size = @max(@as(u32, @intCast(dst_ty.abiSize(mod))), 2); + const cmov_abi_size = @max(@as(u32, @intCast(dst_ty.abiSize(pt))), 2); try self.asmCmovccRegisterRegister( .z, registerAlias(dst_reg, cmov_abi_size), @@ -6340,15 +6381,16 @@ fn airCtz(self: *Self, inst: Air.Inst.Index) !void { } fn airPopCount(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const result: MCValue = result: { try self.spillEflagsIfOccupied(); const src_ty = self.typeOf(ty_op.operand); - const src_abi_size: u32 = @intCast(src_ty.abiSize(mod)); + const src_abi_size: u32 = @intCast(src_ty.abiSize(pt)); if (src_ty.zigTypeTag(mod) == .Vector or src_abi_size > 16) - return self.fail("TODO implement airPopCount for {}", .{src_ty.fmt(mod)}); + return self.fail("TODO implement airPopCount for {}", .{src_ty.fmt(pt)}); const src_mcv = try self.resolveInst(ty_op.operand); const mat_src_mcv = switch (src_mcv) { @@ -6385,7 +6427,7 @@ fn airPopCount(self: *Self, inst: Air.Inst.Index) !void { else .{ .register = mat_src_mcv.register_pair[0] }, false); const src_info = src_ty.intInfo(mod); - const hi_ty = try mod.intType(src_info.signedness, (src_info.bits - 1) % 64 + 1); + const hi_ty = try pt.intType(src_info.signedness, (src_info.bits - 1) % 64 + 1); try self.genPopCount(tmp_regs[1], hi_ty, if (mat_src_mcv.isMemory()) mat_src_mcv.address().offset(8).deref() else @@ -6403,16 +6445,16 @@ fn genPopCount( src_mcv: MCValue, dst_contains_src: bool, ) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; - const src_abi_size: u32 = @intCast(src_ty.abiSize(mod)); + const src_abi_size: u32 = @intCast(src_ty.abiSize(pt)); if (self.hasFeature(.popcnt)) return self.genBinOpMir( .{ ._, .popcnt }, if (src_abi_size > 1) src_ty else Type.u32, .{ .register = dst_reg }, if (src_abi_size > 1) src_mcv else src: { if (!dst_contains_src) try self.genSetReg(dst_reg, src_ty, src_mcv, .{}); - try self.truncateRegister(try src_ty.toUnsigned(mod), dst_reg); + try self.truncateRegister(try src_ty.toUnsigned(pt), dst_reg); break :src .{ .register = dst_reg }; }, ); @@ -6495,13 +6537,14 @@ fn genByteSwap( src_mcv: MCValue, mem_ok: bool, ) !MCValue { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const has_movbe = self.hasFeature(.movbe); if (src_ty.zigTypeTag(mod) == .Vector) return self.fail( "TODO implement genByteSwap for {}", - .{src_ty.fmt(mod)}, + .{src_ty.fmt(pt)}, ); const src_lock = switch (src_mcv) { @@ -6510,7 +6553,7 @@ fn genByteSwap( }; defer if (src_lock) |lock| self.register_manager.unlockReg(lock); - const abi_size: u32 = @intCast(src_ty.abiSize(mod)); + const abi_size: u32 = @intCast(src_ty.abiSize(pt)); switch (abi_size) { 0 => unreachable, 1 => return if ((mem_ok or src_mcv.isRegister()) and @@ -6658,11 +6701,12 @@ fn genByteSwap( } fn airByteSwap(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const src_ty = self.typeOf(ty_op.operand); - const src_bits: u32 = @intCast(src_ty.bitSize(mod)); + const src_bits: u32 = @intCast(src_ty.bitSize(pt)); const src_mcv = try self.resolveInst(ty_op.operand); const dst_mcv = try self.genByteSwap(inst, src_ty, src_mcv, true); @@ -6674,18 +6718,19 @@ fn airByteSwap(self: *Self, inst: Air.Inst.Index) !void { src_ty, dst_mcv, if (src_bits > 256) Type.u16 else Type.u8, - .{ .immediate = src_ty.abiSize(mod) * 8 - src_bits }, + .{ .immediate = src_ty.abiSize(pt) * 8 - src_bits }, ); return self.finishAir(inst, dst_mcv, .{ ty_op.operand, .none, .none }); } fn airBitReverse(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const src_ty = self.typeOf(ty_op.operand); - const abi_size: u32 = @intCast(src_ty.abiSize(mod)); - const bit_size: u32 = @intCast(src_ty.bitSize(mod)); + const abi_size: u32 = @intCast(src_ty.abiSize(pt)); + const bit_size: u32 = @intCast(src_ty.bitSize(pt)); const src_mcv = try self.resolveInst(ty_op.operand); const dst_mcv = try self.genByteSwap(inst, src_ty, src_mcv, false); @@ -6802,14 +6847,15 @@ fn airBitReverse(self: *Self, inst: Air.Inst.Index) !void { } fn floatSign(self: *Self, inst: Air.Inst.Index, operand: Air.Inst.Ref, ty: Type) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const tag = self.air.instructions.items(.tag)[@intFromEnum(inst)]; const result = result: { const scalar_bits = ty.scalarType(mod).floatBits(self.target.*); if (scalar_bits == 80) { if (ty.zigTypeTag(mod) != .Float) return self.fail("TODO implement floatSign for {}", .{ - ty.fmt(mod), + ty.fmt(pt), }); const src_mcv = try self.resolveInst(operand); @@ -6829,11 +6875,11 @@ fn floatSign(self: *Self, inst: Air.Inst.Index, operand: Air.Inst.Ref, ty: Type) break :result dst_mcv; } - const abi_size: u32 = switch (ty.abiSize(mod)) { + const abi_size: u32 = switch (ty.abiSize(pt)) { 1...16 => 16, 17...32 => 32, else => return self.fail("TODO implement floatSign for {}", .{ - ty.fmt(mod), + ty.fmt(pt), }), }; @@ -6852,14 +6898,14 @@ fn floatSign(self: *Self, inst: Air.Inst.Index, operand: Air.Inst.Ref, ty: Type) const dst_lock = self.register_manager.lockReg(dst_reg); defer if (dst_lock) |lock| self.register_manager.unlockReg(lock); - const vec_ty = try mod.vectorType(.{ + const vec_ty = try pt.vectorType(.{ .len = @divExact(abi_size * 8, scalar_bits), - .child = (try mod.intType(.signed, scalar_bits)).ip_index, + .child = (try pt.intType(.signed, scalar_bits)).ip_index, }); const sign_mcv = try self.genTypedValue(switch (tag) { - .neg => try vec_ty.minInt(mod, vec_ty), - .abs => try vec_ty.maxInt(mod, vec_ty), + .neg => try vec_ty.minInt(pt, vec_ty), + .abs => try vec_ty.maxInt(pt, vec_ty), else => unreachable, }); const sign_mem: Memory = if (sign_mcv.isMemory()) @@ -6891,7 +6937,7 @@ fn floatSign(self: *Self, inst: Air.Inst.Index, operand: Air.Inst.Ref, ty: Type) .abs => .{ .v_pd, .@"and" }, else => unreachable, }, - 80 => return self.fail("TODO implement floatSign for {}", .{ty.fmt(mod)}), + 80 => return self.fail("TODO implement floatSign for {}", .{ty.fmt(pt)}), else => unreachable, }, registerAlias(dst_reg, abi_size), @@ -6917,7 +6963,7 @@ fn floatSign(self: *Self, inst: Air.Inst.Index, operand: Air.Inst.Ref, ty: Type) .abs => .{ ._pd, .@"and" }, else => unreachable, }, - 80 => return self.fail("TODO implement floatSign for {}", .{ty.fmt(mod)}), + 80 => return self.fail("TODO implement floatSign for {}", .{ty.fmt(pt)}), else => unreachable, }, registerAlias(dst_reg, abi_size), @@ -6978,7 +7024,8 @@ fn airRound(self: *Self, inst: Air.Inst.Index, mode: RoundMode) !void { } fn getRoundTag(self: *Self, ty: Type) ?Mir.Inst.FixedTag { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; return if (self.hasFeature(.sse4_1)) switch (ty.zigTypeTag(mod)) { .Float => switch (ty.floatBits(self.target.*)) { 32 => if (self.hasFeature(.avx)) .{ .v_ss, .round } else .{ ._ss, .round }, @@ -7010,11 +7057,12 @@ fn getRoundTag(self: *Self, ty: Type) ?Mir.Inst.FixedTag { } fn genRoundLibcall(self: *Self, ty: Type, src_mcv: MCValue, mode: RoundMode) !MCValue { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; if (self.getRoundTag(ty)) |_| return .none; if (ty.zigTypeTag(mod) != .Float) - return self.fail("TODO implement genRound for {}", .{ty.fmt(mod)}); + return self.fail("TODO implement genRound for {}", .{ty.fmt(pt)}); var callee_buf: ["__trunc?".len]u8 = undefined; return try self.genCall(.{ .lib = .{ @@ -7034,12 +7082,12 @@ fn genRoundLibcall(self: *Self, ty: Type, src_mcv: MCValue, mode: RoundMode) !MC } fn genRound(self: *Self, ty: Type, dst_reg: Register, src_mcv: MCValue, mode: RoundMode) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; const mir_tag = self.getRoundTag(ty) orelse { const result = try self.genRoundLibcall(ty, src_mcv, mode); return self.genSetReg(dst_reg, ty, result, .{}); }; - const abi_size: u32 = @intCast(ty.abiSize(mod)); + const abi_size: u32 = @intCast(ty.abiSize(pt)); const dst_alias = registerAlias(dst_reg, abi_size); switch (mir_tag[0]) { .v_ss, .v_sd => if (src_mcv.isMemory()) try self.asmRegisterRegisterMemoryImmediate( @@ -7076,14 +7124,15 @@ fn genRound(self: *Self, ty: Type, dst_reg: Register, src_mcv: MCValue, mode: Ro } fn airAbs(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const ty = self.typeOf(ty_op.operand); const result: MCValue = result: { const mir_tag = @as(?Mir.Inst.FixedTag, switch (ty.zigTypeTag(mod)) { else => null, - .Int => switch (ty.abiSize(mod)) { + .Int => switch (ty.abiSize(pt)) { 0 => unreachable, 1...8 => { try self.spillEflagsIfOccupied(); @@ -7092,7 +7141,7 @@ fn airAbs(self: *Self, inst: Air.Inst.Index) !void { try self.genUnOpMir(.{ ._, .neg }, ty, dst_mcv); - const cmov_abi_size = @max(@as(u32, @intCast(ty.abiSize(mod))), 2); + const cmov_abi_size = @max(@as(u32, @intCast(ty.abiSize(pt))), 2); switch (src_mcv) { .register => |val_reg| try self.asmCmovccRegisterRegister( .l, @@ -7151,7 +7200,7 @@ fn airAbs(self: *Self, inst: Air.Inst.Index) !void { break :result dst_mcv; }, else => { - const abi_size: u31 = @intCast(ty.abiSize(mod)); + const abi_size: u31 = @intCast(ty.abiSize(pt)); const limb_len = math.divCeil(u31, abi_size, 8) catch unreachable; const tmp_regs = @@ -7249,9 +7298,9 @@ fn airAbs(self: *Self, inst: Air.Inst.Index) !void { }, .Float => return self.floatSign(inst, ty_op.operand, ty), }, - }) orelse return self.fail("TODO implement airAbs for {}", .{ty.fmt(mod)}); + }) orelse return self.fail("TODO implement airAbs for {}", .{ty.fmt(pt)}); - const abi_size: u32 = @intCast(ty.abiSize(mod)); + const abi_size: u32 = @intCast(ty.abiSize(pt)); const src_mcv = try self.resolveInst(ty_op.operand); const dst_reg = if (src_mcv.isRegister() and self.reuseOperand(inst, ty_op.operand, 0, src_mcv)) src_mcv.getReg().? @@ -7276,10 +7325,11 @@ fn airAbs(self: *Self, inst: Air.Inst.Index) !void { } fn airSqrt(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const un_op = self.air.instructions.items(.data)[@intFromEnum(inst)].un_op; const ty = self.typeOf(un_op); - const abi_size: u32 = @intCast(ty.abiSize(mod)); + const abi_size: u32 = @intCast(ty.abiSize(pt)); const result: MCValue = result: { switch (ty.zigTypeTag(mod)) { @@ -7408,7 +7458,7 @@ fn airSqrt(self: *Self, inst: Air.Inst.Index) !void { }, else => unreachable, }) orelse return self.fail("TODO implement airSqrt for {}", .{ - ty.fmt(mod), + ty.fmt(pt), }); switch (mir_tag[0]) { .v_ss, .v_sd => if (src_mcv.isMemory()) try self.asmRegisterRegisterMemory( @@ -7521,14 +7571,15 @@ fn reuseOperandAdvanced( } fn packedLoad(self: *Self, dst_mcv: MCValue, ptr_ty: Type, ptr_mcv: MCValue) InnerError!void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ptr_info = ptr_ty.ptrInfo(mod); const val_ty = Type.fromInterned(ptr_info.child); - if (!val_ty.hasRuntimeBitsIgnoreComptime(mod)) return; - const val_abi_size: u32 = @intCast(val_ty.abiSize(mod)); + if (!val_ty.hasRuntimeBitsIgnoreComptime(pt)) return; + const val_abi_size: u32 = @intCast(val_ty.abiSize(pt)); - const val_bit_size: u32 = @intCast(val_ty.bitSize(mod)); + const val_bit_size: u32 = @intCast(val_ty.bitSize(pt)); const ptr_bit_off = ptr_info.packed_offset.bit_offset + switch (ptr_info.flags.vector_index) { .none => 0, .runtime => unreachable, @@ -7566,7 +7617,7 @@ fn packedLoad(self: *Self, dst_mcv: MCValue, ptr_ty: Type, ptr_mcv: MCValue) Inn return; } - if (val_abi_size > 8) return self.fail("TODO implement packed load of {}", .{val_ty.fmt(mod)}); + if (val_abi_size > 8) return self.fail("TODO implement packed load of {}", .{val_ty.fmt(pt)}); const limb_abi_size: u31 = @min(val_abi_size, 8); const limb_abi_bits = limb_abi_size * 8; @@ -7633,9 +7684,10 @@ fn packedLoad(self: *Self, dst_mcv: MCValue, ptr_ty: Type, ptr_mcv: MCValue) Inn } fn load(self: *Self, dst_mcv: MCValue, ptr_ty: Type, ptr_mcv: MCValue) InnerError!void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const dst_ty = ptr_ty.childType(mod); - if (!dst_ty.hasRuntimeBitsIgnoreComptime(mod)) return; + if (!dst_ty.hasRuntimeBitsIgnoreComptime(pt)) return; switch (ptr_mcv) { .none, .unreach, @@ -7675,18 +7727,19 @@ fn load(self: *Self, dst_mcv: MCValue, ptr_ty: Type, ptr_mcv: MCValue) InnerErro } fn airLoad(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const elem_ty = self.typeOfIndex(inst); const result: MCValue = result: { - if (!elem_ty.hasRuntimeBitsIgnoreComptime(mod)) break :result .none; + if (!elem_ty.hasRuntimeBitsIgnoreComptime(pt)) break :result .none; try self.spillRegisters(&.{ .rdi, .rsi, .rcx }); const reg_locks = self.register_manager.lockRegsAssumeUnused(3, .{ .rdi, .rsi, .rcx }); defer for (reg_locks) |lock| self.register_manager.unlockReg(lock); const ptr_ty = self.typeOf(ty_op.operand); - const elem_size = elem_ty.abiSize(mod); + const elem_size = elem_ty.abiSize(pt); const elem_rc = self.regClassForType(elem_ty); const ptr_rc = self.regClassForType(ptr_ty); @@ -7706,7 +7759,7 @@ fn airLoad(self: *Self, inst: Air.Inst.Index) !void { try self.load(dst_mcv, ptr_ty, ptr_mcv); } - if (elem_ty.isAbiInt(mod) and elem_size * 8 > elem_ty.bitSize(mod)) { + if (elem_ty.isAbiInt(mod) and elem_size * 8 > elem_ty.bitSize(pt)) { const high_mcv: MCValue = switch (dst_mcv) { .register => |dst_reg| .{ .register = dst_reg }, .register_pair => |dst_regs| .{ .register = dst_regs[1] }, @@ -7733,16 +7786,17 @@ fn airLoad(self: *Self, inst: Air.Inst.Index) !void { } fn packedStore(self: *Self, ptr_ty: Type, ptr_mcv: MCValue, src_mcv: MCValue) InnerError!void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ptr_info = ptr_ty.ptrInfo(mod); const src_ty = Type.fromInterned(ptr_info.child); - if (!src_ty.hasRuntimeBitsIgnoreComptime(mod)) return; + if (!src_ty.hasRuntimeBitsIgnoreComptime(pt)) return; const limb_abi_size: u16 = @min(ptr_info.packed_offset.host_size, 8); const limb_abi_bits = limb_abi_size * 8; - const limb_ty = try mod.intType(.unsigned, limb_abi_bits); + const limb_ty = try pt.intType(.unsigned, limb_abi_bits); - const src_bit_size = src_ty.bitSize(mod); + const src_bit_size = src_ty.bitSize(pt); const ptr_bit_off = ptr_info.packed_offset.bit_offset + switch (ptr_info.flags.vector_index) { .none => 0, .runtime => unreachable, @@ -7827,7 +7881,7 @@ fn packedStore(self: *Self, ptr_ty: Type, ptr_mcv: MCValue, src_mcv: MCValue) In limb_mem, registerAlias(tmp_reg, limb_abi_size), ); - } else return self.fail("TODO: implement packed store of {}", .{src_ty.fmt(mod)}); + } else return self.fail("TODO: implement packed store of {}", .{src_ty.fmt(pt)}); } } @@ -7838,9 +7892,10 @@ fn store( src_mcv: MCValue, opts: CopyOptions, ) InnerError!void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const src_ty = ptr_ty.childType(mod); - if (!src_ty.hasRuntimeBitsIgnoreComptime(mod)) return; + if (!src_ty.hasRuntimeBitsIgnoreComptime(pt)) return; switch (ptr_mcv) { .none, .unreach, @@ -7880,7 +7935,8 @@ fn store( } fn airStore(self: *Self, inst: Air.Inst.Index, safety: bool) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const bin_op = self.air.instructions.items(.data)[@intFromEnum(inst)].bin_op; result: { @@ -7918,15 +7974,16 @@ fn airStructFieldPtrIndex(self: *Self, inst: Air.Inst.Index, index: u8) !void { } fn fieldPtr(self: *Self, inst: Air.Inst.Index, operand: Air.Inst.Ref, index: u32) !MCValue { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ptr_field_ty = self.typeOfIndex(inst); const ptr_container_ty = self.typeOf(operand); const container_ty = ptr_container_ty.childType(mod); const field_off: i32 = switch (container_ty.containerLayout(mod)) { - .auto, .@"extern" => @intCast(container_ty.structFieldOffset(index, mod)), + .auto, .@"extern" => @intCast(container_ty.structFieldOffset(index, pt)), .@"packed" => @divExact(@as(i32, ptr_container_ty.ptrInfo(mod).packed_offset.bit_offset) + - (if (mod.typeToStruct(container_ty)) |struct_obj| mod.structPackedFieldBitOffset(struct_obj, index) else 0) - + (if (mod.typeToStruct(container_ty)) |struct_obj| pt.structPackedFieldBitOffset(struct_obj, index) else 0) - ptr_field_ty.ptrInfo(mod).packed_offset.bit_offset, 8), }; @@ -7940,7 +7997,8 @@ fn fieldPtr(self: *Self, inst: Air.Inst.Index, operand: Air.Inst.Ref, index: u32 } fn airStructFieldVal(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_pl = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_pl; const extra = self.air.extraData(Air.StructField, ty_pl.payload).data; const result: MCValue = result: { @@ -7950,14 +8008,14 @@ fn airStructFieldVal(self: *Self, inst: Air.Inst.Index) !void { const container_ty = self.typeOf(operand); const container_rc = self.regClassForType(container_ty); const field_ty = container_ty.structFieldType(index, mod); - if (!field_ty.hasRuntimeBitsIgnoreComptime(mod)) break :result .none; + if (!field_ty.hasRuntimeBitsIgnoreComptime(pt)) break :result .none; const field_rc = self.regClassForType(field_ty); const field_is_gp = field_rc.supersetOf(abi.RegisterClass.gp); const src_mcv = try self.resolveInst(operand); const field_off: u32 = switch (container_ty.containerLayout(mod)) { - .auto, .@"extern" => @intCast(container_ty.structFieldOffset(extra.field_index, mod) * 8), - .@"packed" => if (mod.typeToStruct(container_ty)) |struct_obj| mod.structPackedFieldBitOffset(struct_obj, extra.field_index) else 0, + .auto, .@"extern" => @intCast(container_ty.structFieldOffset(extra.field_index, pt) * 8), + .@"packed" => if (mod.typeToStruct(container_ty)) |struct_obj| pt.structPackedFieldBitOffset(struct_obj, extra.field_index) else 0, }; switch (src_mcv) { @@ -7988,7 +8046,7 @@ fn airStructFieldVal(self: *Self, inst: Air.Inst.Index) !void { ); } if (abi.RegisterClass.gp.isSet(RegisterManager.indexOfRegIntoTracked(dst_reg).?) and - container_ty.abiSize(mod) * 8 > field_ty.bitSize(mod)) + container_ty.abiSize(pt) * 8 > field_ty.bitSize(pt)) try self.truncateRegister(field_ty, dst_reg); break :result if (field_off == 0 or field_rc.supersetOf(abi.RegisterClass.gp)) @@ -8000,7 +8058,7 @@ fn airStructFieldVal(self: *Self, inst: Air.Inst.Index) !void { const src_regs_lock = self.register_manager.lockRegsAssumeUnused(2, src_regs); defer for (src_regs_lock) |lock| self.register_manager.unlockReg(lock); - const field_bit_size: u32 = @intCast(field_ty.bitSize(mod)); + const field_bit_size: u32 = @intCast(field_ty.bitSize(pt)); const src_reg = if (field_off + field_bit_size <= 64) src_regs[0] else if (field_off >= 64) @@ -8044,7 +8102,7 @@ fn airStructFieldVal(self: *Self, inst: Air.Inst.Index) !void { } if (field_bit_size < 128) try self.truncateRegister( - try mod.intType(.unsigned, @intCast(field_bit_size - 64)), + try pt.intType(.unsigned, @intCast(field_bit_size - 64)), dst_regs[1], ); break :result if (field_rc.supersetOf(abi.RegisterClass.gp)) @@ -8099,14 +8157,14 @@ fn airStructFieldVal(self: *Self, inst: Air.Inst.Index) !void { } }, .load_frame => |frame_addr| { - const field_abi_size: u32 = @intCast(field_ty.abiSize(mod)); + const field_abi_size: u32 = @intCast(field_ty.abiSize(pt)); if (field_off % 8 == 0) { const field_byte_off = @divExact(field_off, 8); const off_mcv = src_mcv.address().offset(@intCast(field_byte_off)).deref(); - const field_bit_size = field_ty.bitSize(mod); + const field_bit_size = field_ty.bitSize(pt); if (field_abi_size <= 8) { - const int_ty = try mod.intType( + const int_ty = try pt.intType( if (field_ty.isAbiInt(mod)) field_ty.intInfo(mod).signedness else .unsigned, @intCast(field_bit_size), ); @@ -8127,7 +8185,7 @@ fn airStructFieldVal(self: *Self, inst: Air.Inst.Index) !void { try self.copyToRegisterWithInstTracking(inst, field_ty, dst_mcv); } - const container_abi_size: u32 = @intCast(container_ty.abiSize(mod)); + const container_abi_size: u32 = @intCast(container_ty.abiSize(pt)); const dst_mcv = if (field_byte_off + field_abi_size <= container_abi_size and self.reuseOperand(inst, operand, 0, src_mcv)) off_mcv @@ -8228,16 +8286,17 @@ fn airStructFieldVal(self: *Self, inst: Air.Inst.Index) !void { } fn airFieldParentPtr(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_pl = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_pl; const extra = self.air.extraData(Air.FieldParentPtr, ty_pl.payload).data; const inst_ty = self.typeOfIndex(inst); const parent_ty = inst_ty.childType(mod); const field_off: i32 = switch (parent_ty.containerLayout(mod)) { - .auto, .@"extern" => @intCast(parent_ty.structFieldOffset(extra.field_index, mod)), + .auto, .@"extern" => @intCast(parent_ty.structFieldOffset(extra.field_index, pt)), .@"packed" => @divExact(@as(i32, inst_ty.ptrInfo(mod).packed_offset.bit_offset) + - (if (mod.typeToStruct(parent_ty)) |struct_obj| mod.structPackedFieldBitOffset(struct_obj, extra.field_index) else 0) - + (if (mod.typeToStruct(parent_ty)) |struct_obj| pt.structPackedFieldBitOffset(struct_obj, extra.field_index) else 0) - self.typeOf(extra.field_ptr).ptrInfo(mod).packed_offset.bit_offset, 8), }; @@ -8252,10 +8311,11 @@ fn airFieldParentPtr(self: *Self, inst: Air.Inst.Index) !void { } fn genUnOp(self: *Self, maybe_inst: ?Air.Inst.Index, tag: Air.Inst.Tag, src_air: Air.Inst.Ref) !MCValue { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const src_ty = self.typeOf(src_air); if (src_ty.zigTypeTag(mod) == .Vector) - return self.fail("TODO implement genUnOp for {}", .{src_ty.fmt(mod)}); + return self.fail("TODO implement genUnOp for {}", .{src_ty.fmt(pt)}); var src_mcv = try self.resolveInst(src_air); switch (src_mcv) { @@ -8290,7 +8350,7 @@ fn genUnOp(self: *Self, maybe_inst: ?Air.Inst.Index, tag: Air.Inst.Tag, src_air: }; defer if (dst_lock) |lock| self.register_manager.unlockReg(lock); - const abi_size: u16 = @intCast(src_ty.abiSize(mod)); + const abi_size: u16 = @intCast(src_ty.abiSize(pt)); switch (tag) { .not => { const limb_abi_size: u16 = @min(abi_size, 8); @@ -8304,7 +8364,7 @@ fn genUnOp(self: *Self, maybe_inst: ?Air.Inst.Index, tag: Air.Inst.Tag, src_air: .signed => abi_size * 8, .unsigned => int_info.bits, } - byte_off * 8, limb_abi_size * 8)); - const limb_ty = try mod.intType(int_info.signedness, limb_bits); + const limb_ty = try pt.intType(int_info.signedness, limb_bits); const limb_mcv = switch (byte_off) { 0 => dst_mcv, else => dst_mcv.address().offset(byte_off).deref(), @@ -8340,9 +8400,9 @@ fn genUnOp(self: *Self, maybe_inst: ?Air.Inst.Index, tag: Air.Inst.Tag, src_air: } fn genUnOpMir(self: *Self, mir_tag: Mir.Inst.FixedTag, dst_ty: Type, dst_mcv: MCValue) !void { - const mod = self.bin_file.comp.module.?; - const abi_size: u32 = @intCast(dst_ty.abiSize(mod)); - if (abi_size > 8) return self.fail("TODO implement {} for {}", .{ mir_tag, dst_ty.fmt(mod) }); + const pt = self.pt; + const abi_size: u32 = @intCast(dst_ty.abiSize(pt)); + if (abi_size > 8) return self.fail("TODO implement {} for {}", .{ mir_tag, dst_ty.fmt(pt) }); switch (dst_mcv) { .none, .unreach, @@ -8389,9 +8449,9 @@ fn genShiftBinOpMir( rhs_ty: Type, rhs_mcv: MCValue, ) !void { - const mod = self.bin_file.comp.module.?; - const abi_size: u32 = @intCast(lhs_ty.abiSize(mod)); - const shift_abi_size: u32 = @intCast(rhs_ty.abiSize(mod)); + const pt = self.pt; + const abi_size: u32 = @intCast(lhs_ty.abiSize(pt)); + const shift_abi_size: u32 = @intCast(rhs_ty.abiSize(pt)); try self.spillEflagsIfOccupied(); if (abi_size > 16) { @@ -9046,9 +9106,10 @@ fn genShiftBinOp( lhs_ty: Type, rhs_ty: Type, ) !MCValue { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; if (lhs_ty.zigTypeTag(mod) == .Vector) return self.fail("TODO implement genShiftBinOp for {}", .{ - lhs_ty.fmt(mod), + lhs_ty.fmt(pt), }); try self.register_manager.getKnownReg(.rcx, null); @@ -9104,13 +9165,14 @@ fn genMulDivBinOp( lhs_mcv: MCValue, rhs_mcv: MCValue, ) !MCValue { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; if (dst_ty.zigTypeTag(mod) == .Vector or dst_ty.zigTypeTag(mod) == .Float) return self.fail( "TODO implement genMulDivBinOp for {s} from {} to {}", - .{ @tagName(tag), src_ty.fmt(mod), dst_ty.fmt(mod) }, + .{ @tagName(tag), src_ty.fmt(pt), dst_ty.fmt(pt) }, ); - const dst_abi_size: u32 = @intCast(dst_ty.abiSize(mod)); - const src_abi_size: u32 = @intCast(src_ty.abiSize(mod)); + const dst_abi_size: u32 = @intCast(dst_ty.abiSize(pt)); + const src_abi_size: u32 = @intCast(src_ty.abiSize(pt)); assert(self.register_manager.isRegFree(.rax)); assert(self.register_manager.isRegFree(.rcx)); @@ -9299,13 +9361,13 @@ fn genMulDivBinOp( .signed => {}, .unsigned => { const dst_mcv = try self.allocRegOrMemAdvanced(dst_ty, maybe_inst, false); - const manyptr_u32_ty = try mod.ptrType(.{ + const manyptr_u32_ty = try pt.ptrType(.{ .child = .u32_type, .flags = .{ .size = .Many, }, }); - const manyptr_const_u32_ty = try mod.ptrType(.{ + const manyptr_const_u32_ty = try pt.ptrType(.{ .child = .u32_type, .flags = .{ .size = .Many, @@ -9348,7 +9410,7 @@ fn genMulDivBinOp( } return self.fail( "TODO implement genMulDivBinOp for {s} from {} to {}", - .{ @tagName(tag), src_ty.fmt(mod), dst_ty.fmt(mod) }, + .{ @tagName(tag), src_ty.fmt(pt), dst_ty.fmt(pt) }, ); } const ty = if (dst_abi_size <= 8) dst_ty else src_ty; @@ -9515,10 +9577,11 @@ fn genBinOp( lhs_air: Air.Inst.Ref, rhs_air: Air.Inst.Ref, ) !MCValue { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const lhs_ty = self.typeOf(lhs_air); const rhs_ty = self.typeOf(rhs_air); - const abi_size: u32 = @intCast(lhs_ty.abiSize(mod)); + const abi_size: u32 = @intCast(lhs_ty.abiSize(pt)); if (lhs_ty.isRuntimeFloat()) libcall: { const float_bits = lhs_ty.floatBits(self.target.*); @@ -9556,7 +9619,7 @@ fn genBinOp( floatLibcAbiSuffix(lhs_ty), }), else => return self.fail("TODO implement genBinOp for {s} {}", .{ - @tagName(air_tag), lhs_ty.fmt(mod), + @tagName(air_tag), lhs_ty.fmt(pt), }), } catch unreachable; const result = try self.genCall(.{ .lib = .{ @@ -9668,7 +9731,7 @@ fn genBinOp( break :adjusted .{ .register = dst_reg }; }, 80, 128 => return self.fail("TODO implement genBinOp for {s} of {}", .{ - @tagName(air_tag), lhs_ty.fmt(mod), + @tagName(air_tag), lhs_ty.fmt(pt), }), else => unreachable, }; @@ -9700,8 +9763,8 @@ fn genBinOp( }; if (sse_op and ((lhs_ty.scalarType(mod).isRuntimeFloat() and lhs_ty.scalarType(mod).floatBits(self.target.*) == 80) or - lhs_ty.abiSize(mod) > @as(u6, if (self.hasFeature(.avx)) 32 else 16))) - return self.fail("TODO implement genBinOp for {s} {}", .{ @tagName(air_tag), lhs_ty.fmt(mod) }); + lhs_ty.abiSize(pt) > @as(u6, if (self.hasFeature(.avx)) 32 else 16))) + return self.fail("TODO implement genBinOp for {s} {}", .{ @tagName(air_tag), lhs_ty.fmt(pt) }); const maybe_mask_reg = switch (air_tag) { else => null, @@ -9857,7 +9920,7 @@ fn genBinOp( const tmp_lock = self.register_manager.lockRegAssumeUnused(tmp_reg); defer self.register_manager.unlockReg(tmp_lock); - const elem_size = lhs_ty.elemType2(mod).abiSize(mod); + const elem_size = lhs_ty.elemType2(mod).abiSize(pt); try self.genIntMulComplexOpMir(rhs_ty, tmp_mcv, .{ .immediate = elem_size }); try self.genBinOpMir( switch (air_tag) { @@ -10003,7 +10066,7 @@ fn genBinOp( }, }; - const cmov_abi_size = @max(@as(u32, @intCast(lhs_ty.abiSize(mod))), 2); + const cmov_abi_size = @max(@as(u32, @intCast(lhs_ty.abiSize(pt))), 2); const tmp_reg = switch (dst_mcv) { .register => |reg| reg, else => try self.copyToTmpRegister(lhs_ty, dst_mcv), @@ -10082,7 +10145,7 @@ fn genBinOp( }, else => return self.fail("TODO implement genBinOp for {s} {}", .{ - @tagName(air_tag), lhs_ty.fmt(mod), + @tagName(air_tag), lhs_ty.fmt(pt), }), } return dst_mcv; @@ -10835,7 +10898,7 @@ fn genBinOp( }, }, }) orelse return self.fail("TODO implement genBinOp for {s} {}", .{ - @tagName(air_tag), lhs_ty.fmt(mod), + @tagName(air_tag), lhs_ty.fmt(pt), }); const lhs_copy_reg = if (maybe_mask_reg) |_| registerAlias( @@ -10978,7 +11041,7 @@ fn genBinOp( }, else => unreachable, }) orelse return self.fail("TODO implement genBinOp for {s} {}", .{ - @tagName(air_tag), lhs_ty.fmt(mod), + @tagName(air_tag), lhs_ty.fmt(pt), }), mask_reg, rhs_copy_reg, @@ -11010,7 +11073,7 @@ fn genBinOp( }, else => unreachable, }) orelse return self.fail("TODO implement genBinOp for {s} {}", .{ - @tagName(air_tag), lhs_ty.fmt(mod), + @tagName(air_tag), lhs_ty.fmt(pt), }), dst_reg, dst_reg, @@ -11046,7 +11109,7 @@ fn genBinOp( }, else => unreachable, }) orelse return self.fail("TODO implement genBinOp for {s} {}", .{ - @tagName(air_tag), lhs_ty.fmt(mod), + @tagName(air_tag), lhs_ty.fmt(pt), }), mask_reg, mask_reg, @@ -11077,7 +11140,7 @@ fn genBinOp( }, else => unreachable, }) orelse return self.fail("TODO implement genBinOp for {s} {}", .{ - @tagName(air_tag), lhs_ty.fmt(mod), + @tagName(air_tag), lhs_ty.fmt(pt), }), dst_reg, lhs_copy_reg.?, @@ -11107,7 +11170,7 @@ fn genBinOp( }, else => unreachable, }) orelse return self.fail("TODO implement genBinOp for {s} {}", .{ - @tagName(air_tag), lhs_ty.fmt(mod), + @tagName(air_tag), lhs_ty.fmt(pt), }); try self.asmRegisterRegister(.{ mir_fixes, .@"and" }, dst_reg, mask_reg); try self.asmRegisterRegister(.{ mir_fixes, .andn }, mask_reg, lhs_copy_reg.?); @@ -11125,8 +11188,8 @@ fn genBinOp( .cmp_gte, .cmp_neq, => { - const unsigned_ty = try lhs_ty.toUnsigned(mod); - const not_mcv = try self.genTypedValue(try unsigned_ty.maxInt(mod, unsigned_ty)); + const unsigned_ty = try lhs_ty.toUnsigned(pt); + const not_mcv = try self.genTypedValue(try unsigned_ty.maxInt(pt, unsigned_ty)); const not_mem: Memory = if (not_mcv.isMemory()) try not_mcv.mem(self, Memory.Size.fromSize(abi_size)) else @@ -11195,8 +11258,9 @@ fn genBinOpMir( dst_mcv: MCValue, src_mcv: MCValue, ) !void { - const mod = self.bin_file.comp.module.?; - const abi_size: u32 = @intCast(ty.abiSize(mod)); + const pt = self.pt; + const mod = pt.zcu; + const abi_size: u32 = @intCast(ty.abiSize(pt)); try self.spillEflagsIfOccupied(); switch (dst_mcv) { .none, @@ -11358,7 +11422,7 @@ fn genBinOpMir( .load_got, .load_tlv, => { - const ptr_ty = try mod.singleConstPtrType(ty); + const ptr_ty = try pt.singleConstPtrType(ty); const addr_reg = try self.copyToTmpRegister(ptr_ty, src_mcv.address()); return self.genBinOpMir(mir_limb_tag, ty, dst_mcv, .{ .indirect = .{ .reg = addr_reg, .off = off }, @@ -11619,8 +11683,8 @@ fn genBinOpMir( /// Performs multi-operand integer multiplication between dst_mcv and src_mcv, storing the result in dst_mcv. /// Does not support byte-size operands. fn genIntMulComplexOpMir(self: *Self, dst_ty: Type, dst_mcv: MCValue, src_mcv: MCValue) InnerError!void { - const mod = self.bin_file.comp.module.?; - const abi_size: u32 = @intCast(dst_ty.abiSize(mod)); + const pt = self.pt; + const abi_size: u32 = @intCast(dst_ty.abiSize(pt)); try self.spillEflagsIfOccupied(); switch (dst_mcv) { .none, @@ -11746,7 +11810,8 @@ fn genIntMulComplexOpMir(self: *Self, dst_ty: Type, dst_mcv: MCValue, src_mcv: M } fn airArg(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; // skip zero-bit arguments as they don't have a corresponding arg instruction var arg_index = self.arg_index; while (self.args[arg_index] == .none) arg_index += 1; @@ -11808,7 +11873,7 @@ fn airArg(self: *Self, inst: Air.Inst.Index) !void { try self.genInlineMemset( dst_mcv.address().offset(@intFromBool(regs_frame_addr.regs > 0)), .{ .immediate = 0 }, - .{ .immediate = arg_ty.abiSize(mod) - @intFromBool(regs_frame_addr.regs > 0) }, + .{ .immediate = arg_ty.abiSize(pt) - @intFromBool(regs_frame_addr.regs > 0) }, .{}, ); @@ -11865,7 +11930,8 @@ fn airArg(self: *Self, inst: Air.Inst.Index) !void { } fn genArgDbgInfo(self: Self, ty: Type, name: [:0]const u8, mcv: MCValue) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; switch (self.debug_output) { .dwarf => |dw| { const loc: link.File.Dwarf.DeclState.DbgInfoLoc = switch (mcv) { @@ -11901,7 +11967,8 @@ fn genVarDbgInfo( mcv: MCValue, name: [:0]const u8, ) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const is_ptr = switch (tag) { .dbg_var_ptr => true, .dbg_var_val => false, @@ -12020,7 +12087,8 @@ fn genCall(self: *Self, info: union(enum) { callee: []const u8, }, }, arg_types: []const Type, args: []const MCValue) !MCValue { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const fn_ty = switch (info) { .air => |callee| fn_info: { @@ -12031,7 +12099,7 @@ fn genCall(self: *Self, info: union(enum) { else => unreachable, }; }, - .lib => |lib| try mod.funcType(.{ + .lib => |lib| try pt.funcType(.{ .param_types = lib.param_types, .return_type = lib.return_type, .cc = .C, @@ -12101,7 +12169,7 @@ fn genCall(self: *Self, info: union(enum) { try reg_locks.appendSlice(&self.register_manager.lockRegs(2, regs)); }, .indirect => |reg_off| { - frame_index.* = try self.allocFrameIndex(FrameAlloc.initType(arg_ty, mod)); + frame_index.* = try self.allocFrameIndex(FrameAlloc.initType(arg_ty, pt)); try self.genSetMem(.{ .frame = frame_index.* }, 0, arg_ty, src_arg, .{}); try self.register_manager.getReg(reg_off.reg, null); try reg_locks.append(self.register_manager.lockReg(reg_off.reg)); @@ -12173,7 +12241,7 @@ fn genCall(self: *Self, info: union(enum) { .none, .unreach => {}, .indirect => |reg_off| { const ret_ty = Type.fromInterned(fn_info.return_type); - const frame_index = try self.allocFrameIndex(FrameAlloc.initSpill(ret_ty, mod)); + const frame_index = try self.allocFrameIndex(FrameAlloc.initSpill(ret_ty, pt)); try self.genSetReg(reg_off.reg, Type.usize, .{ .lea_frame = .{ .index = frame_index, .off = -reg_off.off }, }, .{}); @@ -12188,14 +12256,14 @@ fn genCall(self: *Self, info: union(enum) { .none, .load_frame => {}, .register => |dst_reg| switch (fn_info.cc) { else => try self.genSetReg( - registerAlias(dst_reg, @intCast(arg_ty.abiSize(mod))), + registerAlias(dst_reg, @intCast(arg_ty.abiSize(pt))), arg_ty, src_arg, .{}, ), .C, .SysV, .Win64 => { const promoted_ty = self.promoteInt(arg_ty); - const promoted_abi_size: u32 = @intCast(promoted_ty.abiSize(mod)); + const promoted_abi_size: u32 = @intCast(promoted_ty.abiSize(pt)); const dst_alias = registerAlias(dst_reg, promoted_abi_size); try self.genSetReg(dst_alias, promoted_ty, src_arg, .{}); if (promoted_ty.toIntern() != arg_ty.toIntern()) @@ -12246,7 +12314,7 @@ fn genCall(self: *Self, info: union(enum) { // Due to incremental compilation, how function calls are generated depends // on linking. switch (info) { - .air => |callee| if (try self.air.value(callee, mod)) |func_value| { + .air => |callee| if (try self.air.value(callee, pt)) |func_value| { const func_key = mod.intern_pool.indexToKey(func_value.ip_index); switch (switch (func_key) { else => func_key, @@ -12332,7 +12400,8 @@ fn genCall(self: *Self, info: union(enum) { } fn airRet(self: *Self, inst: Air.Inst.Index, safety: bool) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const un_op = self.air.instructions.items(.data)[@intFromEnum(inst)].un_op; const ret_ty = self.fn_type.fnReturnType(mod); @@ -12387,7 +12456,8 @@ fn airRetLoad(self: *Self, inst: Air.Inst.Index) !void { } fn airCmp(self: *Self, inst: Air.Inst.Index, op: math.CompareOperator) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const bin_op = self.air.instructions.items(.data)[@intFromEnum(inst)].bin_op; var ty = self.typeOf(bin_op.lhs); var null_compare: ?Mir.Inst.Index = null; @@ -12457,9 +12527,9 @@ fn airCmp(self: *Self, inst: Air.Inst.Index, op: math.CompareOperator) !void { }, .Optional => if (!ty.optionalReprIsPayload(mod)) { const opt_ty = ty; - const opt_abi_size: u31 = @intCast(opt_ty.abiSize(mod)); + const opt_abi_size: u31 = @intCast(opt_ty.abiSize(pt)); ty = opt_ty.optionalChild(mod); - const payload_abi_size: u31 = @intCast(ty.abiSize(mod)); + const payload_abi_size: u31 = @intCast(ty.abiSize(pt)); const temp_lhs_reg = try self.register_manager.allocReg(null, abi.RegisterClass.gp); const temp_lhs_lock = self.register_manager.lockRegAssumeUnused(temp_lhs_reg); @@ -12518,7 +12588,7 @@ fn airCmp(self: *Self, inst: Air.Inst.Index, op: math.CompareOperator) !void { switch (ty.zigTypeTag(mod)) { else => { - const abi_size: u16 = @intCast(ty.abiSize(mod)); + const abi_size: u16 = @intCast(ty.abiSize(pt)); const may_flip: enum { may_flip, must_flip, @@ -12845,7 +12915,8 @@ fn airCmpVector(self: *Self, inst: Air.Inst.Index) !void { } fn airCmpLtErrorsLen(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const un_op = self.air.instructions.items(.data)[@intFromEnum(inst)].un_op; const addr_reg = try self.register_manager.allocReg(null, abi.RegisterClass.gp); @@ -12856,7 +12927,7 @@ fn airCmpLtErrorsLen(self: *Self, inst: Air.Inst.Index) !void { try self.spillEflagsIfOccupied(); const op_ty = self.typeOf(un_op); - const op_abi_size: u32 = @intCast(op_ty.abiSize(mod)); + const op_abi_size: u32 = @intCast(op_ty.abiSize(pt)); const op_mcv = try self.resolveInst(un_op); const dst_reg = switch (op_mcv) { .register => |reg| reg, @@ -12987,8 +13058,8 @@ fn airDbgVar(self: *Self, inst: Air.Inst.Index) !void { } fn genCondBrMir(self: *Self, ty: Type, mcv: MCValue) !Mir.Inst.Index { - const mod = self.bin_file.comp.module.?; - const abi_size = ty.abiSize(mod); + const pt = self.pt; + const abi_size = ty.abiSize(pt); switch (mcv) { .eflags => |cc| { // Here we map the opposites since the jump is to the false branch. @@ -13060,7 +13131,8 @@ fn airCondBr(self: *Self, inst: Air.Inst.Index) !void { } fn isNull(self: *Self, inst: Air.Inst.Index, opt_ty: Type, opt_mcv: MCValue) !MCValue { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; switch (opt_mcv) { .register_overflow => |ro| return .{ .eflags = ro.eflags.negate() }, else => {}, @@ -13073,7 +13145,7 @@ fn isNull(self: *Self, inst: Air.Inst.Index, opt_ty: Type, opt_mcv: MCValue) !MC const some_info: struct { off: i32, ty: Type } = if (opt_ty.optionalReprIsPayload(mod)) .{ .off = 0, .ty = if (pl_ty.isSlice(mod)) pl_ty.slicePtrFieldType(mod) else pl_ty } else - .{ .off = @intCast(pl_ty.abiSize(mod)), .ty = Type.bool }; + .{ .off = @intCast(pl_ty.abiSize(pt)), .ty = Type.bool }; self.eflags_inst = inst; switch (opt_mcv) { @@ -13098,14 +13170,14 @@ fn isNull(self: *Self, inst: Air.Inst.Index, opt_ty: Type, opt_mcv: MCValue) !MC .register => |opt_reg| { if (some_info.off == 0) { - const some_abi_size: u32 = @intCast(some_info.ty.abiSize(mod)); + const some_abi_size: u32 = @intCast(some_info.ty.abiSize(pt)); const alias_reg = registerAlias(opt_reg, some_abi_size); assert(some_abi_size * 8 == alias_reg.bitSize()); try self.asmRegisterRegister(.{ ._, .@"test" }, alias_reg, alias_reg); return .{ .eflags = .z }; } assert(some_info.ty.ip_index == .bool_type); - const opt_abi_size: u32 = @intCast(opt_ty.abiSize(mod)); + const opt_abi_size: u32 = @intCast(opt_ty.abiSize(pt)); try self.asmRegisterImmediate( .{ ._, .bt }, registerAlias(opt_reg, opt_abi_size), @@ -13125,7 +13197,7 @@ fn isNull(self: *Self, inst: Air.Inst.Index, opt_ty: Type, opt_mcv: MCValue) !MC defer self.register_manager.unlockReg(addr_reg_lock); try self.genSetReg(addr_reg, Type.usize, opt_mcv.address(), .{}); - const some_abi_size: u32 = @intCast(some_info.ty.abiSize(mod)); + const some_abi_size: u32 = @intCast(some_info.ty.abiSize(pt)); try self.asmMemoryImmediate( .{ ._, .cmp }, .{ @@ -13141,7 +13213,7 @@ fn isNull(self: *Self, inst: Air.Inst.Index, opt_ty: Type, opt_mcv: MCValue) !MC }, .indirect, .load_frame => { - const some_abi_size: u32 = @intCast(some_info.ty.abiSize(mod)); + const some_abi_size: u32 = @intCast(some_info.ty.abiSize(pt)); try self.asmMemoryImmediate( .{ ._, .cmp }, switch (opt_mcv) { @@ -13169,7 +13241,8 @@ fn isNull(self: *Self, inst: Air.Inst.Index, opt_ty: Type, opt_mcv: MCValue) !MC } fn isNullPtr(self: *Self, inst: Air.Inst.Index, ptr_ty: Type, ptr_mcv: MCValue) !MCValue { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const opt_ty = ptr_ty.childType(mod); const pl_ty = opt_ty.optionalChild(mod); @@ -13178,7 +13251,7 @@ fn isNullPtr(self: *Self, inst: Air.Inst.Index, ptr_ty: Type, ptr_mcv: MCValue) const some_info: struct { off: i32, ty: Type } = if (opt_ty.optionalReprIsPayload(mod)) .{ .off = 0, .ty = if (pl_ty.isSlice(mod)) pl_ty.slicePtrFieldType(mod) else pl_ty } else - .{ .off = @intCast(pl_ty.abiSize(mod)), .ty = Type.bool }; + .{ .off = @intCast(pl_ty.abiSize(pt)), .ty = Type.bool }; const ptr_reg = switch (ptr_mcv) { .register => |reg| reg, @@ -13187,7 +13260,7 @@ fn isNullPtr(self: *Self, inst: Air.Inst.Index, ptr_ty: Type, ptr_mcv: MCValue) const ptr_lock = self.register_manager.lockReg(ptr_reg); defer if (ptr_lock) |lock| self.register_manager.unlockReg(lock); - const some_abi_size: u32 = @intCast(some_info.ty.abiSize(mod)); + const some_abi_size: u32 = @intCast(some_info.ty.abiSize(pt)); try self.asmMemoryImmediate( .{ ._, .cmp }, .{ @@ -13205,13 +13278,14 @@ fn isNullPtr(self: *Self, inst: Air.Inst.Index, ptr_ty: Type, ptr_mcv: MCValue) } fn isErr(self: *Self, maybe_inst: ?Air.Inst.Index, eu_ty: Type, eu_mcv: MCValue) !MCValue { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const err_ty = eu_ty.errorUnionSet(mod); if (err_ty.errorSetIsEmpty(mod)) return MCValue{ .immediate = 0 }; // always false try self.spillEflagsIfOccupied(); - const err_off: u31 = @intCast(errUnionErrorOffset(eu_ty.errorUnionPayload(mod), mod)); + const err_off: u31 = @intCast(errUnionErrorOffset(eu_ty.errorUnionPayload(mod), pt)); switch (eu_mcv) { .register => |reg| { const eu_lock = self.register_manager.lockReg(reg); @@ -13253,7 +13327,8 @@ fn isErr(self: *Self, maybe_inst: ?Air.Inst.Index, eu_ty: Type, eu_mcv: MCValue) } fn isErrPtr(self: *Self, maybe_inst: ?Air.Inst.Index, ptr_ty: Type, ptr_mcv: MCValue) !MCValue { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const eu_ty = ptr_ty.childType(mod); const err_ty = eu_ty.errorUnionSet(mod); if (err_ty.errorSetIsEmpty(mod)) return MCValue{ .immediate = 0 }; // always false @@ -13267,7 +13342,7 @@ fn isErrPtr(self: *Self, maybe_inst: ?Air.Inst.Index, ptr_ty: Type, ptr_mcv: MCV const ptr_lock = self.register_manager.lockReg(ptr_reg); defer if (ptr_lock) |lock| self.register_manager.unlockReg(lock); - const err_off: u31 = @intCast(errUnionErrorOffset(eu_ty.errorUnionPayload(mod), mod)); + const err_off: u31 = @intCast(errUnionErrorOffset(eu_ty.errorUnionPayload(mod), pt)); try self.asmMemoryImmediate( .{ ._, .cmp }, .{ @@ -13539,12 +13614,12 @@ fn performReloc(self: *Self, reloc: Mir.Inst.Index) void { } fn airBr(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; const br = self.air.instructions.items(.data)[@intFromEnum(inst)].br; const block_ty = self.typeOfIndex(br.block_inst); const block_unused = - !block_ty.hasRuntimeBitsIgnoreComptime(mod) or self.liveness.isUnused(br.block_inst); + !block_ty.hasRuntimeBitsIgnoreComptime(pt) or self.liveness.isUnused(br.block_inst); const block_tracking = self.inst_tracking.getPtr(br.block_inst).?; const block_data = self.blocks.getPtr(br.block_inst).?; const first_br = block_data.relocs.items.len == 0; @@ -13600,7 +13675,8 @@ fn airBr(self: *Self, inst: Air.Inst.Index) !void { } fn airAsm(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_pl = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_pl; const extra = self.air.extraData(Air.Asm, ty_pl.payload); const clobbers_len: u31 = @truncate(extra.data.flags); @@ -13664,7 +13740,7 @@ fn airAsm(self: *Self, inst: Air.Inst.Index) !void { 'x' => abi.RegisterClass.sse, else => unreachable, }) orelse return self.fail("ran out of registers lowering inline asm", .{}), - @intCast(ty.abiSize(mod)), + @intCast(ty.abiSize(pt)), ) else if (mem.eql(u8, rest, "m")) if (output != .none) null else return self.fail( @@ -13734,7 +13810,7 @@ fn airAsm(self: *Self, inst: Air.Inst.Index) !void { break :arg input_mcv; const reg = try self.register_manager.allocReg(null, rc); try self.genSetReg(reg, ty, input_mcv, .{}); - break :arg .{ .register = registerAlias(reg, @intCast(ty.abiSize(mod))) }; + break :arg .{ .register = registerAlias(reg, @intCast(ty.abiSize(pt))) }; } else if (mem.eql(u8, constraint, "i") or mem.eql(u8, constraint, "n")) switch (input_mcv) { .immediate => |imm| .{ .immediate = imm }, @@ -14310,18 +14386,19 @@ const MoveStrategy = union(enum) { } }; fn moveStrategy(self: *Self, ty: Type, class: Register.Class, aligned: bool) !MoveStrategy { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; switch (class) { .general_purpose, .segment => return .{ .move = .{ ._, .mov } }, .x87 => return .x87_load_store, .mmx => {}, .sse => switch (ty.zigTypeTag(mod)) { else => { - const classes = mem.sliceTo(&abi.classifySystemV(ty, mod, self.target.*, .other), .none); + const classes = mem.sliceTo(&abi.classifySystemV(ty, pt, self.target.*, .other), .none); assert(std.mem.indexOfNone(abi.Class, classes, &.{ .integer, .sse, .sseup, .memory, .float, .float_combine, }) == null); - const abi_size = ty.abiSize(mod); + const abi_size = ty.abiSize(pt); if (abi_size < 4 or std.mem.indexOfScalar(abi.Class, classes, .integer) != null) switch (abi_size) { 1 => if (self.hasFeature(.avx)) return .{ .vex_insert_extract = .{ @@ -14532,7 +14609,7 @@ fn moveStrategy(self: *Self, ty: Type, class: Register.Class, aligned: bool) !Mo }, .ip => {}, } - return self.fail("TODO moveStrategy for {}", .{ty.fmt(mod)}); + return self.fail("TODO moveStrategy for {}", .{ty.fmt(pt)}); } const CopyOptions = struct { @@ -14540,7 +14617,7 @@ const CopyOptions = struct { }; fn genCopy(self: *Self, ty: Type, dst_mcv: MCValue, src_mcv: MCValue, opts: CopyOptions) InnerError!void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; const src_lock = if (src_mcv.getReg()) |reg| self.register_manager.lockReg(reg) else null; defer if (src_lock) |lock| self.register_manager.unlockReg(lock); @@ -14601,7 +14678,7 @@ fn genCopy(self: *Self, ty: Type, dst_mcv: MCValue, src_mcv: MCValue, opts: Copy opts, ), else => return self.fail("TODO implement genCopy for {s} of {}", .{ - @tagName(src_mcv), ty.fmt(mod), + @tagName(src_mcv), ty.fmt(pt), }), }; defer if (src_info) |info| self.register_manager.unlockReg(info.addr_lock); @@ -14617,7 +14694,7 @@ fn genCopy(self: *Self, ty: Type, dst_mcv: MCValue, src_mcv: MCValue, opts: Copy } }, else => unreachable, }, opts); - part_disp += @intCast(dst_ty.abiSize(mod)); + part_disp += @intCast(dst_ty.abiSize(pt)); } }, .indirect => |reg_off| try self.genSetMem( @@ -14658,9 +14735,10 @@ fn genSetReg( src_mcv: MCValue, opts: CopyOptions, ) InnerError!void { - const mod = self.bin_file.comp.module.?; - const abi_size: u32 = @intCast(ty.abiSize(mod)); - if (ty.bitSize(mod) > dst_reg.bitSize()) + const pt = self.pt; + const mod = pt.zcu; + const abi_size: u32 = @intCast(ty.abiSize(pt)); + if (ty.bitSize(pt) > dst_reg.bitSize()) return self.fail("genSetReg called with a value larger than dst_reg", .{}); switch (src_mcv) { .none, @@ -14686,7 +14764,7 @@ fn genSetReg( ), else => unreachable, }, - .segment, .x87, .mmx, .sse => try self.genSetReg(dst_reg, ty, try self.genTypedValue(try mod.undefValue(ty)), opts), + .segment, .x87, .mmx, .sse => try self.genSetReg(dst_reg, ty, try self.genTypedValue(try pt.undefValue(ty)), opts), .ip => unreachable, }, .eflags => |cc| try self.asmSetccRegister(cc, dst_reg.to8()), @@ -14797,7 +14875,7 @@ fn genSetReg( 80 => null, else => unreachable, }, - }) orelse return self.fail("TODO implement genSetReg for {}", .{ty.fmt(mod)}), + }) orelse return self.fail("TODO implement genSetReg for {}", .{ty.fmt(pt)}), registerAlias(dst_reg, abi_size), registerAlias(src_reg, abi_size), ), @@ -14847,7 +14925,7 @@ fn genSetReg( return (try self.moveStrategy( ty, dst_reg.class(), - ty.abiAlignment(mod).check(@as(u32, @bitCast(small_addr))), + ty.abiAlignment(pt).check(@as(u32, @bitCast(small_addr))), )).read(self, registerAlias(dst_reg, abi_size), .{ .base = .{ .reg = .ds }, .mod = .{ .rm = .{ @@ -14967,8 +15045,9 @@ fn genSetMem( src_mcv: MCValue, opts: CopyOptions, ) InnerError!void { - const mod = self.bin_file.comp.module.?; - const abi_size: u32 = @intCast(ty.abiSize(mod)); + const pt = self.pt; + const mod = pt.zcu; + const abi_size: u32 = @intCast(ty.abiSize(pt)); const dst_ptr_mcv: MCValue = switch (base) { .none => .{ .immediate = @bitCast(@as(i64, disp)) }, .reg => |base_reg| .{ .register_offset = .{ .reg = base_reg, .off = disp } }, @@ -15094,21 +15173,21 @@ fn genSetMem( var part_disp: i32 = disp; for (try self.splitType(ty), src_regs) |src_ty, src_reg| { try self.genSetMem(base, part_disp, src_ty, .{ .register = src_reg }, opts); - part_disp += @intCast(src_ty.abiSize(mod)); + part_disp += @intCast(src_ty.abiSize(pt)); } }, .register_overflow => |ro| switch (ty.zigTypeTag(mod)) { .Struct => { try self.genSetMem( base, - disp + @as(i32, @intCast(ty.structFieldOffset(0, mod))), + disp + @as(i32, @intCast(ty.structFieldOffset(0, pt))), ty.structFieldType(0, mod), .{ .register = ro.reg }, opts, ); try self.genSetMem( base, - disp + @as(i32, @intCast(ty.structFieldOffset(1, mod))), + disp + @as(i32, @intCast(ty.structFieldOffset(1, pt))), ty.structFieldType(1, mod), .{ .eflags = ro.eflags }, opts, @@ -15120,14 +15199,14 @@ fn genSetMem( try self.genSetMem(base, disp, child_ty, .{ .register = ro.reg }, opts); try self.genSetMem( base, - disp + @as(i32, @intCast(child_ty.abiSize(mod))), + disp + @as(i32, @intCast(child_ty.abiSize(pt))), Type.bool, .{ .eflags = ro.eflags }, opts, ); }, else => return self.fail("TODO implement genSetMem for {s} of {}", .{ - @tagName(src_mcv), ty.fmt(mod), + @tagName(src_mcv), ty.fmt(pt), }), }, .register_offset, @@ -15236,8 +15315,9 @@ fn genLazySymbolRef( reg: Register, lazy_sym: link.File.LazySymbol, ) InnerError!void { + const pt = self.pt; if (self.bin_file.cast(link.File.Elf)) |elf_file| { - const sym_index = elf_file.zigObjectPtr().?.getOrCreateMetadataForLazySymbol(elf_file, lazy_sym) catch |err| + const sym_index = elf_file.zigObjectPtr().?.getOrCreateMetadataForLazySymbol(elf_file, pt, lazy_sym) catch |err| return self.fail("{s} creating lazy symbol", .{@errorName(err)}); const sym = elf_file.symbol(sym_index); if (self.mod.pic) { @@ -15273,7 +15353,7 @@ fn genLazySymbolRef( } } } else if (self.bin_file.cast(link.File.Plan9)) |p9_file| { - const atom_index = p9_file.getOrCreateAtomForLazySymbol(lazy_sym) catch |err| + const atom_index = p9_file.getOrCreateAtomForLazySymbol(pt, lazy_sym) catch |err| return self.fail("{s} creating lazy symbol", .{@errorName(err)}); var atom = p9_file.getAtom(atom_index); _ = atom.getOrCreateOffsetTableEntry(p9_file); @@ -15300,7 +15380,7 @@ fn genLazySymbolRef( else => unreachable, } } else if (self.bin_file.cast(link.File.Coff)) |coff_file| { - const atom_index = coff_file.getOrCreateAtomForLazySymbol(lazy_sym) catch |err| + const atom_index = coff_file.getOrCreateAtomForLazySymbol(pt, lazy_sym) catch |err| return self.fail("{s} creating lazy symbol", .{@errorName(err)}); const sym_index = coff_file.getAtom(atom_index).getSymbolIndex().?; switch (tag) { @@ -15314,7 +15394,7 @@ fn genLazySymbolRef( else => unreachable, } } else if (self.bin_file.cast(link.File.MachO)) |macho_file| { - const sym_index = macho_file.getZigObject().?.getOrCreateMetadataForLazySymbol(macho_file, lazy_sym) catch |err| + const sym_index = macho_file.getZigObject().?.getOrCreateMetadataForLazySymbol(macho_file, pt, lazy_sym) catch |err| return self.fail("{s} creating lazy symbol", .{@errorName(err)}); const sym = macho_file.getSymbol(sym_index); switch (tag) { @@ -15353,7 +15433,8 @@ fn airIntFromPtr(self: *Self, inst: Air.Inst.Index) !void { } fn airBitCast(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const dst_ty = self.typeOfIndex(inst); const src_ty = self.typeOf(ty_op.operand); @@ -15366,10 +15447,10 @@ fn airBitCast(self: *Self, inst: Air.Inst.Index) !void { const src_lock = if (src_mcv.getReg()) |reg| self.register_manager.lockReg(reg) else null; defer if (src_lock) |lock| self.register_manager.unlockReg(lock); - const dst_mcv = if (dst_rc.supersetOf(src_rc) and dst_ty.abiSize(mod) <= src_ty.abiSize(mod) and + const dst_mcv = if (dst_rc.supersetOf(src_rc) and dst_ty.abiSize(pt) <= src_ty.abiSize(pt) and self.reuseOperand(inst, ty_op.operand, 0, src_mcv)) src_mcv else dst: { const dst_mcv = try self.allocRegOrMem(inst, true); - try self.genCopy(switch (math.order(dst_ty.abiSize(mod), src_ty.abiSize(mod))) { + try self.genCopy(switch (math.order(dst_ty.abiSize(pt), src_ty.abiSize(pt))) { .lt => dst_ty, .eq => if (!dst_mcv.isMemory() or src_mcv.isMemory()) dst_ty else src_ty, .gt => src_ty, @@ -15382,8 +15463,8 @@ fn airBitCast(self: *Self, inst: Air.Inst.Index) !void { if (dst_ty.isAbiInt(mod) and src_ty.isAbiInt(mod) and dst_ty.intInfo(mod).signedness == src_ty.intInfo(mod).signedness) break :result dst_mcv; - const abi_size = dst_ty.abiSize(mod); - const bit_size = dst_ty.bitSize(mod); + const abi_size = dst_ty.abiSize(pt); + const bit_size = dst_ty.bitSize(pt); if (abi_size * 8 <= bit_size or dst_ty.isVector(mod)) break :result dst_mcv; const dst_limbs_len = math.divCeil(i32, @intCast(bit_size), 64) catch unreachable; @@ -15412,7 +15493,8 @@ fn airBitCast(self: *Self, inst: Air.Inst.Index) !void { } fn airArrayToSlice(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const slice_ty = self.typeOfIndex(inst); @@ -15421,11 +15503,11 @@ fn airArrayToSlice(self: *Self, inst: Air.Inst.Index) !void { const array_ty = ptr_ty.childType(mod); const array_len = array_ty.arrayLen(mod); - const frame_index = try self.allocFrameIndex(FrameAlloc.initSpill(slice_ty, mod)); + const frame_index = try self.allocFrameIndex(FrameAlloc.initSpill(slice_ty, pt)); try self.genSetMem(.{ .frame = frame_index }, 0, ptr_ty, ptr, .{}); try self.genSetMem( .{ .frame = frame_index }, - @intCast(ptr_ty.abiSize(mod)), + @intCast(ptr_ty.abiSize(pt)), Type.usize, .{ .immediate = array_len }, .{}, @@ -15436,14 +15518,15 @@ fn airArrayToSlice(self: *Self, inst: Air.Inst.Index) !void { } fn airFloatFromInt(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const dst_ty = self.typeOfIndex(inst); const dst_bits = dst_ty.floatBits(self.target.*); const src_ty = self.typeOf(ty_op.operand); - const src_bits: u32 = @intCast(src_ty.bitSize(mod)); + const src_bits: u32 = @intCast(src_ty.bitSize(pt)); const src_signedness = if (src_ty.isAbiInt(mod)) src_ty.intInfo(mod).signedness else .unsigned; const src_size = math.divCeil(u32, @max(switch (src_signedness) { @@ -15458,7 +15541,7 @@ fn airFloatFromInt(self: *Self, inst: Air.Inst.Index) !void { else => unreachable, }) { if (src_bits > 128) return self.fail("TODO implement airFloatFromInt from {} to {}", .{ - src_ty.fmt(mod), dst_ty.fmt(mod), + src_ty.fmt(pt), dst_ty.fmt(pt), }); var callee_buf: ["__floatun?i?f".len]u8 = undefined; @@ -15500,7 +15583,7 @@ fn airFloatFromInt(self: *Self, inst: Air.Inst.Index) !void { }, else => null, }) orelse return self.fail("TODO implement airFloatFromInt from {} to {}", .{ - src_ty.fmt(mod), dst_ty.fmt(mod), + src_ty.fmt(pt), dst_ty.fmt(pt), }); const dst_alias = dst_reg.to128(); const src_alias = registerAlias(src_reg, src_size); @@ -15515,11 +15598,12 @@ fn airFloatFromInt(self: *Self, inst: Air.Inst.Index) !void { } fn airIntFromFloat(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const dst_ty = self.typeOfIndex(inst); - const dst_bits: u32 = @intCast(dst_ty.bitSize(mod)); + const dst_bits: u32 = @intCast(dst_ty.bitSize(pt)); const dst_signedness = if (dst_ty.isAbiInt(mod)) dst_ty.intInfo(mod).signedness else .unsigned; const dst_size = math.divCeil(u32, @max(switch (dst_signedness) { @@ -15537,7 +15621,7 @@ fn airIntFromFloat(self: *Self, inst: Air.Inst.Index) !void { else => unreachable, }) { if (dst_bits > 128) return self.fail("TODO implement airIntFromFloat from {} to {}", .{ - src_ty.fmt(mod), dst_ty.fmt(mod), + src_ty.fmt(pt), dst_ty.fmt(pt), }); var callee_buf: ["__fixuns?f?i".len]u8 = undefined; @@ -15586,13 +15670,13 @@ fn airIntFromFloat(self: *Self, inst: Air.Inst.Index) !void { } fn airCmpxchg(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; const ty_pl = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_pl; const extra = self.air.extraData(Air.Cmpxchg, ty_pl.payload).data; const ptr_ty = self.typeOf(extra.ptr); const val_ty = self.typeOf(extra.expected_value); - const val_abi_size: u32 = @intCast(val_ty.abiSize(mod)); + const val_abi_size: u32 = @intCast(val_ty.abiSize(pt)); try self.spillRegisters(&.{ .rax, .rdx, .rbx, .rcx }); const regs_lock = self.register_manager.lockRegsAssumeUnused(4, .{ .rax, .rdx, .rbx, .rcx }); @@ -15682,7 +15766,8 @@ fn atomicOp( rmw_op: ?std.builtin.AtomicRmwOp, order: std.builtin.AtomicOrder, ) InnerError!MCValue { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ptr_lock = switch (ptr_mcv) { .register => |reg| self.register_manager.lockReg(reg), else => null, @@ -15695,7 +15780,7 @@ fn atomicOp( }; defer if (val_lock) |lock| self.register_manager.unlockReg(lock); - const val_abi_size: u32 = @intCast(val_ty.abiSize(mod)); + const val_abi_size: u32 = @intCast(val_ty.abiSize(pt)); const mem_size = Memory.Size.fromSize(val_abi_size); const ptr_mem: Memory = switch (ptr_mcv) { .immediate, .register, .register_offset, .lea_frame => try ptr_mcv.deref().mem(self, mem_size), @@ -15809,7 +15894,7 @@ fn atomicOp( }, else => unreachable, }) orelse return self.fail("TODO implement atomicOp of {s} for {}", .{ - @tagName(op), val_ty.fmt(mod), + @tagName(op), val_ty.fmt(pt), }); try self.genSetReg(sse_reg, val_ty, .{ .register = .rax }, .{}); switch (mir_tag[0]) { @@ -16086,7 +16171,8 @@ fn airAtomicStore(self: *Self, inst: Air.Inst.Index, order: std.builtin.AtomicOr } fn airMemset(self: *Self, inst: Air.Inst.Index, safety: bool) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const bin_op = self.air.instructions.items(.data)[@intFromEnum(inst)].bin_op; result: { @@ -16112,7 +16198,7 @@ fn airMemset(self: *Self, inst: Air.Inst.Index, safety: bool) !void { }; defer if (src_val_lock) |lock| self.register_manager.unlockReg(lock); - const elem_abi_size: u31 = @intCast(elem_ty.abiSize(mod)); + const elem_abi_size: u31 = @intCast(elem_ty.abiSize(pt)); if (elem_abi_size == 1) { const ptr: MCValue = switch (dst_ptr_ty.ptrSize(mod)) { @@ -16185,7 +16271,7 @@ fn airMemset(self: *Self, inst: Air.Inst.Index, safety: bool) !void { self.performReloc(skip_reloc); }, .One => { - const elem_ptr_ty = try mod.singleMutPtrType(elem_ty); + const elem_ptr_ty = try pt.singleMutPtrType(elem_ty); const len = dst_ptr_ty.childType(mod).arrayLen(mod); @@ -16214,7 +16300,8 @@ fn airMemset(self: *Self, inst: Air.Inst.Index, safety: bool) !void { } fn airMemcpy(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const bin_op = self.air.instructions.items(.data)[@intFromEnum(inst)].bin_op; try self.spillRegisters(&.{ .rdi, .rsi, .rcx }); @@ -16246,13 +16333,13 @@ fn airMemcpy(self: *Self, inst: Air.Inst.Index) !void { .{ .i_, .mul }, len_reg, try dst_ptr.address().offset(8).deref().mem(self, .qword), - Immediate.s(@intCast(dst_ptr_ty.childType(mod).abiSize(mod))), + Immediate.s(@intCast(dst_ptr_ty.childType(mod).abiSize(pt))), ); break :len .{ .register = len_reg }; }, .One => len: { const array_ty = dst_ptr_ty.childType(mod); - break :len .{ .immediate = array_ty.arrayLen(mod) * array_ty.childType(mod).abiSize(mod) }; + break :len .{ .immediate = array_ty.arrayLen(mod) * array_ty.childType(mod).abiSize(pt) }; }, .C, .Many => unreachable, }; @@ -16269,7 +16356,8 @@ fn airMemcpy(self: *Self, inst: Air.Inst.Index) !void { } fn airTagName(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const un_op = self.air.instructions.items(.data)[@intFromEnum(inst)].un_op; const inst_ty = self.typeOfIndex(inst); const enum_ty = self.typeOf(un_op); @@ -16278,8 +16366,8 @@ fn airTagName(self: *Self, inst: Air.Inst.Index) !void { // We need a properly aligned and sized call frame to be able to call this function. { const needed_call_frame = FrameAlloc.init(.{ - .size = inst_ty.abiSize(mod), - .alignment = inst_ty.abiAlignment(mod), + .size = inst_ty.abiSize(pt), + .alignment = inst_ty.abiAlignment(pt), }); const frame_allocs_slice = self.frame_allocs.slice(); const stack_frame_size = @@ -16311,7 +16399,8 @@ fn airTagName(self: *Self, inst: Air.Inst.Index) !void { } fn airErrorName(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const un_op = self.air.instructions.items(.data)[@intFromEnum(inst)].un_op; const err_ty = self.typeOf(un_op); @@ -16413,7 +16502,8 @@ fn airErrorName(self: *Self, inst: Air.Inst.Index) !void { } fn airSplat(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const vector_ty = self.typeOfIndex(inst); const vector_len = vector_ty.vectorLen(mod); @@ -16495,15 +16585,15 @@ fn airSplat(self: *Self, inst: Air.Inst.Index) !void { const src_mcv = try self.resolveInst(ty_op.operand); if (src_mcv.isMemory()) try self.asmRegisterMemory( mir_tag, - registerAlias(dst_reg, @intCast(vector_ty.abiSize(mod))), + registerAlias(dst_reg, @intCast(vector_ty.abiSize(pt))), try src_mcv.mem(self, self.memSize(scalar_ty)), ) else { if (mir_tag[0] == .v_i128) break :avx2; try self.genSetReg(dst_reg, scalar_ty, src_mcv, .{}); try self.asmRegisterRegister( mir_tag, - registerAlias(dst_reg, @intCast(vector_ty.abiSize(mod))), - registerAlias(dst_reg, @intCast(scalar_ty.abiSize(mod))), + registerAlias(dst_reg, @intCast(vector_ty.abiSize(pt))), + registerAlias(dst_reg, @intCast(scalar_ty.abiSize(pt))), ); } break :result .{ .register = dst_reg }; @@ -16515,7 +16605,7 @@ fn airSplat(self: *Self, inst: Air.Inst.Index) !void { try self.genSetReg(dst_reg, scalar_ty, .{ .air_ref = ty_op.operand }, .{}); if (vector_len == 1) break :result .{ .register = dst_reg }; - const dst_alias = registerAlias(dst_reg, @intCast(vector_ty.abiSize(mod))); + const dst_alias = registerAlias(dst_reg, @intCast(vector_ty.abiSize(pt))); const scalar_bits = scalar_ty.intInfo(mod).bits; if (switch (scalar_bits) { 1...8 => true, @@ -16745,20 +16835,21 @@ fn airSplat(self: *Self, inst: Air.Inst.Index) !void { else => unreachable, }, } - return self.fail("TODO implement airSplat for {}", .{vector_ty.fmt(mod)}); + return self.fail("TODO implement airSplat for {}", .{vector_ty.fmt(pt)}); }; return self.finishAir(inst, result, .{ ty_op.operand, .none, .none }); } fn airSelect(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const pl_op = self.air.instructions.items(.data)[@intFromEnum(inst)].pl_op; const extra = self.air.extraData(Air.Bin, pl_op.payload).data; const ty = self.typeOfIndex(inst); const vec_len = ty.vectorLen(mod); const elem_ty = ty.childType(mod); - const elem_abi_size: u32 = @intCast(elem_ty.abiSize(mod)); - const abi_size: u32 = @intCast(ty.abiSize(mod)); + const elem_abi_size: u32 = @intCast(elem_ty.abiSize(pt)); + const abi_size: u32 = @intCast(ty.abiSize(pt)); const pred_ty = self.typeOf(pl_op.operand); const result = result: { @@ -16878,17 +16969,17 @@ fn airSelect(self: *Self, inst: Air.Inst.Index) !void { else => unreachable, }), ); - } else return self.fail("TODO implement airSelect for {}", .{ty.fmt(mod)}); + } else return self.fail("TODO implement airSelect for {}", .{ty.fmt(pt)}); const elem_bits: u16 = @intCast(elem_abi_size * 8); - const mask_elem_ty = try mod.intType(.unsigned, elem_bits); - const mask_ty = try mod.vectorType(.{ .len = vec_len, .child = mask_elem_ty.toIntern() }); + const mask_elem_ty = try pt.intType(.unsigned, elem_bits); + const mask_ty = try pt.vectorType(.{ .len = vec_len, .child = mask_elem_ty.toIntern() }); if (!pred_fits_in_elem) if (self.hasFeature(.ssse3)) { var mask_elems: [32]InternPool.Index = undefined; - for (mask_elems[0..vec_len], 0..) |*elem, bit| elem.* = try mod.intern(.{ .int = .{ + for (mask_elems[0..vec_len], 0..) |*elem, bit| elem.* = try pt.intern(.{ .int = .{ .ty = mask_elem_ty.toIntern(), .storage = .{ .u64 = bit / elem_bits }, } }); - const mask_mcv = try self.genTypedValue(Value.fromInterned(try mod.intern(.{ .aggregate = .{ + const mask_mcv = try self.genTypedValue(Value.fromInterned(try pt.intern(.{ .aggregate = .{ .ty = mask_ty.toIntern(), .storage = .{ .elems = mask_elems[0..vec_len] }, } }))); @@ -16906,14 +16997,14 @@ fn airSelect(self: *Self, inst: Air.Inst.Index) !void { mask_alias, mask_mem, ); - } else return self.fail("TODO implement airSelect for {}", .{ty.fmt(mod)}); + } else return self.fail("TODO implement airSelect for {}", .{ty.fmt(pt)}); { var mask_elems: [32]InternPool.Index = undefined; - for (mask_elems[0..vec_len], 0..) |*elem, bit| elem.* = try mod.intern(.{ .int = .{ + for (mask_elems[0..vec_len], 0..) |*elem, bit| elem.* = try pt.intern(.{ .int = .{ .ty = mask_elem_ty.toIntern(), .storage = .{ .u64 = @as(u32, 1) << @intCast(bit & (elem_bits - 1)) }, } }); - const mask_mcv = try self.genTypedValue(Value.fromInterned(try mod.intern(.{ .aggregate = .{ + const mask_mcv = try self.genTypedValue(Value.fromInterned(try pt.intern(.{ .aggregate = .{ .ty = mask_ty.toIntern(), .storage = .{ .elems = mask_elems[0..vec_len] }, } }))); @@ -17014,7 +17105,7 @@ fn airSelect(self: *Self, inst: Air.Inst.Index) !void { else => null, }, }, - }) orelse return self.fail("TODO implement airSelect for {}", .{ty.fmt(mod)}); + }) orelse return self.fail("TODO implement airSelect for {}", .{ty.fmt(pt)}); if (has_avx) { const rhs_alias = if (rhs_mcv.isRegister()) registerAlias(rhs_mcv.getReg().?, abi_size) @@ -17061,7 +17152,7 @@ fn airSelect(self: *Self, inst: Air.Inst.Index) !void { 16, 80, 128 => null, else => unreachable, }, - }) orelse return self.fail("TODO implement airSelect for {}", .{ty.fmt(mod)}); + }) orelse return self.fail("TODO implement airSelect for {}", .{ty.fmt(pt)}); try self.asmRegisterRegister(.{ mir_fixes, .@"and" }, dst_alias, mask_alias); if (rhs_mcv.isMemory()) try self.asmRegisterMemory( .{ mir_fixes, .andn }, @@ -17083,18 +17174,19 @@ fn airSelect(self: *Self, inst: Air.Inst.Index) !void { } fn airShuffle(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_pl = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_pl; const extra = self.air.extraData(Air.Shuffle, ty_pl.payload).data; const dst_ty = self.typeOfIndex(inst); const elem_ty = dst_ty.childType(mod); - const elem_abi_size: u16 = @intCast(elem_ty.abiSize(mod)); - const dst_abi_size: u32 = @intCast(dst_ty.abiSize(mod)); + const elem_abi_size: u16 = @intCast(elem_ty.abiSize(pt)); + const dst_abi_size: u32 = @intCast(dst_ty.abiSize(pt)); const lhs_ty = self.typeOf(extra.a); - const lhs_abi_size: u32 = @intCast(lhs_ty.abiSize(mod)); + const lhs_abi_size: u32 = @intCast(lhs_ty.abiSize(pt)); const rhs_ty = self.typeOf(extra.b); - const rhs_abi_size: u32 = @intCast(rhs_ty.abiSize(mod)); + const rhs_abi_size: u32 = @intCast(rhs_ty.abiSize(pt)); const max_abi_size = @max(dst_abi_size, lhs_abi_size, rhs_abi_size); const ExpectedContents = [32]?i32; @@ -17106,11 +17198,11 @@ fn airShuffle(self: *Self, inst: Air.Inst.Index) !void { defer allocator.free(mask_elems); for (mask_elems, 0..) |*mask_elem, elem_index| { const mask_elem_val = - Value.fromInterned(extra.mask).elemValue(mod, elem_index) catch unreachable; + Value.fromInterned(extra.mask).elemValue(pt, elem_index) catch unreachable; mask_elem.* = if (mask_elem_val.isUndef(mod)) null else - @intCast(mask_elem_val.toSignedInt(mod)); + @intCast(mask_elem_val.toSignedInt(pt)); } const has_avx = self.hasFeature(.avx); @@ -17626,8 +17718,8 @@ fn airShuffle(self: *Self, inst: Air.Inst.Index) !void { else self.hasFeature(.avx2)) 32 else 16)) break :blendv; - const select_mask_elem_ty = try mod.intType(.unsigned, elem_abi_size * 8); - const select_mask_ty = try mod.vectorType(.{ + const select_mask_elem_ty = try pt.intType(.unsigned, elem_abi_size * 8); + const select_mask_ty = try pt.vectorType(.{ .len = @intCast(mask_elems.len), .child = select_mask_elem_ty.toIntern(), }); @@ -17643,11 +17735,11 @@ fn airShuffle(self: *Self, inst: Air.Inst.Index) !void { if (mask_elem_index != elem_index) break :blendv; select_mask_elem.* = (if (mask_elem < 0) - try select_mask_elem_ty.maxIntScalar(mod, select_mask_elem_ty) + try select_mask_elem_ty.maxIntScalar(pt, select_mask_elem_ty) else - try select_mask_elem_ty.minIntScalar(mod, select_mask_elem_ty)).toIntern(); + try select_mask_elem_ty.minIntScalar(pt, select_mask_elem_ty)).toIntern(); } - const select_mask_mcv = try self.genTypedValue(Value.fromInterned(try mod.intern(.{ .aggregate = .{ + const select_mask_mcv = try self.genTypedValue(Value.fromInterned(try pt.intern(.{ .aggregate = .{ .ty = select_mask_ty.toIntern(), .storage = .{ .elems = select_mask_elems[0..mask_elems.len] }, } }))); @@ -17783,7 +17875,7 @@ fn airShuffle(self: *Self, inst: Air.Inst.Index) !void { var lhs_mask_elems: [16]InternPool.Index = undefined; for (lhs_mask_elems[0..max_abi_size], 0..) |*lhs_mask_elem, byte_index| { const elem_index = byte_index / elem_abi_size; - lhs_mask_elem.* = try mod.intern(.{ .int = .{ + lhs_mask_elem.* = try pt.intern(.{ .int = .{ .ty = .u8_type, .storage = .{ .u64 = if (elem_index >= mask_elems.len) 0b1_00_00000 else elem: { const mask_elem = mask_elems[elem_index] orelse break :elem 0b1_00_00000; @@ -17794,8 +17886,8 @@ fn airShuffle(self: *Self, inst: Air.Inst.Index) !void { } }, } }); } - const lhs_mask_ty = try mod.vectorType(.{ .len = max_abi_size, .child = .u8_type }); - const lhs_mask_mcv = try self.genTypedValue(Value.fromInterned(try mod.intern(.{ .aggregate = .{ + const lhs_mask_ty = try pt.vectorType(.{ .len = max_abi_size, .child = .u8_type }); + const lhs_mask_mcv = try self.genTypedValue(Value.fromInterned(try pt.intern(.{ .aggregate = .{ .ty = lhs_mask_ty.toIntern(), .storage = .{ .elems = lhs_mask_elems[0..max_abi_size] }, } }))); @@ -17817,7 +17909,7 @@ fn airShuffle(self: *Self, inst: Air.Inst.Index) !void { var rhs_mask_elems: [16]InternPool.Index = undefined; for (rhs_mask_elems[0..max_abi_size], 0..) |*rhs_mask_elem, byte_index| { const elem_index = byte_index / elem_abi_size; - rhs_mask_elem.* = try mod.intern(.{ .int = .{ + rhs_mask_elem.* = try pt.intern(.{ .int = .{ .ty = .u8_type, .storage = .{ .u64 = if (elem_index >= mask_elems.len) 0b1_00_00000 else elem: { const mask_elem = mask_elems[elem_index] orelse break :elem 0b1_00_00000; @@ -17828,8 +17920,8 @@ fn airShuffle(self: *Self, inst: Air.Inst.Index) !void { } }, } }); } - const rhs_mask_ty = try mod.vectorType(.{ .len = max_abi_size, .child = .u8_type }); - const rhs_mask_mcv = try self.genTypedValue(Value.fromInterned(try mod.intern(.{ .aggregate = .{ + const rhs_mask_ty = try pt.vectorType(.{ .len = max_abi_size, .child = .u8_type }); + const rhs_mask_mcv = try self.genTypedValue(Value.fromInterned(try pt.intern(.{ .aggregate = .{ .ty = rhs_mask_ty.toIntern(), .storage = .{ .elems = rhs_mask_elems[0..max_abi_size] }, } }))); @@ -17881,14 +17973,15 @@ fn airShuffle(self: *Self, inst: Air.Inst.Index) !void { break :result null; }) orelse return self.fail("TODO implement airShuffle from {} and {} to {} with {}", .{ - lhs_ty.fmt(mod), rhs_ty.fmt(mod), dst_ty.fmt(mod), - Value.fromInterned(extra.mask).fmtValue(mod, null), + lhs_ty.fmt(pt), rhs_ty.fmt(pt), dst_ty.fmt(pt), + Value.fromInterned(extra.mask).fmtValue(pt, null), }); return self.finishAir(inst, result, .{ extra.a, extra.b, .none }); } fn airReduce(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const reduce = self.air.instructions.items(.data)[@intFromEnum(inst)].reduce; const result: MCValue = result: { @@ -17898,9 +17991,9 @@ fn airReduce(self: *Self, inst: Air.Inst.Index) !void { const operand_mcv = try self.resolveInst(reduce.operand); const mask_len = (math.cast(u6, operand_ty.vectorLen(mod)) orelse - return self.fail("TODO implement airReduce for {}", .{operand_ty.fmt(mod)})); + return self.fail("TODO implement airReduce for {}", .{operand_ty.fmt(pt)})); const mask = (@as(u64, 1) << mask_len) - 1; - const abi_size: u32 = @intCast(operand_ty.abiSize(mod)); + const abi_size: u32 = @intCast(operand_ty.abiSize(pt)); switch (reduce.operation) { .Or => { if (operand_mcv.isMemory()) try self.asmMemoryImmediate( @@ -17936,16 +18029,17 @@ fn airReduce(self: *Self, inst: Air.Inst.Index) !void { try self.asmRegisterRegister(.{ ._, .@"test" }, tmp_reg, tmp_reg); break :result .{ .eflags = .z }; }, - else => return self.fail("TODO implement airReduce for {}", .{operand_ty.fmt(mod)}), + else => return self.fail("TODO implement airReduce for {}", .{operand_ty.fmt(pt)}), } } - return self.fail("TODO implement airReduce for {}", .{operand_ty.fmt(mod)}); + return self.fail("TODO implement airReduce for {}", .{operand_ty.fmt(pt)}); }; return self.finishAir(inst, result, .{ reduce.operand, .none, .none }); } fn airAggregateInit(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const result_ty = self.typeOfIndex(inst); const len: usize = @intCast(result_ty.arrayLen(mod)); const ty_pl = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_pl; @@ -17953,30 +18047,30 @@ fn airAggregateInit(self: *Self, inst: Air.Inst.Index) !void { const result: MCValue = result: { switch (result_ty.zigTypeTag(mod)) { .Struct => { - const frame_index = try self.allocFrameIndex(FrameAlloc.initSpill(result_ty, mod)); + const frame_index = try self.allocFrameIndex(FrameAlloc.initSpill(result_ty, pt)); if (result_ty.containerLayout(mod) == .@"packed") { const struct_obj = mod.typeToStruct(result_ty).?; try self.genInlineMemset( .{ .lea_frame = .{ .index = frame_index } }, .{ .immediate = 0 }, - .{ .immediate = result_ty.abiSize(mod) }, + .{ .immediate = result_ty.abiSize(pt) }, .{}, ); for (elements, 0..) |elem, elem_i_usize| { const elem_i: u32 = @intCast(elem_i_usize); - if ((try result_ty.structFieldValueComptime(mod, elem_i)) != null) continue; + if ((try result_ty.structFieldValueComptime(pt, elem_i)) != null) continue; const elem_ty = result_ty.structFieldType(elem_i, mod); - const elem_bit_size: u32 = @intCast(elem_ty.bitSize(mod)); + const elem_bit_size: u32 = @intCast(elem_ty.bitSize(pt)); if (elem_bit_size > 64) { return self.fail( "TODO airAggregateInit implement packed structs with large fields", .{}, ); } - const elem_abi_size: u32 = @intCast(elem_ty.abiSize(mod)); + const elem_abi_size: u32 = @intCast(elem_ty.abiSize(pt)); const elem_abi_bits = elem_abi_size * 8; - const elem_off = mod.structPackedFieldBitOffset(struct_obj, elem_i); + const elem_off = pt.structPackedFieldBitOffset(struct_obj, elem_i); const elem_byte_off: i32 = @intCast(elem_off / elem_abi_bits * elem_abi_size); const elem_bit_off = elem_off % elem_abi_bits; const elem_mcv = try self.resolveInst(elem); @@ -18046,10 +18140,10 @@ fn airAggregateInit(self: *Self, inst: Air.Inst.Index) !void { } } } else for (elements, 0..) |elem, elem_i| { - if ((try result_ty.structFieldValueComptime(mod, elem_i)) != null) continue; + if ((try result_ty.structFieldValueComptime(pt, elem_i)) != null) continue; const elem_ty = result_ty.structFieldType(elem_i, mod); - const elem_off: i32 = @intCast(result_ty.structFieldOffset(elem_i, mod)); + const elem_off: i32 = @intCast(result_ty.structFieldOffset(elem_i, pt)); const elem_mcv = try self.resolveInst(elem); const mat_elem_mcv = switch (elem_mcv) { .load_tlv => |sym_index| MCValue{ .lea_tlv = sym_index }, @@ -18062,7 +18156,7 @@ fn airAggregateInit(self: *Self, inst: Air.Inst.Index) !void { .Array, .Vector => { const elem_ty = result_ty.childType(mod); if (result_ty.isVector(mod) and elem_ty.toIntern() == .bool_type) { - const result_size: u32 = @intCast(result_ty.abiSize(mod)); + const result_size: u32 = @intCast(result_ty.abiSize(pt)); const dst_reg = try self.register_manager.allocReg(inst, abi.RegisterClass.gp); try self.asmRegisterRegister( .{ ._, .xor }, @@ -18093,8 +18187,8 @@ fn airAggregateInit(self: *Self, inst: Air.Inst.Index) !void { } break :result .{ .register = dst_reg }; } else { - const frame_index = try self.allocFrameIndex(FrameAlloc.initSpill(result_ty, mod)); - const elem_size: u32 = @intCast(elem_ty.abiSize(mod)); + const frame_index = try self.allocFrameIndex(FrameAlloc.initSpill(result_ty, pt)); + const elem_size: u32 = @intCast(elem_ty.abiSize(pt)); for (elements, 0..) |elem, elem_i| { const elem_mcv = try self.resolveInst(elem); @@ -18136,18 +18230,19 @@ fn airAggregateInit(self: *Self, inst: Air.Inst.Index) !void { } fn airUnionInit(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ip = &mod.intern_pool; const ty_pl = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_pl; const extra = self.air.extraData(Air.UnionInit, ty_pl.payload).data; const result: MCValue = result: { const union_ty = self.typeOfIndex(inst); - const layout = union_ty.unionGetLayout(mod); + const layout = union_ty.unionGetLayout(pt); const src_ty = self.typeOf(extra.init); const src_mcv = try self.resolveInst(extra.init); if (layout.tag_size == 0) { - if (layout.abi_size <= src_ty.abiSize(mod) and + if (layout.abi_size <= src_ty.abiSize(pt) and self.reuseOperand(inst, extra.init, 0, src_mcv)) break :result src_mcv; const dst_mcv = try self.allocRegOrMem(inst, true); @@ -18161,9 +18256,9 @@ fn airUnionInit(self: *Self, inst: Air.Inst.Index) !void { const field_name = union_obj.loadTagType(ip).names.get(ip)[extra.field_index]; const tag_ty = Type.fromInterned(union_obj.enum_tag_ty); const field_index = tag_ty.enumFieldIndex(field_name, mod).?; - const tag_val = try mod.enumValueFieldIndex(tag_ty, field_index); - const tag_int_val = try tag_val.intFromEnum(tag_ty, mod); - const tag_int = tag_int_val.toUnsignedInt(mod); + const tag_val = try pt.enumValueFieldIndex(tag_ty, field_index); + const tag_int_val = try tag_val.intFromEnum(tag_ty, pt); + const tag_int = tag_int_val.toUnsignedInt(pt); const tag_off: i32 = if (layout.tag_align.compare(.lt, layout.payload_align)) @intCast(layout.payload_size) else @@ -18192,7 +18287,8 @@ fn airPrefetch(self: *Self, inst: Air.Inst.Index) !void { } fn airMulAdd(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const pl_op = self.air.instructions.items(.data)[@intFromEnum(inst)].pl_op; const extra = self.air.extraData(Air.Bin, pl_op.payload).data; const ty = self.typeOfIndex(inst); @@ -18205,7 +18301,7 @@ fn airMulAdd(self: *Self, inst: Air.Inst.Index) !void { else => unreachable, }) { if (ty.zigTypeTag(mod) != .Float) return self.fail("TODO implement airMulAdd for {}", .{ - ty.fmt(mod), + ty.fmt(pt), }); var callee_buf: ["__fma?".len]u8 = undefined; @@ -18334,12 +18430,12 @@ fn airMulAdd(self: *Self, inst: Air.Inst.Index) !void { else => unreachable, } else - unreachable) orelse return self.fail("TODO implement airMulAdd for {}", .{ty.fmt(mod)}); + unreachable) orelse return self.fail("TODO implement airMulAdd for {}", .{ty.fmt(pt)}); var mops: [3]MCValue = undefined; for (order, mcvs) |mop_index, mcv| mops[mop_index - 1] = mcv; - const abi_size: u32 = @intCast(ty.abiSize(mod)); + const abi_size: u32 = @intCast(ty.abiSize(pt)); const mop1_reg = registerAlias(mops[0].getReg().?, abi_size); const mop2_reg = registerAlias(mops[1].getReg().?, abi_size); if (mops[2].isRegister()) try self.asmRegisterRegisterRegister( @@ -18359,9 +18455,10 @@ fn airMulAdd(self: *Self, inst: Air.Inst.Index) !void { } fn airVaStart(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const va_list_ty = self.air.instructions.items(.data)[@intFromEnum(inst)].ty; - const ptr_anyopaque_ty = try mod.singleMutPtrType(Type.anyopaque); + const ptr_anyopaque_ty = try pt.singleMutPtrType(Type.anyopaque); const result: MCValue = switch (abi.resolveCallingConvention( self.fn_type.fnCallingConvention(mod), @@ -18369,7 +18466,7 @@ fn airVaStart(self: *Self, inst: Air.Inst.Index) !void { )) { .SysV => result: { const info = self.va_info.sysv; - const dst_fi = try self.allocFrameIndex(FrameAlloc.initSpill(va_list_ty, mod)); + const dst_fi = try self.allocFrameIndex(FrameAlloc.initSpill(va_list_ty, pt)); var field_off: u31 = 0; // gp_offset: c_uint, try self.genSetMem( @@ -18379,7 +18476,7 @@ fn airVaStart(self: *Self, inst: Air.Inst.Index) !void { .{ .immediate = info.gp_count * 8 }, .{}, ); - field_off += @intCast(Type.c_uint.abiSize(mod)); + field_off += @intCast(Type.c_uint.abiSize(pt)); // fp_offset: c_uint, try self.genSetMem( .{ .frame = dst_fi }, @@ -18388,7 +18485,7 @@ fn airVaStart(self: *Self, inst: Air.Inst.Index) !void { .{ .immediate = abi.SysV.c_abi_int_param_regs.len * 8 + info.fp_count * 16 }, .{}, ); - field_off += @intCast(Type.c_uint.abiSize(mod)); + field_off += @intCast(Type.c_uint.abiSize(pt)); // overflow_arg_area: *anyopaque, try self.genSetMem( .{ .frame = dst_fi }, @@ -18397,7 +18494,7 @@ fn airVaStart(self: *Self, inst: Air.Inst.Index) !void { .{ .lea_frame = info.overflow_arg_area }, .{}, ); - field_off += @intCast(ptr_anyopaque_ty.abiSize(mod)); + field_off += @intCast(ptr_anyopaque_ty.abiSize(pt)); // reg_save_area: *anyopaque, try self.genSetMem( .{ .frame = dst_fi }, @@ -18406,7 +18503,7 @@ fn airVaStart(self: *Self, inst: Air.Inst.Index) !void { .{ .lea_frame = info.reg_save_area }, .{}, ); - field_off += @intCast(ptr_anyopaque_ty.abiSize(mod)); + field_off += @intCast(ptr_anyopaque_ty.abiSize(pt)); break :result .{ .load_frame = .{ .index = dst_fi } }; }, .Win64 => return self.fail("TODO implement c_va_start for Win64", .{}), @@ -18416,11 +18513,12 @@ fn airVaStart(self: *Self, inst: Air.Inst.Index) !void { } fn airVaArg(self: *Self, inst: Air.Inst.Index) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ty_op = self.air.instructions.items(.data)[@intFromEnum(inst)].ty_op; const ty = self.typeOfIndex(inst); const promote_ty = self.promoteVarArg(ty); - const ptr_anyopaque_ty = try mod.singleMutPtrType(Type.anyopaque); + const ptr_anyopaque_ty = try pt.singleMutPtrType(Type.anyopaque); const unused = self.liveness.isUnused(inst); const result: MCValue = switch (abi.resolveCallingConvention( @@ -18454,7 +18552,7 @@ fn airVaArg(self: *Self, inst: Air.Inst.Index) !void { const overflow_arg_area: MCValue = .{ .indirect = .{ .reg = ptr_arg_list_reg, .off = 8 } }; const reg_save_area: MCValue = .{ .indirect = .{ .reg = ptr_arg_list_reg, .off = 16 } }; - const classes = mem.sliceTo(&abi.classifySystemV(promote_ty, mod, self.target.*, .arg), .none); + const classes = mem.sliceTo(&abi.classifySystemV(promote_ty, pt, self.target.*, .arg), .none); switch (classes[0]) { .integer => { assert(classes.len == 1); @@ -18489,7 +18587,7 @@ fn airVaArg(self: *Self, inst: Air.Inst.Index) !void { .base = .{ .reg = addr_reg }, .mod = .{ .rm = .{ .size = .qword, - .disp = @intCast(@max(promote_ty.abiSize(mod), 8)), + .disp = @intCast(@max(promote_ty.abiSize(pt), 8)), } }, }); try self.genCopy( @@ -18537,7 +18635,7 @@ fn airVaArg(self: *Self, inst: Air.Inst.Index) !void { .base = .{ .reg = addr_reg }, .mod = .{ .rm = .{ .size = .qword, - .disp = @intCast(@max(promote_ty.abiSize(mod), 8)), + .disp = @intCast(@max(promote_ty.abiSize(pt), 8)), } }, }); try self.genCopy( @@ -18557,7 +18655,7 @@ fn airVaArg(self: *Self, inst: Air.Inst.Index) !void { unreachable; }, else => return self.fail("TODO implement c_va_arg for {} on SysV", .{ - promote_ty.fmt(mod), + promote_ty.fmt(pt), }), } @@ -18627,11 +18725,11 @@ fn airVaEnd(self: *Self, inst: Air.Inst.Index) !void { } fn resolveInst(self: *Self, ref: Air.Inst.Ref) InnerError!MCValue { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; const ty = self.typeOf(ref); // If the type has no codegen bits, no need to store it. - if (!ty.hasRuntimeBitsIgnoreComptime(mod)) return .none; + if (!ty.hasRuntimeBitsIgnoreComptime(pt)) return .none; const mcv = if (ref.toIndex()) |inst| mcv: { break :mcv self.inst_tracking.getPtr(inst).?.short; @@ -18705,8 +18803,8 @@ fn limitImmediateType(self: *Self, operand: Air.Inst.Ref, comptime T: type) !MCV } fn genTypedValue(self: *Self, val: Value) InnerError!MCValue { - const mod = self.bin_file.comp.module.?; - return switch (try codegen.genTypedValue(self.bin_file, self.src_loc, val, self.owner.getDecl(mod))) { + const pt = self.pt; + return switch (try codegen.genTypedValue(self.bin_file, pt, self.src_loc, val, self.owner.getDecl(pt.zcu))) { .mcv => |mcv| switch (mcv) { .none => .none, .undef => .undef, @@ -18745,7 +18843,8 @@ fn resolveCallingConventionValues( var_args: []const Type, stack_frame_base: FrameIndex, ) !CallMCValues { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const ip = &mod.intern_pool; const cc = fn_info.cc; const param_types = try self.gpa.alloc(Type, fn_info.param_types.len + var_args.len); @@ -18788,7 +18887,7 @@ fn resolveCallingConventionValues( .SysV => {}, .Win64 => { // Align the stack to 16bytes before allocating shadow stack space (if any). - result.stack_byte_count += @intCast(4 * Type.usize.abiSize(mod)); + result.stack_byte_count += @intCast(4 * Type.usize.abiSize(pt)); }, else => unreachable, } @@ -18796,7 +18895,7 @@ fn resolveCallingConventionValues( // Return values if (ret_ty.zigTypeTag(mod) == .NoReturn) { result.return_value = InstTracking.init(.unreach); - } else if (!ret_ty.hasRuntimeBitsIgnoreComptime(mod)) { + } else if (!ret_ty.hasRuntimeBitsIgnoreComptime(pt)) { // TODO: is this even possible for C calling convention? result.return_value = InstTracking.init(.none); } else { @@ -18804,15 +18903,15 @@ fn resolveCallingConventionValues( var ret_tracking_i: usize = 0; const classes = switch (resolved_cc) { - .SysV => mem.sliceTo(&abi.classifySystemV(ret_ty, mod, self.target.*, .ret), .none), - .Win64 => &.{abi.classifyWindows(ret_ty, mod)}, + .SysV => mem.sliceTo(&abi.classifySystemV(ret_ty, pt, self.target.*, .ret), .none), + .Win64 => &.{abi.classifyWindows(ret_ty, pt)}, else => unreachable, }; for (classes) |class| switch (class) { .integer => { const ret_int_reg = registerAlias( abi.getCAbiIntReturnRegs(resolved_cc)[ret_int_reg_i], - @intCast(@min(ret_ty.abiSize(mod), 8)), + @intCast(@min(ret_ty.abiSize(pt), 8)), ); ret_int_reg_i += 1; @@ -18822,7 +18921,7 @@ fn resolveCallingConventionValues( .sse, .float, .float_combine, .win_i128 => { const ret_sse_reg = registerAlias( abi.getCAbiSseReturnRegs(resolved_cc)[ret_sse_reg_i], - @intCast(ret_ty.abiSize(mod)), + @intCast(ret_ty.abiSize(pt)), ); ret_sse_reg_i += 1; @@ -18865,7 +18964,7 @@ fn resolveCallingConventionValues( // Input params for (param_types, result.args) |ty, *arg| { - assert(ty.hasRuntimeBitsIgnoreComptime(mod)); + assert(ty.hasRuntimeBitsIgnoreComptime(pt)); switch (resolved_cc) { .SysV => {}, .Win64 => { @@ -18879,8 +18978,8 @@ fn resolveCallingConventionValues( var arg_mcv_i: usize = 0; const classes = switch (resolved_cc) { - .SysV => mem.sliceTo(&abi.classifySystemV(ty, mod, self.target.*, .arg), .none), - .Win64 => &.{abi.classifyWindows(ty, mod)}, + .SysV => mem.sliceTo(&abi.classifySystemV(ty, pt, self.target.*, .arg), .none), + .Win64 => &.{abi.classifyWindows(ty, pt)}, else => unreachable, }; for (classes) |class| switch (class) { @@ -18890,7 +18989,7 @@ fn resolveCallingConventionValues( const param_int_reg = registerAlias( abi.getCAbiIntParamRegs(resolved_cc)[param_int_reg_i], - @intCast(@min(ty.abiSize(mod), 8)), + @intCast(@min(ty.abiSize(pt), 8)), ); param_int_reg_i += 1; @@ -18903,7 +19002,7 @@ fn resolveCallingConventionValues( const param_sse_reg = registerAlias( abi.getCAbiSseParamRegs(resolved_cc)[param_sse_reg_i], - @intCast(ty.abiSize(mod)), + @intCast(ty.abiSize(pt)), ); param_sse_reg_i += 1; @@ -18916,7 +19015,7 @@ fn resolveCallingConventionValues( .x87, .x87up, .complex_x87, .memory => break, else => unreachable, }, - .Win64 => if (ty.abiSize(mod) > 8) { + .Win64 => if (ty.abiSize(pt) > 8) { const param_int_reg = abi.getCAbiIntParamRegs(resolved_cc)[param_int_reg_i].to64(); param_int_reg_i += 1; @@ -18938,7 +19037,7 @@ fn resolveCallingConventionValues( const frame_elems_len = ty.vectorLen(mod) - remaining_param_int_regs; const frame_elem_size = mem.alignForward( u64, - ty.childType(mod).abiSize(mod), + ty.childType(mod).abiSize(pt), frame_elem_align, ); const frame_size: u31 = @intCast(frame_elems_len * frame_elem_size); @@ -18962,9 +19061,9 @@ fn resolveCallingConventionValues( continue; } - const param_size: u31 = @intCast(ty.abiSize(mod)); + const param_size: u31 = @intCast(ty.abiSize(pt)); const param_align: u31 = - @intCast(@max(ty.abiAlignment(mod).toByteUnits().?, 8)); + @intCast(@max(ty.abiAlignment(pt).toByteUnits().?, 8)); result.stack_byte_count = mem.alignForward(u31, result.stack_byte_count, param_align); arg.* = .{ .load_frame = .{ @@ -18984,11 +19083,11 @@ fn resolveCallingConventionValues( // Return values if (ret_ty.zigTypeTag(mod) == .NoReturn) { result.return_value = InstTracking.init(.unreach); - } else if (!ret_ty.hasRuntimeBitsIgnoreComptime(mod)) { + } else if (!ret_ty.hasRuntimeBitsIgnoreComptime(pt)) { result.return_value = InstTracking.init(.none); } else { const ret_reg = abi.getCAbiIntReturnRegs(resolved_cc)[0]; - const ret_ty_size: u31 = @intCast(ret_ty.abiSize(mod)); + const ret_ty_size: u31 = @intCast(ret_ty.abiSize(pt)); if (ret_ty_size <= 8 and !ret_ty.isRuntimeFloat()) { const aliased_reg = registerAlias(ret_reg, ret_ty_size); result.return_value = .{ .short = .{ .register = aliased_reg }, .long = .none }; @@ -19003,12 +19102,12 @@ fn resolveCallingConventionValues( // Input params for (param_types, result.args) |ty, *arg| { - if (!ty.hasRuntimeBitsIgnoreComptime(mod)) { + if (!ty.hasRuntimeBitsIgnoreComptime(pt)) { arg.* = .none; continue; } - const param_size: u31 = @intCast(ty.abiSize(mod)); - const param_align: u31 = @intCast(ty.abiAlignment(mod).toByteUnits().?); + const param_size: u31 = @intCast(ty.abiSize(pt)); + const param_align: u31 = @intCast(ty.abiAlignment(pt).toByteUnits().?); result.stack_byte_count = mem.alignForward(u31, result.stack_byte_count, param_align); arg.* = .{ .load_frame = .{ @@ -19093,47 +19192,49 @@ fn registerAlias(reg: Register, size_bytes: u32) Register { } fn memSize(self: *Self, ty: Type) Memory.Size { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; return switch (ty.zigTypeTag(mod)) { .Float => Memory.Size.fromBitSize(ty.floatBits(self.target.*)), - else => Memory.Size.fromSize(@intCast(ty.abiSize(mod))), + else => Memory.Size.fromSize(@intCast(ty.abiSize(pt))), }; } fn splitType(self: *Self, ty: Type) ![2]Type { - const mod = self.bin_file.comp.module.?; - const classes = mem.sliceTo(&abi.classifySystemV(ty, mod, self.target.*, .other), .none); + const pt = self.pt; + const classes = mem.sliceTo(&abi.classifySystemV(ty, pt, self.target.*, .other), .none); var parts: [2]Type = undefined; if (classes.len == 2) for (&parts, classes, 0..) |*part, class, part_i| { part.* = switch (class) { .integer => switch (part_i) { 0 => Type.u64, 1 => part: { - const elem_size = ty.abiAlignment(mod).minStrict(.@"8").toByteUnits().?; - const elem_ty = try mod.intType(.unsigned, @intCast(elem_size * 8)); - break :part switch (@divExact(ty.abiSize(mod) - 8, elem_size)) { + const elem_size = ty.abiAlignment(pt).minStrict(.@"8").toByteUnits().?; + const elem_ty = try pt.intType(.unsigned, @intCast(elem_size * 8)); + break :part switch (@divExact(ty.abiSize(pt) - 8, elem_size)) { 1 => elem_ty, - else => |len| try mod.arrayType(.{ .len = len, .child = elem_ty.toIntern() }), + else => |len| try pt.arrayType(.{ .len = len, .child = elem_ty.toIntern() }), }; }, else => unreachable, }, .float => Type.f32, - .float_combine => try mod.arrayType(.{ .len = 2, .child = .f32_type }), + .float_combine => try pt.arrayType(.{ .len = 2, .child = .f32_type }), .sse => Type.f64, else => break, }; - } else if (parts[0].abiSize(mod) + parts[1].abiSize(mod) == ty.abiSize(mod)) return parts; - return self.fail("TODO implement splitType for {}", .{ty.fmt(mod)}); + } else if (parts[0].abiSize(pt) + parts[1].abiSize(pt) == ty.abiSize(pt)) return parts; + return self.fail("TODO implement splitType for {}", .{ty.fmt(pt)}); } /// Truncates the value in the register in place. /// Clobbers any remaining bits. fn truncateRegister(self: *Self, ty: Type, reg: Register) !void { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const int_info = if (ty.isAbiInt(mod)) ty.intInfo(mod) else std.builtin.Type.Int{ .signedness = .unsigned, - .bits = @intCast(ty.bitSize(mod)), + .bits = @intCast(ty.bitSize(pt)), }; const shift = math.cast(u6, 64 - int_info.bits % 64) orelse return; try self.spillEflagsIfOccupied(); @@ -19177,8 +19278,9 @@ fn truncateRegister(self: *Self, ty: Type, reg: Register) !void { } fn regBitSize(self: *Self, ty: Type) u64 { - const mod = self.bin_file.comp.module.?; - const abi_size = ty.abiSize(mod); + const pt = self.pt; + const mod = pt.zcu; + const abi_size = ty.abiSize(pt); return switch (ty.zigTypeTag(mod)) { else => switch (abi_size) { 1 => 8, @@ -19196,8 +19298,7 @@ fn regBitSize(self: *Self, ty: Type) u64 { } fn regExtraBits(self: *Self, ty: Type) u64 { - const mod = self.bin_file.comp.module.?; - return self.regBitSize(ty) - ty.bitSize(mod); + return self.regBitSize(ty) - ty.bitSize(self.pt); } fn hasFeature(self: *Self, feature: Target.x86.Feature) bool { @@ -19211,12 +19312,14 @@ fn hasAllFeatures(self: *Self, features: anytype) bool { } fn typeOf(self: *Self, inst: Air.Inst.Ref) Type { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; return self.air.typeOf(inst, &mod.intern_pool); } fn typeOfIndex(self: *Self, inst: Air.Inst.Index) Type { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; return self.air.typeOfIndex(inst, &mod.intern_pool); } @@ -19268,7 +19371,8 @@ fn floatLibcAbiSuffix(ty: Type) []const u8 { } fn promoteInt(self: *Self, ty: Type) Type { - const mod = self.bin_file.comp.module.?; + const pt = self.pt; + const mod = pt.zcu; const int_info: InternPool.Key.IntType = switch (ty.toIntern()) { .bool_type => .{ .signedness = .unsigned, .bits = 1 }, else => if (ty.isAbiInt(mod)) ty.intInfo(mod) else return ty, |