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| author | Jakub Konka <kubkon@jakubkonka.com> | 2021-12-29 13:38:49 +0100 |
|---|---|---|
| committer | Jakub Konka <kubkon@jakubkonka.com> | 2021-12-29 22:06:38 +0100 |
| commit | 08ea1a2eab9472389d57ddbd97e307fcb096a992 (patch) | |
| tree | 6f546b4f1cc266f56fd9640713ae3de750c64504 /src/arch/x86_64/CodeGen.zig | |
| parent | be5130ec535456559497ac241ac9fa76c4bbb8ca (diff) | |
| download | zig-08ea1a2eab9472389d57ddbd97e307fcb096a992.tar.gz zig-08ea1a2eab9472389d57ddbd97e307fcb096a992.zip | |
stage2: add separate tag for MI encoding
To request memory-immediate encoding at the MIR side, we should now
use a new tag such as `mov_mem_imm` where the size of the memory
pointer is encoded as the flags:
```
0b00 => .byte_ptr,
0b01 => .word_ptr,
0b10 => .dword_ptr,
0b11 => .qword_ptr,
```
Diffstat (limited to 'src/arch/x86_64/CodeGen.zig')
| -rw-r--r-- | src/arch/x86_64/CodeGen.zig | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/src/arch/x86_64/CodeGen.zig b/src/arch/x86_64/CodeGen.zig index 927e7827ea..4d83f21fef 100644 --- a/src/arch/x86_64/CodeGen.zig +++ b/src/arch/x86_64/CodeGen.zig @@ -1646,7 +1646,7 @@ fn genBinMathOpMir( _ = try self.addInst(.{ .tag = mir_tag, .ops = (Mir.Ops{ - .reg1 = registerAlias(dst_reg, 4), + .reg1 = dst_reg.to32(), }).encode(), .data = .{ .imm = @intCast(i32, imm) }, }); @@ -2807,10 +2807,10 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerErro .operand = @bitCast(i32, @intCast(u32, x_big)), }); _ = try self.addInst(.{ - .tag = .mov, + .tag = .mov_mem_imm, .ops = (Mir.Ops{ .reg1 = .rbp, - .flags = 0b11, + .flags = 0b10, }).encode(), .data = .{ .payload = payload }, }); @@ -2828,10 +2828,10 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerErro .operand = @bitCast(i32, @truncate(u32, x_big >> 32)), }); _ = try self.addInst(.{ - .tag = .mov, + .tag = .mov_mem_imm, .ops = (Mir.Ops{ .reg1 = .rbp, - .flags = 0b11, + .flags = 0b10, }).encode(), .data = .{ .payload = payload }, }); @@ -2842,10 +2842,10 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerErro .operand = @bitCast(i32, @truncate(u32, x_big)), }); _ = try self.addInst(.{ - .tag = .mov, + .tag = .mov_mem_imm, .ops = (Mir.Ops{ .reg1 = .rbp, - .flags = 0b11, + .flags = 0b10, }).encode(), .data = .{ .payload = payload }, }); @@ -2955,11 +2955,10 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void } if (x <= math.maxInt(i32)) { // Next best case: if we set the lower four bytes, the upper four will be zeroed. - // TODO I am not quite sure why we need to set the size of the register here... _ = try self.addInst(.{ .tag = .mov, .ops = (Mir.Ops{ - .reg1 = registerAlias(reg, 4), + .reg1 = reg.to32(), }).encode(), .data = .{ .imm = @intCast(i32, x) }, }); @@ -2985,9 +2984,10 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void // We need the offset from RIP in a signed i32 twos complement. const payload = try self.addExtra(Mir.Imm64.encode(code_offset)); _ = try self.addInst(.{ - .tag = .lea_rip, + .tag = .lea, .ops = (Mir.Ops{ .reg1 = reg, + .flags = 0b01, }).encode(), .data = .{ .payload = payload }, }); @@ -3011,10 +3011,10 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void if (self.bin_file.options.pie) { // TODO we should flag up `x` as GOT symbol entry explicitly rather than as a hack. _ = try self.addInst(.{ - .tag = .lea_rip, + .tag = .lea, .ops = (Mir.Ops{ .reg1 = reg, - .flags = 0b01, + .flags = 0b10, }).encode(), .data = .{ .got_entry = @intCast(u32, x) }, }); |