diff options
| author | Matthew Lugg <mlugg@mlugg.co.uk> | 2024-09-16 22:04:06 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-09-16 22:04:06 +0100 |
| commit | 7caa3d9da71c38665340247a1c2bf9bedb8db925 (patch) | |
| tree | dcb7637f26db5363d0bdc3c60fd05660f8a371fd /src/arch/riscv64/CodeGen.zig | |
| parent | f3445f8f6935b4532aab3f339f5d86319d2dca72 (diff) | |
| parent | 7f60d2e4658ad78839ce0fce63a95dbcb893a256 (diff) | |
| download | zig-7caa3d9da71c38665340247a1c2bf9bedb8db925.tar.gz zig-7caa3d9da71c38665340247a1c2bf9bedb8db925.zip | |
Merge pull request #21425 from mlugg/pointer-arith-inplace-res-ty
compiler: provide correct result types to `+=` and `-=`
Diffstat (limited to 'src/arch/riscv64/CodeGen.zig')
| -rw-r--r-- | src/arch/riscv64/CodeGen.zig | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/src/arch/riscv64/CodeGen.zig b/src/arch/riscv64/CodeGen.zig index 0c6da840eb..73fa0460de 100644 --- a/src/arch/riscv64/CodeGen.zig +++ b/src/arch/riscv64/CodeGen.zig @@ -3897,7 +3897,7 @@ fn airArrayElemVal(func: *Func, inst: Air.Inst.Index) !void { if (array_ty.isVector(zcu)) { // we need to load the vector, vslidedown to get the element we want - // and store that element at in a load frame. + // and store that element in a load frame. const src_reg, const src_lock = try func.allocReg(.vector); defer func.register_manager.unlockReg(src_lock); @@ -3970,12 +3970,15 @@ fn airPtrElemVal(func: *Func, inst: Air.Inst.Index) !void { }; defer if (index_lock) |lock| func.register_manager.unlockReg(lock); - const elem_ptr_reg = if (base_ptr_mcv.isRegister() and func.liveness.operandDies(inst, 0)) - base_ptr_mcv.register - else - try func.copyToTmpRegister(base_ptr_ty, base_ptr_mcv); - const elem_ptr_lock = func.register_manager.lockRegAssumeUnused(elem_ptr_reg); - defer func.register_manager.unlockReg(elem_ptr_lock); + const elem_ptr_reg, const elem_ptr_lock = if (base_ptr_mcv.isRegister() and + func.liveness.operandDies(inst, 0)) + .{ base_ptr_mcv.register, null } + else blk: { + const reg, const lock = try func.allocReg(.int); + try func.genSetReg(base_ptr_ty, reg, base_ptr_mcv); + break :blk .{ reg, lock }; + }; + defer if (elem_ptr_lock) |lock| func.register_manager.unlockReg(lock); try func.genBinOp( .ptr_add, |
