stage2 AArch64: implement airCmp

1 files changed, 25 insertions, 0 deletions

diff --git a/src/arch/aarch64/Emit.zig b/src/arch/aarch64/Emit.zig
index 665d529245..b5ca0686a1 100644
--- a/src/arch/aarch64/Emit.zig
+++ b/src/arch/aarch64/Emit.zig
@@ -65,6 +65,7 @@ pub fn emitMir(
         const inst = @intCast(u32, index);
         switch (tag) {
             .add_immediate => try emit.mirAddSubtractImmediate(inst),
+            .cmp_immediate => try emit.mirAddSubtractImmediate(inst),
             .sub_immediate => try emit.mirAddSubtractImmediate(inst),
 
             .b => try emit.mirBranch(inst),
@@ -78,6 +79,8 @@ pub fn emitMir(
 
             .call_extern => try emit.mirCallExtern(inst),
 
+            .cmp_shifted_register => try emit.mirAddSubtractShiftedRegister(inst),
+
             .dbg_line => try emit.mirDbgLine(inst),
 
             .dbg_prologue_end => try emit.mirDebugPrologueEnd(),
@@ -347,6 +350,12 @@ fn mirAddSubtractImmediate(emit: *Emit, inst: Mir.Inst.Index) !void {
             rr_imm12_sh.imm12,
             rr_imm12_sh.sh == 1,
         )),
+        .cmp_immediate => try emit.writeInstruction(Instruction.subs(
+            rr_imm12_sh.rd,
+            rr_imm12_sh.rn,
+            rr_imm12_sh.imm12,
+            rr_imm12_sh.sh == 1,
+        )),
         .sub_immediate => try emit.writeInstruction(Instruction.sub(
             rr_imm12_sh.rd,
             rr_imm12_sh.rn,
@@ -453,6 +462,22 @@ fn mirCallExtern(emit: *Emit, inst: Mir.Inst.Index) !void {
     }
 }
 
+fn mirAddSubtractShiftedRegister(emit: *Emit, inst: Mir.Inst.Index) !void {
+    const tag = emit.mir.instructions.items(.tag)[inst];
+    const rrr_imm6_shift = emit.mir.instructions.items(.data)[inst].rrr_imm6_shift;
+
+    switch (tag) {
+        .cmp_shifted_register => try emit.writeInstruction(Instruction.subsShiftedRegister(
+            rrr_imm6_shift.rd,
+            rrr_imm6_shift.rn,
+            rrr_imm6_shift.rm,
+            rrr_imm6_shift.shift,
+            rrr_imm6_shift.imm6,
+        )),
+        else => unreachable,
+    }
+}
+
 fn mirLoadMemory(emit: *Emit, inst: Mir.Inst.Index) !void {
     assert(emit.mir.instructions.items(.tag)[inst] == .load_memory);
     const payload = emit.mir.instructions.items(.data)[inst].payload;