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| author | Alex Rønne Petersen <alex@alexrp.com> | 2025-02-18 05:25:36 +0100 |
|---|---|---|
| committer | Alex Rønne Petersen <alex@alexrp.com> | 2025-06-05 06:12:00 +0200 |
| commit | 9d534790ebc869ec933e932abe4be8b9e3593bbc (patch) | |
| tree | 70652dde381fd0c0d536d8e7665e725e0924bb51 /src/Type.zig | |
| parent | 14873f9a3434a0d753ca8438f389a7931956cf26 (diff) | |
| download | zig-9d534790ebc869ec933e932abe4be8b9e3593bbc.tar.gz zig-9d534790ebc869ec933e932abe4be8b9e3593bbc.zip | |
std.Target: Introduce Cpu convenience functions for feature tests.
Before:
* std.Target.arm.featureSetHas(target.cpu.features, .has_v7)
* std.Target.x86.featureSetHasAny(target.cpu.features, .{ .sse, .avx, .cmov })
* std.Target.wasm.featureSetHasAll(target.cpu.features, .{ .atomics, .bulk_memory })
After:
* target.cpu.has(.arm, .has_v7)
* target.cpu.hasAny(.x86, &.{ .sse, .avx, .cmov })
* target.cpu.hasAll(.wasm, &.{ .atomics, .bulk_memory })
Diffstat (limited to 'src/Type.zig')
| -rw-r--r-- | src/Type.zig | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/Type.zig b/src/Type.zig index 995ee4992e..00f1c70129 100644 --- a/src/Type.zig +++ b/src/Type.zig @@ -993,8 +993,8 @@ pub fn abiAlignmentInner( }, .stage2_x86_64 => { if (vector_type.child == .bool_type) { - if (vector_type.len > 256 and std.Target.x86.featureSetHas(target.cpu.features, .avx512f)) return .{ .scalar = .@"64" }; - if (vector_type.len > 128 and std.Target.x86.featureSetHas(target.cpu.features, .avx)) return .{ .scalar = .@"32" }; + if (vector_type.len > 256 and target.cpu.has(.x86, .avx512f)) return .{ .scalar = .@"64" }; + if (vector_type.len > 128 and target.cpu.has(.x86, .avx)) return .{ .scalar = .@"32" }; if (vector_type.len > 64) return .{ .scalar = .@"16" }; const bytes = std.math.divCeil(u32, vector_type.len, 8) catch unreachable; const alignment = std.math.ceilPowerOfTwoAssert(u32, bytes); @@ -1003,8 +1003,8 @@ pub fn abiAlignmentInner( const elem_bytes: u32 = @intCast((try Type.fromInterned(vector_type.child).abiSizeInner(strat, zcu, tid)).scalar); if (elem_bytes == 0) return .{ .scalar = .@"1" }; const bytes = elem_bytes * vector_type.len; - if (bytes > 32 and std.Target.x86.featureSetHas(target.cpu.features, .avx512f)) return .{ .scalar = .@"64" }; - if (bytes > 16 and std.Target.x86.featureSetHas(target.cpu.features, .avx)) return .{ .scalar = .@"32" }; + if (bytes > 32 and target.cpu.has(.x86, .avx512f)) return .{ .scalar = .@"64" }; + if (bytes > 16 and target.cpu.has(.x86, .avx)) return .{ .scalar = .@"32" }; return .{ .scalar = .@"16" }; }, } |
