aboutsummaryrefslogtreecommitdiff
path: root/src-self-hosted/codegen/x86.zig
diff options
context:
space:
mode:
authorAndrew Kelley <andrew@ziglang.org>2020-05-17 13:53:27 -0400
committerGitHub <noreply@github.com>2020-05-17 13:53:27 -0400
commit16f100b82e4075a047f008c0de6c44fc418eb58e (patch)
tree93555fbcba29bcd1120349a03ae6904321cb7718 /src-self-hosted/codegen/x86.zig
parent9a22c8b6ca98fd01795f8cd4f3e9d92311175f13 (diff)
parentb0968abccbfb4072528c3b5e039bc03b27af89a1 (diff)
downloadzig-16f100b82e4075a047f008c0de6c44fc418eb58e.tar.gz
zig-16f100b82e4075a047f008c0de6c44fc418eb58e.zip
Merge pull request #5307 from ziglang/self-hosted-incremental-compilation
rework self-hosted compiler for incremental builds
Diffstat (limited to 'src-self-hosted/codegen/x86.zig')
-rw-r--r--src-self-hosted/codegen/x86.zig30
1 files changed, 30 insertions, 0 deletions
diff --git a/src-self-hosted/codegen/x86.zig b/src-self-hosted/codegen/x86.zig
new file mode 100644
index 0000000000..60872dedb9
--- /dev/null
+++ b/src-self-hosted/codegen/x86.zig
@@ -0,0 +1,30 @@
+// zig fmt: off
+pub const Register = enum(u8) {
+ // 0 through 7, 32-bit registers. id is int value
+ eax, ecx, edx, ebx, esp, ebp, esi, edi,
+
+ // 8-15, 16-bit registers. id is int value - 8.
+ ax, cx, dx, bx, sp, bp, si, di,
+
+ // 16-23, 8-bit registers. id is int value - 16.
+ al, bl, cl, dl, ah, ch, dh, bh,
+
+ /// Returns the bit-width of the register.
+ pub fn size(self: @This()) u7 {
+ return switch (@enumToInt(self)) {
+ 0...7 => 32,
+ 8...15 => 16,
+ 16...23 => 8,
+ else => unreachable,
+ };
+ }
+
+ /// Returns the register's id. This is used in practically every opcode the
+ /// x86 has. It is embedded in some instructions, such as the `B8 +rd` move
+ /// instruction, and is used in the R/M byte.
+ pub fn id(self: @This()) u3 {
+ return @truncate(u3, @enumToInt(self));
+ }
+};
+
+// zig fmt: on