aboutsummaryrefslogtreecommitdiff
path: root/lib
diff options
context:
space:
mode:
authorJakub Konka <kubkon@jakubkonka.com>2021-05-09 14:16:40 +0200
committerGitHub <noreply@github.com>2021-05-09 14:16:40 +0200
commit15d6efecfbe8be46e5dbd7765f0ef9726144db5d (patch)
tree52ae14da99142a28722fb11f83efcfd57ca81a9d /lib
parent2299e5ff1dc924a2dca0c0c2def6f1e7b71a668f (diff)
parentf2a33688913cd36b1aee0b27a4a1de2cfb1cc04e (diff)
downloadzig-15d6efecfbe8be46e5dbd7765f0ef9726144db5d.tar.gz
zig-15d6efecfbe8be46e5dbd7765f0ef9726144db5d.zip
Merge pull request #8709 from joachimschmidt557/stage2-arm
stage2 ARM: Generate correct code when spilling registers
Diffstat (limited to 'lib')
0 files changed, 0 insertions, 0 deletions