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| author | Andrew Kelley <andrew@ziglang.org> | 2021-02-27 15:57:01 -0700 |
|---|---|---|
| committer | Andrew Kelley <andrew@ziglang.org> | 2021-02-27 15:57:01 -0700 |
| commit | e02acc028825ec83951946e4947883c2c96211ce (patch) | |
| tree | 9318e3538cb165e831d2a8518ffadab0eb7656ff /lib/std | |
| parent | 9082d761684b0717c45db93964bb7e569702af99 (diff) | |
| download | zig-e02acc028825ec83951946e4947883c2c96211ce.tar.gz zig-e02acc028825ec83951946e4947883c2c96211ce.zip | |
tools/update_cpu_features: better patching API
With this change, added & modified cpus & features participate in the
same pruning system, and sorting takes into account the zig name, not
the pre-modified llvm name.
The modified target files in this commit are due to the improved
sorting and pruning.
The script now fully supports extra cpus & features.
Diffstat (limited to 'lib/std')
| -rw-r--r-- | lib/std/target/amdgpu.zig | 12 | ||||
| -rw-r--r-- | lib/std/target/powerpc.zig | 24 | ||||
| -rw-r--r-- | lib/std/target/riscv.zig | 2 | ||||
| -rw-r--r-- | lib/std/target/x86.zig | 264 |
4 files changed, 150 insertions, 152 deletions
diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig index 27168a9508..6e36a34a5a 100644 --- a/lib/std/target/amdgpu.zig +++ b/lib/std/target/amdgpu.zig @@ -41,8 +41,8 @@ pub const Feature = enum { get_wave_id_inst, gfx10, gfx10_3_insts, - gfx10_insts, gfx10_b_encoding, + gfx10_insts, gfx7_gfx8_gfx9_insts, gfx8_insts, gfx9, @@ -347,16 +347,16 @@ pub const all_features = blk: { .description = "Additional instructions for GFX10.3", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.gfx10_insts)] = .{ - .llvm_name = "gfx10-insts", - .description = "Additional instructions for GFX10+", - .dependencies = featureSet(&[_]Feature{}), - }; result[@enumToInt(Feature.gfx10_b_encoding)] = .{ .llvm_name = "gfx10_b-encoding", .description = "Encoding format GFX10_B", .dependencies = featureSet(&[_]Feature{}), }; + result[@enumToInt(Feature.gfx10_insts)] = .{ + .llvm_name = "gfx10-insts", + .description = "Additional instructions for GFX10+", + .dependencies = featureSet(&[_]Feature{}), + }; result[@enumToInt(Feature.gfx7_gfx8_gfx9_insts)] = .{ .llvm_name = "gfx7-gfx8-gfx9-insts", .description = "Instructions shared in GFX7, GFX8, GFX9", diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig index bed614088f..4e2200a47f 100644 --- a/lib/std/target/powerpc.zig +++ b/lib/std/target/powerpc.zig @@ -56,10 +56,10 @@ pub const Feature = enum { power8_vector, power9_altivec, power9_vector, - ppc_postra_sched, - ppc_prera_sched, ppc4xx, ppc6xx, + ppc_postra_sched, + ppc_prera_sched, predictable_select_expensive, prefix_instrs, recipprec, @@ -397,16 +397,6 @@ pub const all_features = blk: { .power9_altivec, }), }; - result[@enumToInt(Feature.ppc_postra_sched)] = .{ - .llvm_name = "ppc-postra-sched", - .description = "Use PowerPC post-RA scheduling strategy", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.ppc_prera_sched)] = .{ - .llvm_name = "ppc-prera-sched", - .description = "Use PowerPC pre-RA scheduling strategy", - .dependencies = featureSet(&[_]Feature{}), - }; result[@enumToInt(Feature.ppc4xx)] = .{ .llvm_name = "ppc4xx", .description = "Enable PPC 4xx instructions", @@ -417,6 +407,16 @@ pub const all_features = blk: { .description = "Enable PPC 6xx instructions", .dependencies = featureSet(&[_]Feature{}), }; + result[@enumToInt(Feature.ppc_postra_sched)] = .{ + .llvm_name = "ppc-postra-sched", + .description = "Use PowerPC post-RA scheduling strategy", + .dependencies = featureSet(&[_]Feature{}), + }; + result[@enumToInt(Feature.ppc_prera_sched)] = .{ + .llvm_name = "ppc-prera-sched", + .description = "Use PowerPC pre-RA scheduling strategy", + .dependencies = featureSet(&[_]Feature{}), + }; result[@enumToInt(Feature.predictable_select_expensive)] = .{ .llvm_name = "predictable-select-expensive", .description = "Prefer likely predicted branches over selects", diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig index eb70e609c4..5b19a936cf 100644 --- a/lib/std/target/riscv.zig +++ b/lib/std/target/riscv.zig @@ -390,7 +390,6 @@ pub const cpu = struct { .a, .c, .d, - .f, .m, }), }; @@ -402,7 +401,6 @@ pub const cpu = struct { .a, .c, .d, - .f, .m, }), }; diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig index 34fb64d7cc..eeb773b034 100644 --- a/lib/std/target/x86.zig +++ b/lib/std/target/x86.zig @@ -121,12 +121,12 @@ pub const Feature = enum { slow_unaligned_mem_32, soft_float, sse, - sse_unaligned_mem, sse2, sse3, sse4_1, sse4_2, sse4a, + sse_unaligned_mem, ssse3, tbm, tsxldtrk, @@ -805,11 +805,6 @@ pub const all_features = blk: { .description = "Enable SSE instructions", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.sse_unaligned_mem)] = .{ - .llvm_name = "sse-unaligned-mem", - .description = "Allow unaligned memory operands with SSE instructions", - .dependencies = featureSet(&[_]Feature{}), - }; result[@enumToInt(Feature.sse2)] = .{ .llvm_name = "sse2", .description = "Enable SSE2 instructions", @@ -845,6 +840,11 @@ pub const all_features = blk: { .sse3, }), }; + result[@enumToInt(Feature.sse_unaligned_mem)] = .{ + .llvm_name = "sse-unaligned-mem", + .description = "Allow unaligned memory operands with SSE instructions", + .dependencies = featureSet(&[_]Feature{}), + }; result[@enumToInt(Feature.ssse3)] = .{ .llvm_name = "ssse3", .description = "Enable SSSE3 instructions", @@ -962,6 +962,45 @@ pub const all_features = blk: { }; pub const cpu = struct { + pub const _i386 = CpuModel{ + .name = "_i386", + .llvm_name = "i386", + .features = featureSet(&[_]Feature{ + .slow_unaligned_mem_16, + .vzeroupper, + .x87, + }), + }; + pub const _i486 = CpuModel{ + .name = "_i486", + .llvm_name = "i486", + .features = featureSet(&[_]Feature{ + .slow_unaligned_mem_16, + .vzeroupper, + .x87, + }), + }; + pub const _i586 = CpuModel{ + .name = "_i586", + .llvm_name = "i586", + .features = featureSet(&[_]Feature{ + .cx8, + .slow_unaligned_mem_16, + .vzeroupper, + .x87, + }), + }; + pub const _i686 = CpuModel{ + .name = "_i686", + .llvm_name = "i686", + .features = featureSet(&[_]Feature{ + .cmov, + .cx8, + .slow_unaligned_mem_16, + .vzeroupper, + .x87, + }), + }; pub const alderlake = CpuModel{ .name = "alderlake", .llvm_name = "alderlake", @@ -1049,43 +1088,45 @@ pub const cpu = struct { .x87, }), }; - pub const athlon_4 = CpuModel{ - .name = "athlon_4", - .llvm_name = "athlon-4", + pub const athlon64 = CpuModel{ + .name = "athlon64", + .llvm_name = "athlon64", .features = featureSet(&[_]Feature{ .@"3dnowa", + .@"64bit", .cmov, .cx8, + .fast_scalar_shift_masks, .fxsr, .nopl, .slow_shld, .slow_unaligned_mem_16, - .sse, + .sse2, .vzeroupper, .x87, }), }; - pub const athlon_fx = CpuModel{ - .name = "athlon_fx", - .llvm_name = "athlon-fx", + pub const athlon64_sse3 = CpuModel{ + .name = "athlon64_sse3", + .llvm_name = "athlon64-sse3", .features = featureSet(&[_]Feature{ .@"3dnowa", .@"64bit", .cmov, - .cx8, + .cx16, .fast_scalar_shift_masks, .fxsr, .nopl, .slow_shld, .slow_unaligned_mem_16, - .sse2, + .sse3, .vzeroupper, .x87, }), }; - pub const athlon_mp = CpuModel{ - .name = "athlon_mp", - .llvm_name = "athlon-mp", + pub const athlon_4 = CpuModel{ + .name = "athlon_4", + .llvm_name = "athlon-4", .features = featureSet(&[_]Feature{ .@"3dnowa", .cmov, @@ -1099,23 +1140,27 @@ pub const cpu = struct { .x87, }), }; - pub const athlon_tbird = CpuModel{ - .name = "athlon_tbird", - .llvm_name = "athlon-tbird", + pub const athlon_fx = CpuModel{ + .name = "athlon_fx", + .llvm_name = "athlon-fx", .features = featureSet(&[_]Feature{ .@"3dnowa", + .@"64bit", .cmov, .cx8, + .fast_scalar_shift_masks, + .fxsr, .nopl, .slow_shld, .slow_unaligned_mem_16, + .sse2, .vzeroupper, .x87, }), }; - pub const athlon_xp = CpuModel{ - .name = "athlon_xp", - .llvm_name = "athlon-xp", + pub const athlon_mp = CpuModel{ + .name = "athlon_mp", + .llvm_name = "athlon-mp", .features = featureSet(&[_]Feature{ .@"3dnowa", .cmov, @@ -1129,38 +1174,32 @@ pub const cpu = struct { .x87, }), }; - pub const athlon64 = CpuModel{ - .name = "athlon64", - .llvm_name = "athlon64", + pub const athlon_tbird = CpuModel{ + .name = "athlon_tbird", + .llvm_name = "athlon-tbird", .features = featureSet(&[_]Feature{ .@"3dnowa", - .@"64bit", .cmov, .cx8, - .fast_scalar_shift_masks, - .fxsr, .nopl, .slow_shld, .slow_unaligned_mem_16, - .sse2, .vzeroupper, .x87, }), }; - pub const athlon64_sse3 = CpuModel{ - .name = "athlon64_sse3", - .llvm_name = "athlon64-sse3", + pub const athlon_xp = CpuModel{ + .name = "athlon_xp", + .llvm_name = "athlon-xp", .features = featureSet(&[_]Feature{ .@"3dnowa", - .@"64bit", .cmov, - .cx16, - .fast_scalar_shift_masks, + .cx8, .fxsr, .nopl, .slow_shld, .slow_unaligned_mem_16, - .sse3, + .sse, .vzeroupper, .x87, }), @@ -1637,33 +1676,22 @@ pub const cpu = struct { .xsaves, }), }; - pub const core_avx_i = CpuModel{ - .name = "core_avx_i", - .llvm_name = "core-avx-i", + pub const core2 = CpuModel{ + .name = "core2", + .llvm_name = "core2", .features = featureSet(&[_]Feature{ .@"64bit", .cmov, .cx16, - .f16c, - .false_deps_popcnt, - .fast_15bytenop, - .fast_scalar_fsqrt, - .fast_shld_rotate, - .fsgsbase, .fxsr, - .idivq_to_divl, .macrofusion, .mmx, .nopl, - .pclmul, - .popcnt, - .rdrnd, .sahf, - .slow_3ops_lea, - .slow_unaligned_mem_32, + .slow_unaligned_mem_16, + .ssse3, .vzeroupper, .x87, - .xsaveopt, }), }; pub const core_avx2 = CpuModel{ @@ -1704,22 +1732,33 @@ pub const cpu = struct { .xsaveopt, }), }; - pub const core2 = CpuModel{ - .name = "core2", - .llvm_name = "core2", + pub const core_avx_i = CpuModel{ + .name = "core_avx_i", + .llvm_name = "core-avx-i", .features = featureSet(&[_]Feature{ .@"64bit", .cmov, .cx16, + .f16c, + .false_deps_popcnt, + .fast_15bytenop, + .fast_scalar_fsqrt, + .fast_shld_rotate, + .fsgsbase, .fxsr, + .idivq_to_divl, .macrofusion, .mmx, .nopl, + .pclmul, + .popcnt, + .rdrnd, .sahf, - .slow_unaligned_mem_16, - .ssse3, + .slow_3ops_lea, + .slow_unaligned_mem_32, .vzeroupper, .x87, + .xsaveopt, }), }; pub const corei7 = CpuModel{ @@ -1900,45 +1939,6 @@ pub const cpu = struct { .xsaveopt, }), }; - pub const _i386 = CpuModel{ - .name = "_i386", - .llvm_name = "i386", - .features = featureSet(&[_]Feature{ - .slow_unaligned_mem_16, - .vzeroupper, - .x87, - }), - }; - pub const _i486 = CpuModel{ - .name = "_i486", - .llvm_name = "i486", - .features = featureSet(&[_]Feature{ - .slow_unaligned_mem_16, - .vzeroupper, - .x87, - }), - }; - pub const _i586 = CpuModel{ - .name = "_i586", - .llvm_name = "i586", - .features = featureSet(&[_]Feature{ - .cx8, - .slow_unaligned_mem_16, - .vzeroupper, - .x87, - }), - }; - pub const _i686 = CpuModel{ - .name = "_i686", - .llvm_name = "i686", - .features = featureSet(&[_]Feature{ - .cmov, - .cx8, - .slow_unaligned_mem_16, - .vzeroupper, - .x87, - }), - }; pub const icelake_client = CpuModel{ .name = "icelake_client", .llvm_name = "icelake-client", @@ -2341,32 +2341,6 @@ pub const cpu = struct { .x87, }), }; - pub const pentium_m = CpuModel{ - .name = "pentium_m", - .llvm_name = "pentium-m", - .features = featureSet(&[_]Feature{ - .cmov, - .cx8, - .fxsr, - .mmx, - .nopl, - .slow_unaligned_mem_16, - .sse2, - .vzeroupper, - .x87, - }), - }; - pub const pentium_mmx = CpuModel{ - .name = "pentium_mmx", - .llvm_name = "pentium-mmx", - .features = featureSet(&[_]Feature{ - .cx8, - .mmx, - .slow_unaligned_mem_16, - .vzeroupper, - .x87, - }), - }; pub const pentium2 = CpuModel{ .name = "pentium2", .llvm_name = "pentium2", @@ -2441,6 +2415,32 @@ pub const cpu = struct { .x87, }), }; + pub const pentium_m = CpuModel{ + .name = "pentium_m", + .llvm_name = "pentium-m", + .features = featureSet(&[_]Feature{ + .cmov, + .cx8, + .fxsr, + .mmx, + .nopl, + .slow_unaligned_mem_16, + .sse2, + .vzeroupper, + .x87, + }), + }; + pub const pentium_mmx = CpuModel{ + .name = "pentium_mmx", + .llvm_name = "pentium-mmx", + .features = featureSet(&[_]Feature{ + .cx8, + .mmx, + .slow_unaligned_mem_16, + .vzeroupper, + .x87, + }), + }; pub const pentiumpro = CpuModel{ .name = "pentiumpro", .llvm_name = "pentiumpro", @@ -2894,21 +2894,21 @@ pub const cpu = struct { .x87, }), }; - pub const winchip_c6 = CpuModel{ - .name = "winchip_c6", - .llvm_name = "winchip-c6", + pub const winchip2 = CpuModel{ + .name = "winchip2", + .llvm_name = "winchip2", .features = featureSet(&[_]Feature{ - .mmx, + .@"3dnow", .slow_unaligned_mem_16, .vzeroupper, .x87, }), }; - pub const winchip2 = CpuModel{ - .name = "winchip2", - .llvm_name = "winchip2", + pub const winchip_c6 = CpuModel{ + .name = "winchip_c6", + .llvm_name = "winchip-c6", .features = featureSet(&[_]Feature{ - .@"3dnow", + .mmx, .slow_unaligned_mem_16, .vzeroupper, .x87, |
