Merge remote-tracking branch 'origin/llvm12'

Happy LLVM 12 Release Day.

Please note that the llvm 12 tag does not include the latest commit in
the release/12.x branch, which is in fact a bug fix for a regression
that is causing a failure in Zig's test suite.

Zig master branch is tracking release/12.x, and will be enabling the
test that is fixed by that commit.

21 files changed, 1549 insertions, 1102 deletions

diff --git a/lib/std/dwarf.zig b/lib/std/dwarf.zig
index 7df3a1bff6..602eddeaaf 100644
--- a/lib/std/dwarf.zig
+++ b/lib/std/dwarf.zig
@@ -157,6 +157,7 @@ const LineNumberProgram = struct {
     include_dirs: []const []const u8,
     file_entries: *ArrayList(FileEntry),
 
+    prev_valid: bool,
     prev_address: usize,
     prev_file: usize,
     prev_line: i64,
@@ -175,6 +176,7 @@ const LineNumberProgram = struct {
         self.basic_block = false;
         self.end_sequence = false;
         // Invalidate all the remaining fields
+        self.prev_valid = false;
         self.prev_address = 0;
         self.prev_file = undefined;
         self.prev_line = undefined;
@@ -197,6 +199,7 @@ const LineNumberProgram = struct {
             .file_entries = file_entries,
             .default_is_stmt = is_stmt,
             .target_address = target_address,
+            .prev_valid = false,
             .prev_address = 0,
             .prev_file = undefined,
             .prev_line = undefined,
@@ -208,7 +211,7 @@ const LineNumberProgram = struct {
     }
 
     pub fn checkLineMatch(self: *LineNumberProgram) !?debug.LineInfo {
-        if (self.target_address >= self.prev_address and self.target_address < self.address) {
+        if (self.prev_valid and self.target_address >= self.prev_address and self.target_address < self.address) {
             const file_entry = if (self.prev_file == 0) {
                 return error.MissingDebugInfo;
             } else if (self.prev_file - 1 >= self.file_entries.items.len) {
@@ -228,6 +231,7 @@ const LineNumberProgram = struct {
             };
         }
 
+        self.prev_valid = true;
         self.prev_address = self.address;
         self.prev_file = self.file;
         self.prev_line = self.line;
diff --git a/lib/std/target.zig b/lib/std/target.zig
index b3c417c348..3372f617a8 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -36,11 +36,11 @@ pub const Target = struct {
             openbsd,
             solaris,
             windows,
+            zos,
             haiku,
             minix,
             rtems,
             nacl,
-            cnk,
             aix,
             cuda,
             nvcl,
@@ -232,11 +232,11 @@ pub const Target = struct {
                     .kfreebsd,
                     .lv2,
                     .solaris,
+                    .zos,
                     .haiku,
                     .minix,
                     .rtems,
                     .nacl,
-                    .cnk,
                     .aix,
                     .cuda,
                     .nvcl,
@@ -391,10 +391,10 @@ pub const Target = struct {
                 .kfreebsd,
                 .lv2,
                 .solaris,
+                .zos,
                 .minix,
                 .rtems,
                 .nacl,
-                .cnk,
                 .aix,
                 .cuda,
                 .nvcl,
@@ -430,8 +430,8 @@ pub const Target = struct {
     pub const powerpc = @import("target/powerpc.zig");
     pub const riscv = @import("target/riscv.zig");
     pub const sparc = @import("target/sparc.zig");
-    pub const spirv = @import("target/spirv.zig");
     pub const systemz = @import("target/systemz.zig");
+    pub const ve = @import("target/ve.zig");
     pub const wasm = @import("target/wasm.zig");
     pub const x86 = @import("target/x86.zig");
 
@@ -443,6 +443,7 @@ pub const Target = struct {
         gnueabi,
         gnueabihf,
         gnux32,
+        gnuilp32,
         code16,
         eabi,
         eabihf,
@@ -468,10 +469,10 @@ pub const Target = struct {
                 .dragonfly,
                 .lv2,
                 .solaris,
+                .zos,
                 .minix,
                 .rtems,
                 .nacl,
-                .cnk,
                 .aix,
                 .cuda,
                 .nvcl,
@@ -592,7 +593,7 @@ pub const Target = struct {
             pub const Set = struct {
                 ints: [usize_count]usize,
 
-                pub const needed_bit_count = 168;
+                pub const needed_bit_count = 172;
                 pub const byte_count = (needed_bit_count + 7) / 8;
                 pub const usize_count = (byte_count + (@sizeOf(usize) - 1)) / @sizeOf(usize);
                 pub const Index = std.math.Log2Int(std.meta.Int(.unsigned, usize_count * @bitSizeOf(usize)));
@@ -714,6 +715,7 @@ pub const Target = struct {
             avr,
             bpfel,
             bpfeb,
+            csky,
             hexagon,
             mips,
             mipsel,
@@ -721,6 +723,7 @@ pub const Target = struct {
             mips64el,
             msp430,
             powerpc,
+            powerpcle,
             powerpc64,
             powerpc64le,
             r600,
@@ -831,7 +834,7 @@ pub const Target = struct {
                     .le32 => ._NONE,
                     .mips => ._MIPS,
                     .mipsel => ._MIPS_RS3_LE,
-                    .powerpc => ._PPC,
+                    .powerpc, .powerpcle => ._PPC,
                     .r600 => ._NONE,
                     .riscv32 => ._RISCV,
                     .sparc => ._SPARC,
@@ -870,6 +873,7 @@ pub const Target = struct {
                     .amdgcn => ._NONE,
                     .bpfel => ._BPF,
                     .bpfeb => ._BPF,
+                    .csky => ._NONE,
                     .sparcv9 => ._SPARCV9,
                     .s390x => ._S390,
                     .ve => ._NONE,
@@ -890,7 +894,7 @@ pub const Target = struct {
                     .le32 => .Unknown,
                     .mips => .Unknown,
                     .mipsel => .Unknown,
-                    .powerpc => .POWERPC,
+                    .powerpc, .powerpcle => .POWERPC,
                     .r600 => .Unknown,
                     .riscv32 => .RISCV32,
                     .sparc => .Unknown,
@@ -929,6 +933,7 @@ pub const Target = struct {
                     .amdgcn => .Unknown,
                     .bpfel => .Unknown,
                     .bpfeb => .Unknown,
+                    .csky => .Unknown,
                     .sparcv9 => .Unknown,
                     .s390x => .Unknown,
                     .ve => .Unknown,
@@ -948,6 +953,7 @@ pub const Target = struct {
                     .amdil,
                     .amdil64,
                     .bpfel,
+                    .csky,
                     .hexagon,
                     .hsail,
                     .hsail64,
@@ -961,6 +967,7 @@ pub const Target = struct {
                     .nvptx64,
                     .sparcel,
                     .tcele,
+                    .powerpcle,
                     .powerpc64le,
                     .r600,
                     .riscv32,
@@ -1011,11 +1018,13 @@ pub const Target = struct {
                     .arc,
                     .arm,
                     .armeb,
+                    .csky,
                     .hexagon,
                     .le32,
                     .mips,
                     .mipsel,
                     .powerpc,
+                    .powerpcle,
                     .r600,
                     .riscv32,
                     .sparc,
@@ -1065,17 +1074,14 @@ pub const Target = struct {
                 }
             }
 
-            /// Returns a name that matches the lib/std/target/* directory name.
+            /// Returns a name that matches the lib/std/target/* source file name.
             pub fn genericName(arch: Arch) []const u8 {
                 return switch (arch) {
                     .arm, .armeb, .thumb, .thumbeb => "arm",
                     .aarch64, .aarch64_be, .aarch64_32 => "aarch64",
-                    .avr => "avr",
                     .bpfel, .bpfeb => "bpf",
-                    .hexagon => "hexagon",
                     .mips, .mipsel, .mips64, .mips64el => "mips",
-                    .msp430 => "msp430",
-                    .powerpc, .powerpc64, .powerpc64le => "powerpc",
+                    .powerpc, .powerpcle, .powerpc64, .powerpc64le => "powerpc",
                     .amdgcn => "amdgpu",
                     .riscv32, .riscv64 => "riscv",
                     .sparc, .sparcv9, .sparcel => "sparc",
@@ -1098,13 +1104,14 @@ pub const Target = struct {
                     .hexagon => &hexagon.all_features,
                     .mips, .mipsel, .mips64, .mips64el => &mips.all_features,
                     .msp430 => &msp430.all_features,
-                    .powerpc, .powerpc64, .powerpc64le => &powerpc.all_features,
+                    .powerpc, .powerpcle, .powerpc64, .powerpc64le => &powerpc.all_features,
                     .amdgcn => &amdgpu.all_features,
                     .riscv32, .riscv64 => &riscv.all_features,
                     .sparc, .sparcv9, .sparcel => &sparc.all_features,
                     .s390x => &systemz.all_features,
                     .i386, .x86_64 => &x86.all_features,
                     .nvptx, .nvptx64 => &nvptx.all_features,
+                    .ve => &ve.all_features,
                     .wasm32, .wasm64 => &wasm.all_features,
 
                     else => &[0]Cpu.Feature{},
@@ -1121,13 +1128,14 @@ pub const Target = struct {
                     .hexagon => comptime allCpusFromDecls(hexagon.cpu),
                     .mips, .mipsel, .mips64, .mips64el => comptime allCpusFromDecls(mips.cpu),
                     .msp430 => comptime allCpusFromDecls(msp430.cpu),
-                    .powerpc, .powerpc64, .powerpc64le => comptime allCpusFromDecls(powerpc.cpu),
+                    .powerpc, .powerpcle, .powerpc64, .powerpc64le => comptime allCpusFromDecls(powerpc.cpu),
                     .amdgcn => comptime allCpusFromDecls(amdgpu.cpu),
                     .riscv32, .riscv64 => comptime allCpusFromDecls(riscv.cpu),
                     .sparc, .sparcv9, .sparcel => comptime allCpusFromDecls(sparc.cpu),
                     .s390x => comptime allCpusFromDecls(systemz.cpu),
                     .i386, .x86_64 => comptime allCpusFromDecls(x86.cpu),
                     .nvptx, .nvptx64 => comptime allCpusFromDecls(nvptx.cpu),
+                    .ve => comptime allCpusFromDecls(ve.cpu),
                     .wasm32, .wasm64 => comptime allCpusFromDecls(wasm.cpu),
 
                     else => &[0]*const Model{},
@@ -1177,17 +1185,19 @@ pub const Target = struct {
                     .mips64, .mips64el => &mips.cpu.mips64,
                     .msp430 => &msp430.cpu.generic,
                     .powerpc => &powerpc.cpu.ppc32,
+                    .powerpcle => &powerpc.cpu.ppc32,
                     .powerpc64 => &powerpc.cpu.ppc64,
                     .powerpc64le => &powerpc.cpu.ppc64le,
                     .amdgcn => &amdgpu.cpu.generic,
                     .riscv32 => &riscv.cpu.generic_rv32,
                     .riscv64 => &riscv.cpu.generic_rv64,
-                    .sparc, .sparcel => &sparc.cpu.v8,
+                    .sparc, .sparcel => &sparc.cpu.generic,
                     .sparcv9 => &sparc.cpu.v9,
                     .s390x => &systemz.cpu.generic,
                     .i386 => &x86.cpu._i386,
                     .x86_64 => &x86.cpu.x86_64,
                     .nvptx, .nvptx64 => &nvptx.cpu.sm_20,
+                    .ve => &ve.cpu.generic,
                     .wasm32, .wasm64 => &wasm.cpu.generic,
 
                     else => &S.generic_model,
@@ -1201,6 +1211,7 @@ pub const Target = struct {
                     .riscv64 => &riscv.cpu.baseline_rv64,
                     .i386 => &x86.cpu.pentium4,
                     .nvptx, .nvptx64 => &nvptx.cpu.sm_20,
+                    .sparc, .sparcel => &sparc.cpu.v8,
 
                     else => generic(arch),
                 };
@@ -1490,7 +1501,7 @@ pub const Target = struct {
                     return print(&result, "/lib{s}/{s}", .{ lib_suffix, loader });
                 },
 
-                .powerpc => return copy(&result, "/lib/ld.so.1"),
+                .powerpc, .powerpcle => return copy(&result, "/lib/ld.so.1"),
                 .powerpc64, .powerpc64le => return copy(&result, "/lib64/ld64.so.2"),
                 .s390x => return copy(&result, "/lib64/ld64.so.1"),
                 .sparcv9 => return copy(&result, "/lib64/ld-linux.so.2"),
@@ -1519,6 +1530,7 @@ pub const Target = struct {
                 // TODO go over each item in this list and either move it to the above list, or
                 // implement the standard dynamic linker path code for it.
                 .arc,
+                .csky,
                 .hexagon,
                 .msp430,
                 .r600,
@@ -1573,10 +1585,10 @@ pub const Target = struct {
             .kfreebsd,
             .lv2,
             .solaris,
+            .zos,
             .minix,
             .rtems,
             .nacl,
-            .cnk,
             .aix,
             .cuda,
             .nvcl,
diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig
index 9a2b3e7322..03c2031207 100644
--- a/lib/std/target/aarch64.zig
+++ b/lib/std/target/aarch64.zig
@@ -1,14 +1,10 @@
-// SPDX-License-Identifier: MIT
-// Copyright (c) 2015-2021 Zig Contributors
-// This file is part of [zig](https://ziglang.org/), which is MIT licensed.
-// The MIT license requires this copyright notice to be included in all copies
-// and substantial portions of the software.
+//! This file is auto-generated by tools/update_cpu_features.zig.
+
 const std = @import("../std.zig");
 const CpuFeature = std.Target.Cpu.Feature;
 const CpuModel = std.Target.Cpu.Model;
 
 pub const Feature = enum {
-    a34,
     a65,
     a76,
     aes,
@@ -17,8 +13,6 @@ pub const Feature = enum {
     altnzcv,
     am,
     amvs,
-    apple_a10,
-    apple_a11,
     apple_a12,
     apple_a13,
     apple_a7,
@@ -26,6 +20,7 @@ pub const Feature = enum {
     arith_cbz_fusion,
     balance_fp_ops,
     bf16,
+    brbe,
     bti,
     call_saved_x10,
     call_saved_x11,
@@ -39,7 +34,11 @@ pub const Feature = enum {
     ccdp,
     ccidx,
     ccpp,
+    cmp_bcc_fusion,
     complxnum,
+    contextidr_el2,
+    cortex_a78c,
+    cortex_r82,
     crc,
     crypto,
     custom_cheap_as_move,
@@ -49,14 +48,14 @@ pub const Feature = enum {
     ecv,
     ete,
     exynos_cheap_as_move,
-    exynosm4,
+    exynos_m4,
     f32mm,
     f64mm,
     fgt,
-    fmi,
+    flagm,
     force_32bit_jump_tables,
-    fp_armv8,
     fp16fml,
+    fp_armv8,
     fptoint,
     fullfp16,
     fuse_address,
@@ -67,28 +66,32 @@ pub const Feature = enum {
     fuse_literals,
     harden_sls_blr,
     harden_sls_retbr,
+    hcx,
     i8mm,
     jsconv,
     lor,
+    ls64,
     lse,
     lsl_fast,
     mpam,
     mte,
     neon,
-    neoversee1,
-    neoversen1,
+    neoverse_e1,
+    neoverse_n1,
+    neoverse_n2,
+    neoverse_v1,
     no_neg_immediates,
     nv,
-    pa,
+    outline_atomics,
     pan,
     pan_rwv,
+    pauth,
     perfmon,
     pmu,
     predictable_select_expensive,
     predres,
     rand,
     ras,
-    rasv8_4,
     rcpc,
     rcpc_immo,
     rdm,
@@ -126,6 +129,7 @@ pub const Feature = enum {
     slow_strqro_store,
     sm4,
     spe,
+    spe_eef,
     specrestrict,
     ssbs,
     strict_align,
@@ -148,14 +152,18 @@ pub const Feature = enum {
     use_experimental_zeroing_pseudos,
     use_postra_scheduler,
     use_reciprocal_square_root,
-    v8a,
     v8_1a,
     v8_2a,
     v8_3a,
     v8_4a,
     v8_5a,
     v8_6a,
+    v8_7a,
+    v8a,
+    v8r,
     vh,
+    wfxt,
+    xs,
     zcm,
     zcz,
     zcz_fp,
@@ -170,26 +178,16 @@ pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
     std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
     var result: [len]CpuFeature = undefined;
-    result[@enumToInt(Feature.a34)] = .{
-        .llvm_name = "a35",
-        .description = "Cortex-A34 ARM processors",
-        .dependencies = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .perfmon,
-            .v8a,
-        }),
-    };
     result[@enumToInt(Feature.a65)] = .{
         .llvm_name = "a65",
         .description = "Cortex-A65 ARM processors",
         .dependencies = featureSet(&[_]Feature{
             .crypto,
             .dotprod,
-            .fp_armv8,
             .fullfp16,
-            .neon,
-            .ras,
+            .fuse_address,
+            .fuse_aes,
+            .fuse_literals,
             .rcpc,
             .ssbs,
             .v8_2a,
@@ -202,6 +200,7 @@ pub const all_features = blk: {
             .crypto,
             .dotprod,
             .fullfp16,
+            .fuse_aes,
             .rcpc,
             .ssbs,
             .v8_2a,
@@ -241,49 +240,6 @@ pub const all_features = blk: {
             .am,
         }),
     };
-    result[@enumToInt(Feature.apple_a10)] = .{
-        .llvm_name = "apple-a10",
-        .description = "Apple A10",
-        .dependencies = featureSet(&[_]Feature{
-            .alternate_sextload_cvt_f32_pattern,
-            .arith_bcc_fusion,
-            .arith_cbz_fusion,
-            .crc,
-            .crypto,
-            .disable_latency_sched_heuristic,
-            .fp_armv8,
-            .fuse_aes,
-            .fuse_crypto_eor,
-            .lor,
-            .neon,
-            .pan,
-            .perfmon,
-            .rdm,
-            .vh,
-            .zcm,
-            .zcz,
-        }),
-    };
-    result[@enumToInt(Feature.apple_a11)] = .{
-        .llvm_name = "apple-a11",
-        .description = "Apple A11",
-        .dependencies = featureSet(&[_]Feature{
-            .alternate_sextload_cvt_f32_pattern,
-            .arith_bcc_fusion,
-            .arith_cbz_fusion,
-            .crypto,
-            .disable_latency_sched_heuristic,
-            .fp_armv8,
-            .fullfp16,
-            .fuse_aes,
-            .fuse_crypto_eor,
-            .neon,
-            .perfmon,
-            .v8_2a,
-            .zcm,
-            .zcz,
-        }),
-    };
     result[@enumToInt(Feature.apple_a12)] = .{
         .llvm_name = "apple-a12",
         .description = "Apple A12",
@@ -293,11 +249,9 @@ pub const all_features = blk: {
             .arith_cbz_fusion,
             .crypto,
             .disable_latency_sched_heuristic,
-            .fp_armv8,
             .fullfp16,
             .fuse_aes,
             .fuse_crypto_eor,
-            .neon,
             .perfmon,
             .v8_3a,
             .zcm,
@@ -313,12 +267,9 @@ pub const all_features = blk: {
             .arith_cbz_fusion,
             .crypto,
             .disable_latency_sched_heuristic,
-            .fp_armv8,
             .fp16fml,
-            .fullfp16,
             .fuse_aes,
             .fuse_crypto_eor,
-            .neon,
             .perfmon,
             .sha3,
             .v8_4a,
@@ -335,10 +286,8 @@ pub const all_features = blk: {
             .arith_cbz_fusion,
             .crypto,
             .disable_latency_sched_heuristic,
-            .fp_armv8,
             .fuse_aes,
             .fuse_crypto_eor,
-            .neon,
             .perfmon,
             .zcm,
             .zcz,
@@ -365,6 +314,11 @@ pub const all_features = blk: {
         .description = "Enable BFloat16 Extension",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@enumToInt(Feature.brbe)] = .{
+        .llvm_name = "brbe",
+        .description = "Enable Branch Record Buffer Extension",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@enumToInt(Feature.bti)] = .{
         .llvm_name = "bti",
         .description = "Enable Branch Target Identification",
@@ -430,6 +384,11 @@ pub const all_features = blk: {
         .description = "Enable v8.2 data Cache Clean to Point of Persistence",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@enumToInt(Feature.cmp_bcc_fusion)] = .{
+        .llvm_name = "cmp-bcc-fusion",
+        .description = "CPU fuses cmp+bcc operations",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@enumToInt(Feature.complxnum)] = .{
         .llvm_name = "complxnum",
         .description = "Enable v8.3-A Floating-point complex number support",
@@ -437,6 +396,38 @@ pub const all_features = blk: {
             .neon,
         }),
     };
+    result[@enumToInt(Feature.contextidr_el2)] = .{
+        .llvm_name = "CONTEXTIDREL2",
+        .description = "Enable RW operand Context ID Register (EL2)",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+    result[@enumToInt(Feature.cortex_a78c)] = .{
+        .llvm_name = "cortex-a78c",
+        .description = "Cortex-A78C ARM processors",
+        .dependencies = featureSet(&[_]Feature{
+            .cmp_bcc_fusion,
+            .crypto,
+            .dotprod,
+            .flagm,
+            .fp16fml,
+            .fuse_aes,
+            .pauth,
+            .perfmon,
+            .rcpc,
+            .spe,
+            .ssbs,
+            .use_postra_scheduler,
+            .v8_2a,
+        }),
+    };
+    result[@enumToInt(Feature.cortex_r82)] = .{
+        .llvm_name = "cortex-r82",
+        .description = "Cortex-R82 ARM Processors",
+        .dependencies = featureSet(&[_]Feature{
+            .use_postra_scheduler,
+            .v8r,
+        }),
+    };
     result[@enumToInt(Feature.crc)] = .{
         .llvm_name = "crc",
         .description = "Enable ARMv8 CRC-32 checksum instructions",
@@ -447,7 +438,6 @@ pub const all_features = blk: {
         .description = "Enable cryptographic instructions",
         .dependencies = featureSet(&[_]Feature{
             .aes,
-            .neon,
             .sha2,
         }),
     };
@@ -490,7 +480,7 @@ pub const all_features = blk: {
             .custom_cheap_as_move,
         }),
     };
-    result[@enumToInt(Feature.exynosm4)] = .{
+    result[@enumToInt(Feature.exynos_m4)] = .{
         .llvm_name = "exynosm4",
         .description = "Samsung Exynos-M4 processors",
         .dependencies = featureSet(&[_]Feature{
@@ -532,8 +522,8 @@ pub const all_features = blk: {
         .description = "Enable fine grained virtualization traps extension",
         .dependencies = featureSet(&[_]Feature{}),
     };
-    result[@enumToInt(Feature.fmi)] = .{
-        .llvm_name = "fmi",
+    result[@enumToInt(Feature.flagm)] = .{
+        .llvm_name = "flagm",
         .description = "Enable v8.4-A Flag Manipulation Instructions",
         .dependencies = featureSet(&[_]Feature{}),
     };
@@ -542,11 +532,6 @@ pub const all_features = blk: {
         .description = "Force jump table entries to be 32-bits wide except at MinSize",
         .dependencies = featureSet(&[_]Feature{}),
     };
-    result[@enumToInt(Feature.fp_armv8)] = .{
-        .llvm_name = "fp-armv8",
-        .description = "Enable ARMv8 FP",
-        .dependencies = featureSet(&[_]Feature{}),
-    };
     result[@enumToInt(Feature.fp16fml)] = .{
         .llvm_name = "fp16fml",
         .description = "Enable FP16 FML instructions",
@@ -554,6 +539,11 @@ pub const all_features = blk: {
             .fullfp16,
         }),
     };
+    result[@enumToInt(Feature.fp_armv8)] = .{
+        .llvm_name = "fp-armv8",
+        .description = "Enable ARMv8 FP",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@enumToInt(Feature.fptoint)] = .{
         .llvm_name = "fptoint",
         .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int",
@@ -606,6 +596,11 @@ pub const all_features = blk: {
         .description = "Harden against straight line speculation across RET and BR instructions",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@enumToInt(Feature.hcx)] = .{
+        .llvm_name = "hcx",
+        .description = "Enable Armv8.7-A HCRX_EL2 system register",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@enumToInt(Feature.i8mm)] = .{
         .llvm_name = "i8mm",
         .description = "Enable Matrix Multiply Int8 Extension",
@@ -623,6 +618,11 @@ pub const all_features = blk: {
         .description = "Enables ARM v8.1 Limited Ordering Regions extension",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@enumToInt(Feature.ls64)] = .{
+        .llvm_name = "ls64",
+        .description = "Enable Armv8.7-A LD64B/ST64B Accelerator Extension",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@enumToInt(Feature.lse)] = .{
         .llvm_name = "lse",
         .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions",
@@ -650,35 +650,62 @@ pub const all_features = blk: {
             .fp_armv8,
         }),
     };
-    result[@enumToInt(Feature.neoversee1)] = .{
+    result[@enumToInt(Feature.neoverse_e1)] = .{
         .llvm_name = "neoversee1",
         .description = "Neoverse E1 ARM processors",
         .dependencies = featureSet(&[_]Feature{
             .crypto,
             .dotprod,
-            .fp_armv8,
             .fullfp16,
-            .neon,
             .rcpc,
             .ssbs,
             .v8_2a,
         }),
     };
-    result[@enumToInt(Feature.neoversen1)] = .{
+    result[@enumToInt(Feature.neoverse_n1)] = .{
         .llvm_name = "neoversen1",
         .description = "Neoverse N1 ARM processors",
         .dependencies = featureSet(&[_]Feature{
             .crypto,
             .dotprod,
-            .fp_armv8,
             .fullfp16,
-            .neon,
             .rcpc,
             .spe,
             .ssbs,
             .v8_2a,
         }),
     };
+    result[@enumToInt(Feature.neoverse_n2)] = .{
+        .llvm_name = "neoversen2",
+        .description = "Neoverse N2 ARM processors",
+        .dependencies = featureSet(&[_]Feature{
+            .bf16,
+            .ete,
+            .i8mm,
+            .mte,
+            .sve2_bitperm,
+            .v8_5a,
+        }),
+    };
+    result[@enumToInt(Feature.neoverse_v1)] = .{
+        .llvm_name = "neoversev1",
+        .description = "Neoverse V1 ARM processors",
+        .dependencies = featureSet(&[_]Feature{
+            .bf16,
+            .ccdp,
+            .crypto,
+            .fp16fml,
+            .fuse_aes,
+            .i8mm,
+            .perfmon,
+            .rand,
+            .spe,
+            .ssbs,
+            .sve,
+            .use_postra_scheduler,
+            .v8_4a,
+        }),
+    };
     result[@enumToInt(Feature.no_neg_immediates)] = .{
         .llvm_name = "no-neg-immediates",
         .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
@@ -686,12 +713,12 @@ pub const all_features = blk: {
     };
     result[@enumToInt(Feature.nv)] = .{
         .llvm_name = "nv",
-        .description = "Enable v8.4-A Nested Virtualization extension",
+        .description = "Enable v8.4-A Nested Virtualization Enchancement",
         .dependencies = featureSet(&[_]Feature{}),
     };
-    result[@enumToInt(Feature.pa)] = .{
-        .llvm_name = "pa",
-        .description = "Enable v8.3-A Pointer Authentication extension",
+    result[@enumToInt(Feature.outline_atomics)] = .{
+        .llvm_name = "outline-atomics",
+        .description = "Enable out of line atomics to support LSE instructions",
         .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.pan)] = .{
@@ -706,6 +733,11 @@ pub const all_features = blk: {
             .pan,
         }),
     };
+    result[@enumToInt(Feature.pauth)] = .{
+        .llvm_name = "pauth",
+        .description = "Enable v8.3-A Pointer Authentication extension",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@enumToInt(Feature.perfmon)] = .{
         .llvm_name = "perfmon",
         .description = "Enable ARMv8 PMUv3 Performance Monitors extension",
@@ -736,13 +768,6 @@ pub const all_features = blk: {
         .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions",
         .dependencies = featureSet(&[_]Feature{}),
     };
-    result[@enumToInt(Feature.rasv8_4)] = .{
-        .llvm_name = "rasv8_4",
-        .description = "Enable v8.4-A Reliability, Availability and Serviceability extension",
-        .dependencies = featureSet(&[_]Feature{
-            .ras,
-        }),
-    };
     result[@enumToInt(Feature.rcpc)] = .{
         .llvm_name = "rcpc",
         .description = "Enable support for RCPC extension",
@@ -906,7 +931,6 @@ pub const all_features = blk: {
         .llvm_name = "sha3",
         .description = "Enable SHA512 and SHA3 support",
         .dependencies = featureSet(&[_]Feature{
-            .neon,
             .sha2,
         }),
     };
@@ -937,6 +961,11 @@ pub const all_features = blk: {
         .description = "Enable Statistical Profiling extension",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@enumToInt(Feature.spe_eef)] = .{
+        .llvm_name = "spe-eef",
+        .description = "Enable extra register in the Statistical Profiling Extension",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@enumToInt(Feature.specrestrict)] = .{
         .llvm_name = "specrestrict",
         .description = "Enable architectural speculation restriction",
@@ -955,7 +984,9 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.sve)] = .{
         .llvm_name = "sve",
         .description = "Enable Scalable Vector Extension (SVE) instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{
+            .fullfp16,
+        }),
     };
     result[@enumToInt(Feature.sve2)] = .{
         .llvm_name = "sve2",
@@ -1060,14 +1091,6 @@ pub const all_features = blk: {
         .description = "Use the reciprocal square root approximation",
         .dependencies = featureSet(&[_]Feature{}),
     };
-    result[@enumToInt(Feature.v8a)] = .{
-        .llvm_name = null,
-        .description = "Support ARM v8a instructions",
-        .dependencies = featureSet(&[_]Feature{
-            .fp_armv8,
-            .neon,
-        }),
-    };
     result[@enumToInt(Feature.v8_1a)] = .{
         .llvm_name = "v8.1a",
         .description = "Support ARM v8.1a instructions",
@@ -1077,8 +1100,8 @@ pub const all_features = blk: {
             .lse,
             .pan,
             .rdm,
-            .vh,
             .v8a,
+            .vh,
         }),
     };
     result[@enumToInt(Feature.v8_2a)] = .{
@@ -1099,7 +1122,7 @@ pub const all_features = blk: {
             .ccidx,
             .complxnum,
             .jsconv,
-            .pa,
+            .pauth,
             .rcpc,
             .v8_2a,
         }),
@@ -1111,11 +1134,10 @@ pub const all_features = blk: {
             .am,
             .dit,
             .dotprod,
-            .fmi,
+            .flagm,
             .mpam,
             .nv,
             .pmu,
-            .rasv8_4,
             .rcpc_immo,
             .sel2,
             .tlb_rmi,
@@ -1150,9 +1172,71 @@ pub const all_features = blk: {
             .v8_5a,
         }),
     };
+    result[@enumToInt(Feature.v8_7a)] = .{
+        .llvm_name = "v8.7a",
+        .description = "Support ARM v8.7a instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .hcx,
+            .v8_6a,
+            .wfxt,
+            .xs,
+        }),
+    };
+    result[@enumToInt(Feature.v8a)] = .{
+        .llvm_name = null,
+        .description = "Support ARM v8a instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .neon,
+        }),
+    };
+    result[@enumToInt(Feature.v8r)] = .{
+        .llvm_name = "v8r",
+        .description = "Support ARM v8r instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .ccidx,
+            .ccpp,
+            .complxnum,
+            .contextidr_el2,
+            .crc,
+            .dit,
+            .dotprod,
+            .flagm,
+            .fp16fml,
+            .jsconv,
+            .lse,
+            .pan_rwv,
+            .pauth,
+            .perfmon,
+            .predres,
+            .ras,
+            .rcpc_immo,
+            .rdm,
+            .sb,
+            .sel2,
+            .sha3,
+            .sm4,
+            .specrestrict,
+            .ssbs,
+            .tlb_rmi,
+            .tracev8_4,
+            .uaops,
+        }),
+    };
     result[@enumToInt(Feature.vh)] = .{
         .llvm_name = "vh",
         .description = "Enables ARM v8.1 Virtual Host extension",
+        .dependencies = featureSet(&[_]Feature{
+            .contextidr_el2,
+        }),
+    };
+    result[@enumToInt(Feature.wfxt)] = .{
+        .llvm_name = "wfxt",
+        .description = "Enable Armv8.7-A WFET and WFIT instruction",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+    result[@enumToInt(Feature.xs)] = .{
+        .llvm_name = "xs",
+        .description = "Enable Armv8.7-A limited-TLB-maintenance instruction",
         .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.zcm)] = .{
@@ -1196,11 +1280,11 @@ pub const cpu = struct {
         .name = "a64fx",
         .llvm_name = "a64fx",
         .features = featureSet(&[_]Feature{
+            .aggressive_fma,
+            .arith_bcc_fusion,
             .complxnum,
-            .fp_armv8,
-            .fullfp16,
-            .neon,
             .perfmon,
+            .predictable_select_expensive,
             .sha2,
             .sve,
             .use_postra_scheduler,
@@ -1211,14 +1295,39 @@ pub const cpu = struct {
         .name = "apple_a10",
         .llvm_name = "apple-a10",
         .features = featureSet(&[_]Feature{
-            .apple_a10,
+            .alternate_sextload_cvt_f32_pattern,
+            .arith_bcc_fusion,
+            .arith_cbz_fusion,
+            .crc,
+            .crypto,
+            .disable_latency_sched_heuristic,
+            .fuse_aes,
+            .fuse_crypto_eor,
+            .lor,
+            .pan,
+            .perfmon,
+            .rdm,
+            .vh,
+            .zcm,
+            .zcz,
         }),
     };
     pub const apple_a11 = CpuModel{
         .name = "apple_a11",
         .llvm_name = "apple-a11",
         .features = featureSet(&[_]Feature{
-            .apple_a11,
+            .alternate_sextload_cvt_f32_pattern,
+            .arith_bcc_fusion,
+            .arith_cbz_fusion,
+            .crypto,
+            .disable_latency_sched_heuristic,
+            .fullfp16,
+            .fuse_aes,
+            .fuse_crypto_eor,
+            .perfmon,
+            .v8_2a,
+            .zcm,
+            .zcz,
         }),
     };
     pub const apple_a12 = CpuModel{
@@ -1235,6 +1344,37 @@ pub const cpu = struct {
             .apple_a13,
         }),
     };
+    pub const apple_a14 = CpuModel{
+        .name = "apple_a14",
+        .llvm_name = "apple-a14",
+        .features = featureSet(&[_]Feature{
+            .aggressive_fma,
+            .alternate_sextload_cvt_f32_pattern,
+            .altnzcv,
+            .arith_bcc_fusion,
+            .arith_cbz_fusion,
+            .ccdp,
+            .crypto,
+            .disable_latency_sched_heuristic,
+            .fp16fml,
+            .fptoint,
+            .fuse_address,
+            .fuse_aes,
+            .fuse_arith_logic,
+            .fuse_crypto_eor,
+            .fuse_csel,
+            .fuse_literals,
+            .perfmon,
+            .predres,
+            .sb,
+            .sha3,
+            .specrestrict,
+            .ssbs,
+            .v8_4a,
+            .zcm,
+            .zcz,
+        }),
+    };
     pub const apple_a7 = CpuModel{
         .name = "apple_a7",
         .llvm_name = "apple-a7",
@@ -1283,7 +1423,6 @@ pub const cpu = struct {
         .features = featureSet(&[_]Feature{
             .crypto,
             .fullfp16,
-            .neon,
             .v8_2a,
         }),
     };
@@ -1291,14 +1430,20 @@ pub const cpu = struct {
         .name = "cortex_a34",
         .llvm_name = "cortex-a34",
         .features = featureSet(&[_]Feature{
-            .a34,
+            .crc,
+            .crypto,
+            .perfmon,
+            .v8a,
         }),
     };
     pub const cortex_a35 = CpuModel{
         .name = "cortex_a35",
         .llvm_name = "cortex-a35",
         .features = featureSet(&[_]Feature{
-            .a34,
+            .crc,
+            .crypto,
+            .perfmon,
+            .v8a,
         }),
     };
     pub const cortex_a53 = CpuModel{
@@ -1366,6 +1511,7 @@ pub const cpu = struct {
             .crc,
             .crypto,
             .fuse_aes,
+            .fuse_literals,
             .perfmon,
             .v8a,
         }),
@@ -1412,11 +1558,11 @@ pub const cpu = struct {
         .name = "cortex_a77",
         .llvm_name = "cortex-a77",
         .features = featureSet(&[_]Feature{
+            .cmp_bcc_fusion,
             .crypto,
             .dotprod,
-            .fp_armv8,
             .fullfp16,
-            .neon,
+            .fuse_aes,
             .rcpc,
             .v8_2a,
         }),
@@ -1425,12 +1571,11 @@ pub const cpu = struct {
         .name = "cortex_a78",
         .llvm_name = "cortex-a78",
         .features = featureSet(&[_]Feature{
+            .cmp_bcc_fusion,
             .crypto,
             .dotprod,
-            .fp_armv8,
             .fullfp16,
             .fuse_aes,
-            .neon,
             .perfmon,
             .rcpc,
             .spe,
@@ -1439,16 +1584,29 @@ pub const cpu = struct {
             .v8_2a,
         }),
     };
+    pub const cortex_a78c = CpuModel{
+        .name = "cortex_a78c",
+        .llvm_name = "cortex-a78c",
+        .features = featureSet(&[_]Feature{
+            .cortex_a78c,
+        }),
+    };
+    pub const cortex_r82 = CpuModel{
+        .name = "cortex_r82",
+        .llvm_name = "cortex-r82",
+        .features = featureSet(&[_]Feature{
+            .cortex_r82,
+        }),
+    };
     pub const cortex_x1 = CpuModel{
         .name = "cortex_x1",
         .llvm_name = "cortex-x1",
         .features = featureSet(&[_]Feature{
+            .cmp_bcc_fusion,
             .crypto,
             .dotprod,
-            .fp_armv8,
             .fullfp16,
             .fuse_aes,
-            .neon,
             .perfmon,
             .rcpc,
             .spe,
@@ -1522,14 +1680,14 @@ pub const cpu = struct {
         .name = "exynos_m4",
         .llvm_name = "exynos-m4",
         .features = featureSet(&[_]Feature{
-            .exynosm4,
+            .exynos_m4,
         }),
     };
     pub const exynos_m5 = CpuModel{
         .name = "exynos_m5",
         .llvm_name = "exynos-m5",
         .features = featureSet(&[_]Feature{
-            .exynosm4,
+            .exynos_m4,
         }),
     };
     pub const falkor = CpuModel{
@@ -1555,9 +1713,9 @@ pub const cpu = struct {
         .features = featureSet(&[_]Feature{
             .ete,
             .fuse_aes,
+            .neon,
             .perfmon,
             .use_postra_scheduler,
-            .v8a,
         }),
     };
     pub const kryo = CpuModel{
@@ -1571,22 +1729,36 @@ pub const cpu = struct {
             .perfmon,
             .predictable_select_expensive,
             .use_postra_scheduler,
-            .zcz,
             .v8a,
+            .zcz,
         }),
     };
     pub const neoverse_e1 = CpuModel{
         .name = "neoverse_e1",
         .llvm_name = "neoverse-e1",
         .features = featureSet(&[_]Feature{
-            .neoversee1,
+            .neoverse_e1,
         }),
     };
     pub const neoverse_n1 = CpuModel{
         .name = "neoverse_n1",
         .llvm_name = "neoverse-n1",
         .features = featureSet(&[_]Feature{
-            .neoversen1,
+            .neoverse_n1,
+        }),
+    };
+    pub const neoverse_n2 = CpuModel{
+        .name = "neoverse_n2",
+        .llvm_name = "neoverse-n2",
+        .features = featureSet(&[_]Feature{
+            .neoverse_n2,
+        }),
+    };
+    pub const neoverse_v1 = CpuModel{
+        .name = "neoverse_v1",
+        .llvm_name = "neoverse-v1",
+        .features = featureSet(&[_]Feature{
+            .neoverse_v1,
         }),
     };
     pub const saphira = CpuModel{
@@ -1622,9 +1794,7 @@ pub const cpu = struct {
         .features = featureSet(&[_]Feature{
             .aggressive_fma,
             .arith_bcc_fusion,
-            .crc,
             .crypto,
-            .lse,
             .predictable_select_expensive,
             .use_postra_scheduler,
             .v8_1a,
@@ -1637,12 +1807,7 @@ pub const cpu = struct {
             .aggressive_fma,
             .arith_bcc_fusion,
             .balance_fp_ops,
-            .crc,
             .crypto,
-            .fp_armv8,
-            .lse,
-            .neon,
-            .pa,
             .perfmon,
             .predictable_select_expensive,
             .strict_align,
@@ -1695,7 +1860,6 @@ pub const cpu = struct {
             .custom_cheap_as_move,
             .dotprod,
             .fp16fml,
-            .fullfp16,
             .fuse_aes,
             .perfmon,
             .spe,
diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig
index 09be754964..6e36a34a5a 100644
--- a/lib/std/target/amdgpu.zig
+++ b/lib/std/target/amdgpu.zig
@@ -1,22 +1,17 @@
-// SPDX-License-Identifier: MIT
-// Copyright (c) 2015-2021 Zig Contributors
-// This file is part of [zig](https://ziglang.org/), which is MIT licensed.
-// The MIT license requires this copyright notice to be included in all copies
-// and substantial portions of the software.
+//! This file is auto-generated by tools/update_cpu_features.zig.
+
 const std = @import("../std.zig");
 const CpuFeature = std.Target.Cpu.Feature;
 const CpuModel = std.Target.Cpu.Model;
 
 pub const Feature = enum {
     @"16_bit_insts",
-    DumpCode,
     a16,
     add_no_carry_insts,
     aperture_regs,
     atomic_fadd_insts,
     auto_waitcnt_before_barrier,
     ci_insts,
-    code_object_v3,
     cumode,
     dl_insts,
     dot1_insts,
@@ -28,7 +23,6 @@ pub const Feature = enum {
     dpp,
     dpp8,
     ds_src2_insts,
-    dumpcode,
     enable_ds128,
     enable_prt_strict_null,
     fast_denormal_f32,
@@ -47,13 +41,15 @@ pub const Feature = enum {
     get_wave_id_inst,
     gfx10,
     gfx10_3_insts,
-    gfx10_insts,
     gfx10_b_encoding,
+    gfx10_insts,
     gfx7_gfx8_gfx9_insts,
     gfx8_insts,
     gfx9,
     gfx9_insts,
     half_rate_64_ops,
+    image_gather4_d16_bug,
+    image_store_d16_bug,
     inst_fwd_prefetch_bug,
     int_clamp_insts,
     inv_2pi_inline_imm,
@@ -76,8 +72,6 @@ pub const Feature = enum {
     movrel,
     no_data_dep_hazard,
     no_sdst_cmpx,
-    no_sram_ecc_support,
-    no_xnack_support,
     nsa_encoding,
     nsa_to_vmem_bug,
     offset_3f_bug,
@@ -101,10 +95,13 @@ pub const Feature = enum {
     si_scheduler,
     smem_to_vector_write_hazard,
     southern_islands,
-    sram_ecc,
+    sramecc,
+    sramecc_support,
     trap_handler,
     trig_reduced_range,
+    unaligned_access_mode,
     unaligned_buffer_access,
+    unaligned_ds_access,
     unaligned_scratch_access,
     unpacked_d16_vmem,
     unsafe_ds_offset_folding,
@@ -120,6 +117,7 @@ pub const Feature = enum {
     wavefrontsize32,
     wavefrontsize64,
     xnack,
+    xnack_support,
 };
 
 pub usingnamespace CpuFeature.feature_set_fns(Feature);
@@ -133,11 +131,6 @@ pub const all_features = blk: {
         .description = "Has i16/f16 instructions",
         .dependencies = featureSet(&[_]Feature{}),
     };
-    result[@enumToInt(Feature.DumpCode)] = .{
-        .llvm_name = "DumpCode",
-        .description = "Dump MachineInstrs in the CodeEmitter",
-        .dependencies = featureSet(&[_]Feature{}),
-    };
     result[@enumToInt(Feature.a16)] = .{
         .llvm_name = "a16",
         .description = "Support gfx10-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands",
@@ -170,11 +163,6 @@ pub const all_features = blk: {
         .description = "Additional instructions for CI+",
         .dependencies = featureSet(&[_]Feature{}),
     };
-    result[@enumToInt(Feature.code_object_v3)] = .{
-        .llvm_name = "code-object-v3",
-        .description = "Generate code object version 3",
-        .dependencies = featureSet(&[_]Feature{}),
-    };
     result[@enumToInt(Feature.cumode)] = .{
         .llvm_name = "cumode",
         .description = "Enable CU wavefront execution mode",
@@ -230,14 +218,9 @@ pub const all_features = blk: {
         .description = "Has ds_*_src2 instructions",
         .dependencies = featureSet(&[_]Feature{}),
     };
-    result[@enumToInt(Feature.dumpcode)] = .{
-        .llvm_name = "dumpcode",
-        .description = "Dump MachineInstrs in the CodeEmitter",
-        .dependencies = featureSet(&[_]Feature{}),
-    };
     result[@enumToInt(Feature.enable_ds128)] = .{
         .llvm_name = "enable-ds128",
-        .description = "Use ds_read|write_b128",
+        .description = "Use ds_{read|write}_b128",
         .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.enable_prt_strict_null)] = .{
@@ -345,7 +328,6 @@ pub const all_features = blk: {
             .movrel,
             .no_data_dep_hazard,
             .no_sdst_cmpx,
-            .no_sram_ecc_support,
             .pk_fmac_f16_inst,
             .register_banking,
             .s_memrealtime,
@@ -353,6 +335,8 @@ pub const all_features = blk: {
             .sdwa_omod,
             .sdwa_scalar,
             .sdwa_sdst,
+            .unaligned_buffer_access,
+            .unaligned_ds_access,
             .vop3_literal,
             .vop3p,
             .vscnt,
@@ -363,16 +347,16 @@ pub const all_features = blk: {
         .description = "Additional instructions for GFX10.3",
         .dependencies = featureSet(&[_]Feature{}),
     };
-    result[@enumToInt(Feature.gfx10_insts)] = .{
-        .llvm_name = "gfx10-insts",
-        .description = "Additional instructions for GFX10+",
-        .dependencies = featureSet(&[_]Feature{}),
-    };
     result[@enumToInt(Feature.gfx10_b_encoding)] = .{
         .llvm_name = "gfx10_b-encoding",
         .description = "Encoding format GFX10_B",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@enumToInt(Feature.gfx10_insts)] = .{
+        .llvm_name = "gfx10-insts",
+        .description = "Additional instructions for GFX10+",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@enumToInt(Feature.gfx7_gfx8_gfx9_insts)] = .{
         .llvm_name = "gfx7-gfx8-gfx9-insts",
         .description = "Instructions shared in GFX7, GFX8, GFX9",
@@ -418,9 +402,12 @@ pub const all_features = blk: {
             .sdwa_omod,
             .sdwa_scalar,
             .sdwa_sdst,
+            .unaligned_buffer_access,
+            .unaligned_ds_access,
             .vgpr_index_mode,
             .vop3p,
             .wavefrontsize64,
+            .xnack_support,
         }),
     };
     result[@enumToInt(Feature.gfx9_insts)] = .{
@@ -433,6 +420,16 @@ pub const all_features = blk: {
         .description = "Most fp64 instructions are half rate instead of quarter",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@enumToInt(Feature.image_gather4_d16_bug)] = .{
+        .llvm_name = "image-gather4-d16-bug",
+        .description = "Image Gather4 D16 hardware bug",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+    result[@enumToInt(Feature.image_store_d16_bug)] = .{
+        .llvm_name = "image-store-d16-bug",
+        .description = "Image Store D16 hardware bug",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@enumToInt(Feature.inst_fwd_prefetch_bug)] = .{
         .llvm_name = "inst-fwd-prefetch-bug",
         .description = "S_INST_PREFETCH instruction causes shader to hang",
@@ -455,7 +452,7 @@ pub const all_features = blk: {
     };
     result[@enumToInt(Feature.lds_misaligned_bug)] = .{
         .llvm_name = "lds-misaligned-bug",
-        .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode",
+        .description = "Some GFX10 bug with multi-dword LDS and flat access that is not naturally aligned in WGP mode",
         .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ldsbankcount16)] = .{
@@ -543,16 +540,6 @@ pub const all_features = blk: {
         .description = "V_CMPX does not write VCC/SGPR in addition to EXEC",
         .dependencies = featureSet(&[_]Feature{}),
     };
-    result[@enumToInt(Feature.no_sram_ecc_support)] = .{
-        .llvm_name = "no-sram-ecc-support",
-        .description = "Hardware does not support SRAM ECC",
-        .dependencies = featureSet(&[_]Feature{}),
-    };
-    result[@enumToInt(Feature.no_xnack_support)] = .{
-        .llvm_name = "no-xnack-support",
-        .description = "Hardware does not support XNACK",
-        .dependencies = featureSet(&[_]Feature{}),
-    };
     result[@enumToInt(Feature.nsa_encoding)] = .{
         .llvm_name = "nsa-encoding",
         .description = "Support NSA encoding for image instructions",
@@ -656,9 +643,9 @@ pub const all_features = blk: {
             .mad_mac_f32_insts,
             .mimg_r128,
             .movrel,
-            .no_sram_ecc_support,
             .s_memtime_inst,
             .trig_reduced_range,
+            .unaligned_buffer_access,
             .wavefrontsize64,
         }),
     };
@@ -688,16 +675,19 @@ pub const all_features = blk: {
             .mad_mac_f32_insts,
             .mimg_r128,
             .movrel,
-            .no_sram_ecc_support,
-            .no_xnack_support,
             .s_memtime_inst,
             .trig_reduced_range,
             .wavefrontsize64,
         }),
     };
-    result[@enumToInt(Feature.sram_ecc)] = .{
-        .llvm_name = "sram-ecc",
-        .description = "Enable SRAM ECC",
+    result[@enumToInt(Feature.sramecc)] = .{
+        .llvm_name = "sramecc",
+        .description = "Enable SRAMECC",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+    result[@enumToInt(Feature.sramecc_support)] = .{
+        .llvm_name = "sramecc-support",
+        .description = "Hardware supports SRAMECC",
         .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.trap_handler)] = .{
@@ -710,9 +700,19 @@ pub const all_features = blk: {
         .description = "Requires use of fract on arguments to trig instructions",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@enumToInt(Feature.unaligned_access_mode)] = .{
+        .llvm_name = "unaligned-access-mode",
+        .description = "Enable unaligned global, local and region loads and stores if the hardware supports it",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@enumToInt(Feature.unaligned_buffer_access)] = .{
         .llvm_name = "unaligned-buffer-access",
-        .description = "Support unaligned global loads and stores",
+        .description = "Hardware supports unaligned global loads and stores",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+    result[@enumToInt(Feature.unaligned_ds_access)] = .{
+        .llvm_name = "unaligned-ds-access",
+        .description = "Hardware supports unaligned local and region loads and stores",
         .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.unaligned_scratch_access)] = .{
@@ -770,7 +770,6 @@ pub const all_features = blk: {
             .mad_mac_f32_insts,
             .mimg_r128,
             .movrel,
-            .no_sram_ecc_support,
             .s_memrealtime,
             .s_memtime_inst,
             .scalar_stores,
@@ -778,6 +777,7 @@ pub const all_features = blk: {
             .sdwa_mav,
             .sdwa_out_mods_vopc,
             .trig_reduced_range,
+            .unaligned_buffer_access,
             .vgpr_index_mode,
             .wavefrontsize64,
         }),
@@ -817,6 +817,11 @@ pub const all_features = blk: {
         .description = "Enable XNACK support",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@enumToInt(Feature.xnack_support)] = .{
+        .llvm_name = "xnack-support",
+        .description = "Hardware supports XNACK",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     const ti = @typeInfo(Feature);
     for (result) |*elem, i| {
         elem.index = i;
@@ -830,9 +835,7 @@ pub const cpu = struct {
         .name = "bonaire",
         .llvm_name = "bonaire",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .ldsbankcount32,
-            .no_xnack_support,
             .sea_islands,
         }),
     };
@@ -840,22 +843,19 @@ pub const cpu = struct {
         .name = "carrizo",
         .llvm_name = "carrizo",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .fast_fmaf,
             .half_rate_64_ops,
             .ldsbankcount32,
             .unpacked_d16_vmem,
             .volcanic_islands,
-            .xnack,
+            .xnack_support,
         }),
     };
     pub const fiji = CpuModel{
         .name = "fiji",
         .llvm_name = "fiji",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .ldsbankcount32,
-            .no_xnack_support,
             .unpacked_d16_vmem,
             .volcanic_islands,
         }),
@@ -879,7 +879,6 @@ pub const cpu = struct {
         .name = "gfx1010",
         .llvm_name = "gfx1010",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .dl_insts,
             .ds_src2_insts,
             .flat_segment_offset_bug,
@@ -890,7 +889,6 @@ pub const cpu = struct {
             .lds_misaligned_bug,
             .ldsbankcount32,
             .mad_mac_f32_insts,
-            .no_xnack_support,
             .nsa_encoding,
             .nsa_to_vmem_bug,
             .offset_3f_bug,
@@ -903,13 +901,13 @@ pub const cpu = struct {
             .vcmpx_permlane_hazard,
             .vmem_to_scalar_write_hazard,
             .wavefrontsize32,
+            .xnack_support,
         }),
     };
     pub const gfx1011 = CpuModel{
         .name = "gfx1011",
         .llvm_name = "gfx1011",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .dl_insts,
             .dot1_insts,
             .dot2_insts,
@@ -921,9 +919,9 @@ pub const cpu = struct {
             .gfx10,
             .inst_fwd_prefetch_bug,
             .lds_branch_vmem_war_hazard,
+            .lds_misaligned_bug,
             .ldsbankcount32,
             .mad_mac_f32_insts,
-            .no_xnack_support,
             .nsa_encoding,
             .nsa_to_vmem_bug,
             .offset_3f_bug,
@@ -936,13 +934,13 @@ pub const cpu = struct {
             .vcmpx_permlane_hazard,
             .vmem_to_scalar_write_hazard,
             .wavefrontsize32,
+            .xnack_support,
         }),
     };
     pub const gfx1012 = CpuModel{
         .name = "gfx1012",
         .llvm_name = "gfx1012",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .dl_insts,
             .dot1_insts,
             .dot2_insts,
@@ -957,7 +955,6 @@ pub const cpu = struct {
             .lds_misaligned_bug,
             .ldsbankcount32,
             .mad_mac_f32_insts,
-            .no_xnack_support,
             .nsa_encoding,
             .nsa_to_vmem_bug,
             .offset_3f_bug,
@@ -970,13 +967,13 @@ pub const cpu = struct {
             .vcmpx_permlane_hazard,
             .vmem_to_scalar_write_hazard,
             .wavefrontsize32,
+            .xnack_support,
         }),
     };
     pub const gfx1030 = CpuModel{
         .name = "gfx1030",
         .llvm_name = "gfx1030",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .dl_insts,
             .dot1_insts,
             .dot2_insts,
@@ -986,7 +983,57 @@ pub const cpu = struct {
             .gfx10_3_insts,
             .gfx10_b_encoding,
             .ldsbankcount32,
-            .no_xnack_support,
+            .nsa_encoding,
+            .wavefrontsize32,
+        }),
+    };
+    pub const gfx1031 = CpuModel{
+        .name = "gfx1031",
+        .llvm_name = "gfx1031",
+        .features = featureSet(&[_]Feature{
+            .dl_insts,
+            .dot1_insts,
+            .dot2_insts,
+            .dot5_insts,
+            .dot6_insts,
+            .gfx10,
+            .gfx10_3_insts,
+            .gfx10_b_encoding,
+            .ldsbankcount32,
+            .nsa_encoding,
+            .wavefrontsize32,
+        }),
+    };
+    pub const gfx1032 = CpuModel{
+        .name = "gfx1032",
+        .llvm_name = "gfx1032",
+        .features = featureSet(&[_]Feature{
+            .dl_insts,
+            .dot1_insts,
+            .dot2_insts,
+            .dot5_insts,
+            .dot6_insts,
+            .gfx10,
+            .gfx10_3_insts,
+            .gfx10_b_encoding,
+            .ldsbankcount32,
+            .nsa_encoding,
+            .wavefrontsize32,
+        }),
+    };
+    pub const gfx1033 = CpuModel{
+        .name = "gfx1033",
+        .llvm_name = "gfx1033",
+        .features = featureSet(&[_]Feature{
+            .dl_insts,
+            .dot1_insts,
+            .dot2_insts,
+            .dot5_insts,
+            .dot6_insts,
+            .gfx10,
+            .gfx10_3_insts,
+            .gfx10_b_encoding,
+            .ldsbankcount32,
             .nsa_encoding,
             .wavefrontsize32,
         }),
@@ -995,11 +1042,8 @@ pub const cpu = struct {
         .name = "gfx600",
         .llvm_name = "gfx600",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .fast_fmaf,
             .half_rate_64_ops,
-            .ldsbankcount32,
-            .no_xnack_support,
             .southern_islands,
         }),
     };
@@ -1007,9 +1051,13 @@ pub const cpu = struct {
         .name = "gfx601",
         .llvm_name = "gfx601",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
-            .ldsbankcount32,
-            .no_xnack_support,
+            .southern_islands,
+        }),
+    };
+    pub const gfx602 = CpuModel{
+        .name = "gfx602",
+        .llvm_name = "gfx602",
+        .features = featureSet(&[_]Feature{
             .southern_islands,
         }),
     };
@@ -1017,9 +1065,7 @@ pub const cpu = struct {
         .name = "gfx700",
         .llvm_name = "gfx700",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .ldsbankcount32,
-            .no_xnack_support,
             .sea_islands,
         }),
     };
@@ -1027,11 +1073,9 @@ pub const cpu = struct {
         .name = "gfx701",
         .llvm_name = "gfx701",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .fast_fmaf,
             .half_rate_64_ops,
             .ldsbankcount32,
-            .no_xnack_support,
             .sea_islands,
         }),
     };
@@ -1039,10 +1083,8 @@ pub const cpu = struct {
         .name = "gfx702",
         .llvm_name = "gfx702",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .fast_fmaf,
             .ldsbankcount16,
-            .no_xnack_support,
             .sea_islands,
         }),
     };
@@ -1050,9 +1092,7 @@ pub const cpu = struct {
         .name = "gfx703",
         .llvm_name = "gfx703",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .ldsbankcount16,
-            .no_xnack_support,
             .sea_islands,
         }),
     };
@@ -1060,9 +1100,15 @@ pub const cpu = struct {
         .name = "gfx704",
         .llvm_name = "gfx704",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .ldsbankcount32,
-            .no_xnack_support,
+            .sea_islands,
+        }),
+    };
+    pub const gfx705 = CpuModel{
+        .name = "gfx705",
+        .llvm_name = "gfx705",
+        .features = featureSet(&[_]Feature{
+            .ldsbankcount16,
             .sea_islands,
         }),
     };
@@ -1070,22 +1116,19 @@ pub const cpu = struct {
         .name = "gfx801",
         .llvm_name = "gfx801",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .fast_fmaf,
             .half_rate_64_ops,
             .ldsbankcount32,
             .unpacked_d16_vmem,
             .volcanic_islands,
-            .xnack,
+            .xnack_support,
         }),
     };
     pub const gfx802 = CpuModel{
         .name = "gfx802",
         .llvm_name = "gfx802",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .ldsbankcount32,
-            .no_xnack_support,
             .sgpr_init_bug,
             .unpacked_d16_vmem,
             .volcanic_islands,
@@ -1095,9 +1138,17 @@ pub const cpu = struct {
         .name = "gfx803",
         .llvm_name = "gfx803",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .ldsbankcount32,
-            .no_xnack_support,
+            .unpacked_d16_vmem,
+            .volcanic_islands,
+        }),
+    };
+    pub const gfx805 = CpuModel{
+        .name = "gfx805",
+        .llvm_name = "gfx805",
+        .features = featureSet(&[_]Feature{
+            .ldsbankcount32,
+            .sgpr_init_bug,
             .unpacked_d16_vmem,
             .volcanic_islands,
         }),
@@ -1106,61 +1157,56 @@ pub const cpu = struct {
         .name = "gfx810",
         .llvm_name = "gfx810",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
+            .image_gather4_d16_bug,
+            .image_store_d16_bug,
             .ldsbankcount16,
             .volcanic_islands,
-            .xnack,
+            .xnack_support,
         }),
     };
     pub const gfx900 = CpuModel{
         .name = "gfx900",
         .llvm_name = "gfx900",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .gfx9,
+            .image_gather4_d16_bug,
             .ldsbankcount32,
             .mad_mix_insts,
-            .no_sram_ecc_support,
-            .no_xnack_support,
         }),
     };
     pub const gfx902 = CpuModel{
         .name = "gfx902",
         .llvm_name = "gfx902",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .gfx9,
+            .image_gather4_d16_bug,
             .ldsbankcount32,
             .mad_mix_insts,
-            .no_sram_ecc_support,
-            .xnack,
         }),
     };
     pub const gfx904 = CpuModel{
         .name = "gfx904",
         .llvm_name = "gfx904",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .fma_mix_insts,
             .gfx9,
+            .image_gather4_d16_bug,
             .ldsbankcount32,
-            .no_sram_ecc_support,
-            .no_xnack_support,
         }),
     };
     pub const gfx906 = CpuModel{
         .name = "gfx906",
         .llvm_name = "gfx906",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .dl_insts,
             .dot1_insts,
             .dot2_insts,
             .fma_mix_insts,
             .gfx9,
             .half_rate_64_ops,
+            .image_gather4_d16_bug,
             .ldsbankcount32,
-            .no_xnack_support,
+            .sramecc_support,
         }),
     };
     pub const gfx908 = CpuModel{
@@ -1168,7 +1214,6 @@ pub const cpu = struct {
         .llvm_name = "gfx908",
         .features = featureSet(&[_]Feature{
             .atomic_fadd_insts,
-            .code_object_v3,
             .dl_insts,
             .dot1_insts,
             .dot2_insts,
@@ -1179,19 +1224,30 @@ pub const cpu = struct {
             .fma_mix_insts,
             .gfx9,
             .half_rate_64_ops,
+            .image_gather4_d16_bug,
             .ldsbankcount32,
             .mai_insts,
             .mfma_inline_literal_bug,
             .pk_fmac_f16_inst,
-            .sram_ecc,
+            .sramecc_support,
         }),
     };
     pub const gfx909 = CpuModel{
         .name = "gfx909",
         .llvm_name = "gfx909",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .gfx9,
+            .image_gather4_d16_bug,
+            .ldsbankcount32,
+            .mad_mix_insts,
+        }),
+    };
+    pub const gfx90c = CpuModel{
+        .name = "gfx90c",
+        .llvm_name = "gfx90c",
+        .features = featureSet(&[_]Feature{
+            .gfx9,
+            .image_gather4_d16_bug,
             .ldsbankcount32,
             .mad_mix_insts,
             .xnack,
@@ -1201,9 +1257,6 @@ pub const cpu = struct {
         .name = "hainan",
         .llvm_name = "hainan",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
-            .ldsbankcount32,
-            .no_xnack_support,
             .southern_islands,
         }),
     };
@@ -1211,11 +1264,9 @@ pub const cpu = struct {
         .name = "hawaii",
         .llvm_name = "hawaii",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .fast_fmaf,
             .half_rate_64_ops,
             .ldsbankcount32,
-            .no_xnack_support,
             .sea_islands,
         }),
     };
@@ -1223,9 +1274,7 @@ pub const cpu = struct {
         .name = "iceland",
         .llvm_name = "iceland",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .ldsbankcount32,
-            .no_xnack_support,
             .sgpr_init_bug,
             .unpacked_d16_vmem,
             .volcanic_islands,
@@ -1235,9 +1284,7 @@ pub const cpu = struct {
         .name = "kabini",
         .llvm_name = "kabini",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .ldsbankcount16,
-            .no_xnack_support,
             .sea_islands,
         }),
     };
@@ -1245,9 +1292,7 @@ pub const cpu = struct {
         .name = "kaveri",
         .llvm_name = "kaveri",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .ldsbankcount32,
-            .no_xnack_support,
             .sea_islands,
         }),
     };
@@ -1255,9 +1300,7 @@ pub const cpu = struct {
         .name = "mullins",
         .llvm_name = "mullins",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .ldsbankcount16,
-            .no_xnack_support,
             .sea_islands,
         }),
     };
@@ -1265,9 +1308,6 @@ pub const cpu = struct {
         .name = "oland",
         .llvm_name = "oland",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
-            .ldsbankcount32,
-            .no_xnack_support,
             .southern_islands,
         }),
     };
@@ -1275,9 +1315,6 @@ pub const cpu = struct {
         .name = "pitcairn",
         .llvm_name = "pitcairn",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
-            .ldsbankcount32,
-            .no_xnack_support,
             .southern_islands,
         }),
     };
@@ -1285,9 +1322,7 @@ pub const cpu = struct {
         .name = "polaris10",
         .llvm_name = "polaris10",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .ldsbankcount32,
-            .no_xnack_support,
             .unpacked_d16_vmem,
             .volcanic_islands,
         }),
@@ -1296,9 +1331,7 @@ pub const cpu = struct {
         .name = "polaris11",
         .llvm_name = "polaris11",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .ldsbankcount32,
-            .no_xnack_support,
             .unpacked_d16_vmem,
             .volcanic_islands,
         }),
@@ -1307,21 +1340,19 @@ pub const cpu = struct {
         .name = "stoney",
         .llvm_name = "stoney",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
+            .image_gather4_d16_bug,
+            .image_store_d16_bug,
             .ldsbankcount16,
             .volcanic_islands,
-            .xnack,
+            .xnack_support,
         }),
     };
     pub const tahiti = CpuModel{
         .name = "tahiti",
         .llvm_name = "tahiti",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .fast_fmaf,
             .half_rate_64_ops,
-            .ldsbankcount32,
-            .no_xnack_support,
             .southern_islands,
         }),
     };
@@ -1329,9 +1360,17 @@ pub const cpu = struct {
         .name = "tonga",
         .llvm_name = "tonga",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
             .ldsbankcount32,
-            .no_xnack_support,
+            .sgpr_init_bug,
+            .unpacked_d16_vmem,
+            .volcanic_islands,
+        }),
+    };
+    pub const tongapro = CpuModel{
+        .name = "tongapro",
+        .llvm_name = "tongapro",
+        .features = featureSet(&[_]Feature{
+            .ldsbankcount32,
             .sgpr_init_bug,
             .unpacked_d16_vmem,
             .volcanic_islands,
@@ -1341,9 +1380,6 @@ pub const cpu = struct {
         .name = "verde",
         .llvm_name = "verde",
         .features = featureSet(&[_]Feature{
-            .code_object_v3,
-            .ldsbankcount32,
-            .no_xnack_support,
             .southern_islands,
         }),
     };
diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig
index 96365b3e04..ecd08f2861 100644
--- a/lib/std/target/arm.zig
+++ b/lib/std/target/arm.zig
@@ -1,8 +1,5 @@
-// SPDX-License-Identifier: MIT
-// Copyright (c) 2015-2021 Zig Contributors
-// This file is part of [zig](https://ziglang.org/), which is MIT licensed.
-// The MIT license requires this copyright notice to be included in all copies
-// and substantial portions of the software.
+//! This file is auto-generated by tools/update_cpu_features.zig.
+
 const std = @import("../std.zig");
 const CpuFeature = std.Target.Cpu.Feature;
 const CpuModel = std.Target.Cpu.Model;
@@ -53,6 +50,8 @@ pub const Feature = enum {
     fullfp16,
     fuse_aes,
     fuse_literals,
+    harden_sls_blr,
+    harden_sls_retbr,
     has_v4t,
     has_v5t,
     has_v5te,
@@ -62,6 +61,7 @@ pub const Feature = enum {
     has_v6t2,
     has_v7,
     has_v7clrex,
+    has_v8,
     has_v8_1a,
     has_v8_1m_main,
     has_v8_2a,
@@ -69,7 +69,7 @@ pub const Feature = enum {
     has_v8_4a,
     has_v8_5a,
     has_v8_6a,
-    has_v8,
+    has_v8_7a,
     has_v8m,
     has_v8m_main,
     hwdiv,
@@ -85,10 +85,10 @@ pub const Feature = enum {
     mp,
     muxed_units,
     mve,
-    mve_fp,
     mve1beat,
     mve2beat,
     mve4beat,
+    mve_fp,
     nacl_trap,
     neon,
     neon_fpmovs,
@@ -148,10 +148,6 @@ pub const Feature = enum {
     v7r,
     v7s,
     v7ve,
-    v8a,
-    v8m,
-    v8m_main,
-    v8r,
     v8_1a,
     v8_1m_main,
     v8_2a,
@@ -159,6 +155,11 @@ pub const Feature = enum {
     v8_4a,
     v8_5a,
     v8_6a,
+    v8_7a,
+    v8a,
+    v8m,
+    v8m_main,
+    v8r,
     vfp2,
     vfp2sp,
     vfp3,
@@ -238,7 +239,7 @@ pub const all_features = blk: {
         .llvm_name = "cde",
         .description = "Support CDE instructions",
         .dependencies = featureSet(&[_]Feature{
-            .v8m_main,
+            .has_v8m_main,
         }),
     };
     result[@enumToInt(Feature.cdecp0)] = .{
@@ -312,7 +313,6 @@ pub const all_features = blk: {
         .description = "Enable support for Cryptography extensions",
         .dependencies = featureSet(&[_]Feature{
             .aes,
-            .neon,
             .sha2,
         }),
     };
@@ -419,7 +419,6 @@ pub const all_features = blk: {
         .description = "Enable ARMv8 FP with only 16 d-registers",
         .dependencies = featureSet(&[_]Feature{
             .fp_armv8d16sp,
-            .fp64,
             .vfp4d16,
         }),
     };
@@ -434,7 +433,6 @@ pub const all_features = blk: {
         .llvm_name = "fp-armv8sp",
         .description = "Enable ARMv8 FP with no double precision",
         .dependencies = featureSet(&[_]Feature{
-            .d32,
             .fp_armv8d16sp,
             .vfp4sp,
         }),
@@ -481,6 +479,16 @@ pub const all_features = blk: {
         .description = "CPU fuses literal generation operations",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@enumToInt(Feature.harden_sls_blr)] = .{
+        .llvm_name = "harden-sls-blr",
+        .description = "Harden against straight line speculation across indirect calls",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+    result[@enumToInt(Feature.harden_sls_retbr)] = .{
+        .llvm_name = "harden-sls-retbr",
+        .description = "Harden against straight line speculation across RETurn and BranchRegister instructions",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@enumToInt(Feature.has_v4t)] = .{
         .llvm_name = "v4t",
         .description = "Support ARM v4T instructions",
@@ -525,18 +533,18 @@ pub const all_features = blk: {
         .llvm_name = "v6t2",
         .description = "Support ARM v6t2 instructions",
         .dependencies = featureSet(&[_]Feature{
-            .thumb2,
             .has_v6k,
             .has_v8m,
+            .thumb2,
         }),
     };
     result[@enumToInt(Feature.has_v7)] = .{
         .llvm_name = "v7",
         .description = "Support ARM v7 instructions",
         .dependencies = featureSet(&[_]Feature{
-            .perfmon,
             .has_v6t2,
             .has_v7clrex,
+            .perfmon,
         }),
     };
     result[@enumToInt(Feature.has_v7clrex)] = .{
@@ -592,8 +600,8 @@ pub const all_features = blk: {
         .llvm_name = "v8.5a",
         .description = "Support ARM v8.5a instructions",
         .dependencies = featureSet(&[_]Feature{
-            .sb,
             .has_v8_4a,
+            .sb,
         }),
     };
     result[@enumToInt(Feature.has_v8_6a)] = .{
@@ -601,8 +609,15 @@ pub const all_features = blk: {
         .description = "Support ARM v8.6a instructions",
         .dependencies = featureSet(&[_]Feature{
             .bf16,
-            .i8mm,
             .has_v8_5a,
+            .i8mm,
+        }),
+    };
+    result[@enumToInt(Feature.has_v8_7a)] = .{
+        .llvm_name = "v8.7a",
+        .description = "Support ARM v8.7a instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .has_v8_6a,
         }),
     };
     result[@enumToInt(Feature.has_v8m)] = .{
@@ -640,14 +655,14 @@ pub const all_features = blk: {
         .llvm_name = "iwmmxt",
         .description = "ARMv5te architecture",
         .dependencies = featureSet(&[_]Feature{
-            .has_v5te,
+            .v5te,
         }),
     };
     result[@enumToInt(Feature.iwmmxt2)] = .{
         .llvm_name = "iwmmxt2",
         .description = "ARMv5te architecture",
         .dependencies = featureSet(&[_]Feature{
-            .has_v5te,
+            .v5te,
         }),
     };
     result[@enumToInt(Feature.lob)] = .{
@@ -695,15 +710,6 @@ pub const all_features = blk: {
             .has_v8_1m_main,
         }),
     };
-    result[@enumToInt(Feature.mve_fp)] = .{
-        .llvm_name = "mve.fp",
-        .description = "Support M-Class Vector Extension with integer and floating ops",
-        .dependencies = featureSet(&[_]Feature{
-            .fp_armv8d16sp,
-            .fullfp16,
-            .mve,
-        }),
-    };
     result[@enumToInt(Feature.mve1beat)] = .{
         .llvm_name = "mve1beat",
         .description = "Model MVE instructions as a 1 beat per tick architecture",
@@ -719,6 +725,14 @@ pub const all_features = blk: {
         .description = "Model MVE instructions as a 4 beats per tick architecture",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@enumToInt(Feature.mve_fp)] = .{
+        .llvm_name = "mve.fp",
+        .description = "Support M-Class Vector Extension with integer and floating ops",
+        .dependencies = featureSet(&[_]Feature{
+            .fullfp16,
+            .mve,
+        }),
+    };
     result[@enumToInt(Feature.nacl_trap)] = .{
         .llvm_name = "nacl-trap",
         .description = "NaCl trap",
@@ -944,32 +958,32 @@ pub const all_features = blk: {
         .llvm_name = "armv4t",
         .description = "ARMv4t architecture",
         .dependencies = featureSet(&[_]Feature{
-            .strict_align,
             .has_v4t,
+            .strict_align,
         }),
     };
     result[@enumToInt(Feature.v5t)] = .{
         .llvm_name = "armv5t",
         .description = "ARMv5t architecture",
         .dependencies = featureSet(&[_]Feature{
-            .strict_align,
             .has_v5t,
+            .strict_align,
         }),
     };
     result[@enumToInt(Feature.v5te)] = .{
         .llvm_name = "armv5te",
         .description = "ARMv5te architecture",
         .dependencies = featureSet(&[_]Feature{
-            .strict_align,
             .has_v5te,
+            .strict_align,
         }),
     };
     result[@enumToInt(Feature.v5tej)] = .{
         .llvm_name = "armv5tej",
         .description = "ARMv5tej architecture",
         .dependencies = featureSet(&[_]Feature{
-            .strict_align,
             .has_v5te,
+            .strict_align,
         }),
     };
     result[@enumToInt(Feature.v6)] = .{
@@ -980,18 +994,6 @@ pub const all_features = blk: {
             .has_v6,
         }),
     };
-    result[@enumToInt(Feature.v6m)] = .{
-        .llvm_name = "armv6-m",
-        .description = "ARMv6m architecture",
-        .dependencies = featureSet(&[_]Feature{
-            .db,
-            .mclass,
-            .noarm,
-            .strict_align,
-            .thumb_mode,
-            .has_v6m,
-        }),
-    };
     result[@enumToInt(Feature.v6j)] = .{
         .llvm_name = "armv6j",
         .description = "ARMv7a architecture",
@@ -1010,8 +1012,20 @@ pub const all_features = blk: {
         .llvm_name = "armv6kz",
         .description = "ARMv6kz architecture",
         .dependencies = featureSet(&[_]Feature{
-            .trustzone,
             .has_v6k,
+            .trustzone,
+        }),
+    };
+    result[@enumToInt(Feature.v6m)] = .{
+        .llvm_name = "armv6-m",
+        .description = "ARMv6m architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .db,
+            .has_v6m,
+            .mclass,
+            .noarm,
+            .strict_align,
+            .thumb_mode,
         }),
     };
     result[@enumToInt(Feature.v6sm)] = .{
@@ -1019,11 +1033,11 @@ pub const all_features = blk: {
         .description = "ARMv6sm architecture",
         .dependencies = featureSet(&[_]Feature{
             .db,
+            .has_v6m,
             .mclass,
             .noarm,
             .strict_align,
             .thumb_mode,
-            .has_v6m,
         }),
     };
     result[@enumToInt(Feature.v6t2)] = .{
@@ -1041,53 +1055,51 @@ pub const all_features = blk: {
             .aclass,
             .db,
             .dsp,
-            .neon,
             .has_v7,
+            .neon,
         }),
     };
-    result[@enumToInt(Feature.v7m)] = .{
-        .llvm_name = "armv7-m",
-        .description = "ARMv7m architecture",
+    result[@enumToInt(Feature.v7em)] = .{
+        .llvm_name = "armv7e-m",
+        .description = "ARMv7em architecture",
         .dependencies = featureSet(&[_]Feature{
             .db,
+            .dsp,
+            .has_v7,
             .hwdiv,
             .mclass,
             .noarm,
             .thumb_mode,
-            .thumb2,
-            .has_v7,
         }),
     };
-    result[@enumToInt(Feature.v7r)] = .{
-        .llvm_name = "armv7-r",
-        .description = "ARMv7r architecture",
+    result[@enumToInt(Feature.v7k)] = .{
+        .llvm_name = "armv7k",
+        .description = "ARMv7a architecture",
         .dependencies = featureSet(&[_]Feature{
-            .db,
-            .dsp,
-            .hwdiv,
-            .rclass,
-            .has_v7,
+            .v7a,
         }),
     };
-    result[@enumToInt(Feature.v7em)] = .{
-        .llvm_name = "armv7e-m",
-        .description = "ARMv7em architecture",
+    result[@enumToInt(Feature.v7m)] = .{
+        .llvm_name = "armv7-m",
+        .description = "ARMv7m architecture",
         .dependencies = featureSet(&[_]Feature{
             .db,
-            .dsp,
+            .has_v7,
             .hwdiv,
             .mclass,
             .noarm,
             .thumb_mode,
-            .thumb2,
-            .has_v7,
         }),
     };
-    result[@enumToInt(Feature.v7k)] = .{
-        .llvm_name = "armv7k",
-        .description = "ARMv7a architecture",
+    result[@enumToInt(Feature.v7r)] = .{
+        .llvm_name = "armv7-r",
+        .description = "ARMv7r architecture",
         .dependencies = featureSet(&[_]Feature{
-            .v7a,
+            .db,
+            .dsp,
+            .has_v7,
+            .hwdiv,
+            .rclass,
         }),
     };
     result[@enumToInt(Feature.v7s)] = .{
@@ -1104,73 +1116,10 @@ pub const all_features = blk: {
             .aclass,
             .db,
             .dsp,
-            .mp,
-            .neon,
-            .trustzone,
             .has_v7,
-            .virtualization,
-        }),
-    };
-    result[@enumToInt(Feature.v8a)] = .{
-        .llvm_name = "armv8-a",
-        .description = "ARMv8a architecture",
-        .dependencies = featureSet(&[_]Feature{
-            .aclass,
-            .crc,
-            .crypto,
-            .db,
-            .dsp,
-            .fp_armv8,
             .mp,
             .neon,
             .trustzone,
-            .has_v8,
-            .virtualization,
-        }),
-    };
-    result[@enumToInt(Feature.v8m)] = .{
-        .llvm_name = "armv8-m.base",
-        .description = "ARMv8mBaseline architecture",
-        .dependencies = featureSet(&[_]Feature{
-            .@"8msecext",
-            .acquire_release,
-            .db,
-            .hwdiv,
-            .mclass,
-            .noarm,
-            .strict_align,
-            .thumb_mode,
-            .has_v7clrex,
-            .has_v8m,
-        }),
-    };
-    result[@enumToInt(Feature.v8m_main)] = .{
-        .llvm_name = "armv8-m.main",
-        .description = "ARMv8mMainline architecture",
-        .dependencies = featureSet(&[_]Feature{
-            .@"8msecext",
-            .acquire_release,
-            .db,
-            .hwdiv,
-            .mclass,
-            .noarm,
-            .thumb_mode,
-            .has_v8m_main,
-        }),
-    };
-    result[@enumToInt(Feature.v8r)] = .{
-        .llvm_name = "armv8-r",
-        .description = "ARMv8r architecture",
-        .dependencies = featureSet(&[_]Feature{
-            .crc,
-            .db,
-            .dfb,
-            .dsp,
-            .fp_armv8,
-            .mp,
-            .neon,
-            .rclass,
-            .has_v8,
             .virtualization,
         }),
     };
@@ -1184,10 +1133,9 @@ pub const all_features = blk: {
             .db,
             .dsp,
             .fp_armv8,
+            .has_v8_1a,
             .mp,
-            .neon,
             .trustzone,
-            .has_v8_1a,
             .virtualization,
         }),
     };
@@ -1198,13 +1146,13 @@ pub const all_features = blk: {
             .@"8msecext",
             .acquire_release,
             .db,
+            .has_v8_1m_main,
             .hwdiv,
             .lob,
             .mclass,
             .noarm,
             .ras,
             .thumb_mode,
-            .has_v8_1m_main,
         }),
     };
     result[@enumToInt(Feature.v8_2a)] = .{
@@ -1217,11 +1165,10 @@ pub const all_features = blk: {
             .db,
             .dsp,
             .fp_armv8,
+            .has_v8_2a,
             .mp,
-            .neon,
             .ras,
             .trustzone,
-            .has_v8_2a,
             .virtualization,
         }),
     };
@@ -1235,11 +1182,10 @@ pub const all_features = blk: {
             .db,
             .dsp,
             .fp_armv8,
+            .has_v8_3a,
             .mp,
-            .neon,
             .ras,
             .trustzone,
-            .has_v8_3a,
             .virtualization,
         }),
     };
@@ -1251,14 +1197,12 @@ pub const all_features = blk: {
             .crc,
             .crypto,
             .db,
-            .dotprod,
             .dsp,
             .fp_armv8,
+            .has_v8_4a,
             .mp,
-            .neon,
             .ras,
             .trustzone,
-            .has_v8_4a,
             .virtualization,
         }),
     };
@@ -1270,14 +1214,12 @@ pub const all_features = blk: {
             .crc,
             .crypto,
             .db,
-            .dotprod,
             .dsp,
             .fp_armv8,
+            .has_v8_5a,
             .mp,
-            .neon,
             .ras,
             .trustzone,
-            .has_v8_5a,
             .virtualization,
         }),
     };
@@ -1289,14 +1231,91 @@ pub const all_features = blk: {
             .crc,
             .crypto,
             .db,
-            .dotprod,
             .dsp,
             .fp_armv8,
+            .has_v8_6a,
             .mp,
-            .neon,
             .ras,
             .trustzone,
-            .has_v8_6a,
+            .virtualization,
+        }),
+    };
+    result[@enumToInt(Feature.v8_7a)] = .{
+        .llvm_name = "armv8.7-a",
+        .description = "ARMv86a architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .aclass,
+            .crc,
+            .crypto,
+            .db,
+            .dsp,
+            .fp_armv8,
+            .has_v8_7a,
+            .mp,
+            .ras,
+            .trustzone,
+            .virtualization,
+        }),
+    };
+    result[@enumToInt(Feature.v8a)] = .{
+        .llvm_name = "armv8-a",
+        .description = "ARMv8a architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .aclass,
+            .crc,
+            .crypto,
+            .db,
+            .dsp,
+            .fp_armv8,
+            .has_v8,
+            .mp,
+            .trustzone,
+            .virtualization,
+        }),
+    };
+    result[@enumToInt(Feature.v8m)] = .{
+        .llvm_name = "armv8-m.base",
+        .description = "ARMv8mBaseline architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .@"8msecext",
+            .acquire_release,
+            .db,
+            .has_v7clrex,
+            .has_v8m,
+            .hwdiv,
+            .mclass,
+            .noarm,
+            .strict_align,
+            .thumb_mode,
+        }),
+    };
+    result[@enumToInt(Feature.v8m_main)] = .{
+        .llvm_name = "armv8-m.main",
+        .description = "ARMv8mMainline architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .@"8msecext",
+            .acquire_release,
+            .db,
+            .has_v8m_main,
+            .hwdiv,
+            .mclass,
+            .noarm,
+            .thumb_mode,
+        }),
+    };
+    result[@enumToInt(Feature.v8r)] = .{
+        .llvm_name = "armv8-r",
+        .description = "ARMv8r architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .db,
+            .dfb,
+            .dsp,
+            .fp_armv8,
+            .has_v8,
+            .mp,
+            .neon,
+            .rclass,
             .virtualization,
         }),
     };
@@ -1327,7 +1346,6 @@ pub const all_features = blk: {
         .llvm_name = "vfp3d16",
         .description = "Enable VFP3 instructions with only 16 d-registers",
         .dependencies = featureSet(&[_]Feature{
-            .fp64,
             .vfp2,
             .vfp3d16sp,
         }),
@@ -1351,7 +1369,6 @@ pub const all_features = blk: {
         .llvm_name = "vfp4",
         .description = "Enable VFP4 instructions",
         .dependencies = featureSet(&[_]Feature{
-            .fp16,
             .vfp3,
             .vfp4d16,
             .vfp4sp,
@@ -1361,8 +1378,6 @@ pub const all_features = blk: {
         .llvm_name = "vfp4d16",
         .description = "Enable VFP4 instructions with only 16 d-registers",
         .dependencies = featureSet(&[_]Feature{
-            .fp16,
-            .fp64,
             .vfp3d16,
             .vfp4d16sp,
         }),
@@ -1379,8 +1394,6 @@ pub const all_features = blk: {
         .llvm_name = "vfp4sp",
         .description = "Enable VFP4 instructions with no double precision",
         .dependencies = featureSet(&[_]Feature{
-            .d32,
-            .fp16,
             .vfp3sp,
             .vfp4d16sp,
         }),
@@ -1417,7 +1430,7 @@ pub const all_features = blk: {
         .llvm_name = "xscale",
         .description = "ARMv5te architecture",
         .dependencies = featureSet(&[_]Feature{
-            .has_v5te,
+            .v5te,
         }),
     };
     result[@enumToInt(Feature.zcz)] = .{
@@ -1480,8 +1493,8 @@ pub const cpu = struct {
         .name = "arm1136jf_s",
         .llvm_name = "arm1136jf-s",
         .features = featureSet(&[_]Feature{
-            .v6,
             .slowfpvmlx,
+            .v6,
             .vfp2,
         }),
     };
@@ -1496,8 +1509,8 @@ pub const cpu = struct {
         .name = "arm1156t2f_s",
         .llvm_name = "arm1156t2f-s",
         .features = featureSet(&[_]Feature{
-            .v6t2,
             .slowfpvmlx,
+            .v6t2,
             .vfp2,
         }),
     };
@@ -1519,8 +1532,8 @@ pub const cpu = struct {
         .name = "arm1176jzf_s",
         .llvm_name = "arm1176jzf-s",
         .features = featureSet(&[_]Feature{
-            .v6kz,
             .slowfpvmlx,
+            .v6kz,
             .vfp2,
         }),
     };
@@ -1654,11 +1667,11 @@ pub const cpu = struct {
         .name = "cortex_a12",
         .llvm_name = "cortex-a12",
         .features = featureSet(&[_]Feature{
-            .v7a,
             .avoid_partial_cpsr,
             .mp,
             .ret_addr_stack,
             .trustzone,
+            .v7a,
             .vfp4,
             .virtualization,
             .vmlx_forwarding,
@@ -1668,14 +1681,13 @@ pub const cpu = struct {
         .name = "cortex_a15",
         .llvm_name = "cortex-a15",
         .features = featureSet(&[_]Feature{
-            .v7a,
             .avoid_partial_cpsr,
-            .dont_widen_vmovs,
             .mp,
             .muxed_units,
             .ret_addr_stack,
             .splat_vfp_neon,
             .trustzone,
+            .v7a,
             .vfp4,
             .virtualization,
             .vldn_align,
@@ -1685,11 +1697,11 @@ pub const cpu = struct {
         .name = "cortex_a17",
         .llvm_name = "cortex-a17",
         .features = featureSet(&[_]Feature{
-            .v7a,
             .avoid_partial_cpsr,
             .mp,
             .ret_addr_stack,
             .trustzone,
+            .v7a,
             .vfp4,
             .virtualization,
             .vmlx_forwarding,
@@ -1699,10 +1711,6 @@ pub const cpu = struct {
         .name = "cortex_a32",
         .llvm_name = "cortex-a32",
         .features = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .hwdiv,
-            .hwdiv_arm,
             .v8a,
         }),
     };
@@ -1710,10 +1718,6 @@ pub const cpu = struct {
         .name = "cortex_a35",
         .llvm_name = "cortex-a35",
         .features = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .hwdiv,
-            .hwdiv_arm,
             .v8a,
         }),
     };
@@ -1721,13 +1725,13 @@ pub const cpu = struct {
         .name = "cortex_a5",
         .llvm_name = "cortex-a5",
         .features = featureSet(&[_]Feature{
-            .v7a,
             .mp,
             .ret_addr_stack,
             .slow_fp_brcc,
             .slowfpvfmx,
             .slowfpvmlx,
             .trustzone,
+            .v7a,
             .vfp4,
             .vmlx_forwarding,
         }),
@@ -1736,49 +1740,39 @@ pub const cpu = struct {
         .name = "cortex_a53",
         .llvm_name = "cortex-a53",
         .features = featureSet(&[_]Feature{
-            .v8a,
-            .crc,
-            .crypto,
             .fpao,
-            .hwdiv,
-            .hwdiv_arm,
+            .v8a,
         }),
     };
     pub const cortex_a55 = CpuModel{
         .name = "cortex_a55",
         .llvm_name = "cortex-a55",
         .features = featureSet(&[_]Feature{
-            .v8_2a,
             .dotprod,
-            .hwdiv,
-            .hwdiv_arm,
+            .v8_2a,
         }),
     };
     pub const cortex_a57 = CpuModel{
         .name = "cortex_a57",
         .llvm_name = "cortex-a57",
         .features = featureSet(&[_]Feature{
-            .v8a,
             .avoid_partial_cpsr,
             .cheap_predicable_cpsr,
-            .crc,
-            .crypto,
             .fpao,
-            .hwdiv,
-            .hwdiv_arm,
+            .v8a,
         }),
     };
     pub const cortex_a7 = CpuModel{
         .name = "cortex_a7",
         .llvm_name = "cortex-a7",
         .features = featureSet(&[_]Feature{
-            .v7a,
             .mp,
             .ret_addr_stack,
             .slow_fp_brcc,
             .slowfpvfmx,
             .slowfpvmlx,
             .trustzone,
+            .v7a,
             .vfp4,
             .virtualization,
             .vmlx_forwarding,
@@ -1790,10 +1784,6 @@ pub const cpu = struct {
         .llvm_name = "cortex-a72",
         .features = featureSet(&[_]Feature{
             .v8a,
-            .crc,
-            .crypto,
-            .hwdiv,
-            .hwdiv_arm,
         }),
     };
     pub const cortex_a73 = CpuModel{
@@ -1801,20 +1791,14 @@ pub const cpu = struct {
         .llvm_name = "cortex-a73",
         .features = featureSet(&[_]Feature{
             .v8a,
-            .crc,
-            .crypto,
-            .hwdiv,
-            .hwdiv_arm,
         }),
     };
     pub const cortex_a75 = CpuModel{
         .name = "cortex_a75",
         .llvm_name = "cortex-a75",
         .features = featureSet(&[_]Feature{
-            .v8_2a,
             .dotprod,
-            .hwdiv,
-            .hwdiv_arm,
+            .v8_2a,
         }),
     };
     pub const cortex_a76 = CpuModel{
@@ -1822,13 +1806,9 @@ pub const cpu = struct {
         .llvm_name = "cortex-a76",
         .features = featureSet(&[_]Feature{
             .a76,
-            .v8_2a,
-            .crc,
-            .crypto,
             .dotprod,
             .fullfp16,
-            .hwdiv,
-            .hwdiv_arm,
+            .v8_2a,
         }),
     };
     pub const cortex_a76ae = CpuModel{
@@ -1836,52 +1816,49 @@ pub const cpu = struct {
         .llvm_name = "cortex-a76ae",
         .features = featureSet(&[_]Feature{
             .a76,
-            .v8_2a,
-            .crc,
-            .crypto,
             .dotprod,
             .fullfp16,
-            .hwdiv,
-            .hwdiv_arm,
+            .v8_2a,
         }),
     };
     pub const cortex_a77 = CpuModel{
         .name = "cortex_a77",
         .llvm_name = "cortex-a77",
         .features = featureSet(&[_]Feature{
-            .v8_2a,
-            .crc,
-            .crypto,
             .dotprod,
             .fullfp16,
-            .hwdiv,
-            .hwdiv_arm,
+            .v8_2a,
         }),
     };
     pub const cortex_a78 = CpuModel{
         .name = "cortex_a78",
         .llvm_name = "cortex-a78",
         .features = featureSet(&[_]Feature{
+            .dotprod,
+            .fullfp16,
             .v8_2a,
-            .crc,
-            .crypto,
+        }),
+    };
+    pub const cortex_a78c = CpuModel{
+        .name = "cortex_a78c",
+        .llvm_name = "cortex-a78c",
+        .features = featureSet(&[_]Feature{
             .dotprod,
             .fullfp16,
-            .hwdiv,
-            .hwdiv_arm,
+            .v8_2a,
         }),
     };
     pub const cortex_a8 = CpuModel{
         .name = "cortex_a8",
         .llvm_name = "cortex-a8",
         .features = featureSet(&[_]Feature{
-            .v7a,
             .nonpipelined_vfp,
             .ret_addr_stack,
             .slow_fp_brcc,
             .slowfpvfmx,
             .slowfpvmlx,
             .trustzone,
+            .v7a,
             .vmlx_forwarding,
             .vmlx_hazards,
         }),
@@ -1890,7 +1867,6 @@ pub const cpu = struct {
         .name = "cortex_a9",
         .llvm_name = "cortex-a9",
         .features = featureSet(&[_]Feature{
-            .v7a,
             .avoid_partial_cpsr,
             .expand_fp_mlx,
             .fp16,
@@ -1900,6 +1876,7 @@ pub const cpu = struct {
             .prefer_vmovsr,
             .ret_addr_stack,
             .trustzone,
+            .v7a,
             .vldn_align,
             .vmlx_forwarding,
             .vmlx_hazards,
@@ -1930,26 +1907,25 @@ pub const cpu = struct {
         .name = "cortex_m23",
         .llvm_name = "cortex-m23",
         .features = featureSet(&[_]Feature{
-            .v8m,
             .no_movt,
+            .v8m,
         }),
     };
     pub const cortex_m3 = CpuModel{
         .name = "cortex_m3",
         .llvm_name = "cortex-m3",
         .features = featureSet(&[_]Feature{
-            .v7m,
             .loop_align,
             .m3,
             .no_branch_predictor,
             .use_misched,
+            .v7m,
         }),
     };
     pub const cortex_m33 = CpuModel{
         .name = "cortex_m33",
         .llvm_name = "cortex-m33",
         .features = featureSet(&[_]Feature{
-            .v8m_main,
             .dsp,
             .fp_armv8d16sp,
             .loop_align,
@@ -1957,13 +1933,13 @@ pub const cpu = struct {
             .slowfpvfmx,
             .slowfpvmlx,
             .use_misched,
+            .v8m_main,
         }),
     };
     pub const cortex_m35p = CpuModel{
         .name = "cortex_m35p",
         .llvm_name = "cortex-m35p",
         .features = featureSet(&[_]Feature{
-            .v8m_main,
             .dsp,
             .fp_armv8d16sp,
             .loop_align,
@@ -1971,18 +1947,19 @@ pub const cpu = struct {
             .slowfpvfmx,
             .slowfpvmlx,
             .use_misched,
+            .v8m_main,
         }),
     };
     pub const cortex_m4 = CpuModel{
         .name = "cortex_m4",
         .llvm_name = "cortex-m4",
         .features = featureSet(&[_]Feature{
-            .v7em,
             .loop_align,
             .no_branch_predictor,
             .slowfpvfmx,
             .slowfpvmlx,
             .use_misched,
+            .v7em,
             .vfp4d16sp,
         }),
     };
@@ -1990,45 +1967,45 @@ pub const cpu = struct {
         .name = "cortex_m55",
         .llvm_name = "cortex-m55",
         .features = featureSet(&[_]Feature{
-            .v8_1m_main,
-            .dsp,
             .fp_armv8d16,
             .loop_align,
             .mve_fp,
             .no_branch_predictor,
             .slowfpvmlx,
             .use_misched,
+            .v8_1m_main,
         }),
     };
     pub const cortex_m7 = CpuModel{
         .name = "cortex_m7",
         .llvm_name = "cortex-m7",
         .features = featureSet(&[_]Feature{
-            .v7em,
             .fp_armv8d16,
+            .use_misched,
+            .v7em,
         }),
     };
     pub const cortex_r4 = CpuModel{
         .name = "cortex_r4",
         .llvm_name = "cortex-r4",
         .features = featureSet(&[_]Feature{
-            .v7r,
             .avoid_partial_cpsr,
             .r4,
             .ret_addr_stack,
+            .v7r,
         }),
     };
     pub const cortex_r4f = CpuModel{
         .name = "cortex_r4f",
         .llvm_name = "cortex-r4f",
         .features = featureSet(&[_]Feature{
-            .v7r,
             .avoid_partial_cpsr,
             .r4,
             .ret_addr_stack,
             .slow_fp_brcc,
             .slowfpvfmx,
             .slowfpvmlx,
+            .v7r,
             .vfp3d16,
         }),
     };
@@ -2036,13 +2013,13 @@ pub const cpu = struct {
         .name = "cortex_r5",
         .llvm_name = "cortex-r5",
         .features = featureSet(&[_]Feature{
-            .v7r,
             .avoid_partial_cpsr,
             .hwdiv_arm,
             .ret_addr_stack,
             .slow_fp_brcc,
             .slowfpvfmx,
             .slowfpvmlx,
+            .v7r,
             .vfp3d16,
         }),
     };
@@ -2050,16 +2027,15 @@ pub const cpu = struct {
         .name = "cortex_r52",
         .llvm_name = "cortex-r52",
         .features = featureSet(&[_]Feature{
-            .v8r,
             .fpao,
             .use_misched,
+            .v8r,
         }),
     };
     pub const cortex_r7 = CpuModel{
         .name = "cortex_r7",
         .llvm_name = "cortex-r7",
         .features = featureSet(&[_]Feature{
-            .v7r,
             .avoid_partial_cpsr,
             .fp16,
             .hwdiv_arm,
@@ -2068,6 +2044,7 @@ pub const cpu = struct {
             .slow_fp_brcc,
             .slowfpvfmx,
             .slowfpvmlx,
+            .v7r,
             .vfp3d16,
         }),
     };
@@ -2075,7 +2052,6 @@ pub const cpu = struct {
         .name = "cortex_r8",
         .llvm_name = "cortex-r8",
         .features = featureSet(&[_]Feature{
-            .v7r,
             .avoid_partial_cpsr,
             .fp16,
             .hwdiv_arm,
@@ -2084,6 +2060,7 @@ pub const cpu = struct {
             .slow_fp_brcc,
             .slowfpvfmx,
             .slowfpvmlx,
+            .v7r,
             .vfp3d16,
         }),
     };
@@ -2091,34 +2068,25 @@ pub const cpu = struct {
         .name = "cortex_x1",
         .llvm_name = "cortex-x1",
         .features = featureSet(&[_]Feature{
-            .v8_2a,
-            .crc,
-            .crypto,
             .dotprod,
             .fullfp16,
-            .hwdiv,
-            .hwdiv_arm,
+            .v8_2a,
         }),
     };
     pub const cyclone = CpuModel{
         .name = "cyclone",
         .llvm_name = "cyclone",
         .features = featureSet(&[_]Feature{
-            .v8a,
             .avoid_movs_shop,
             .avoid_partial_cpsr,
-            .crypto,
             .disable_postra_scheduler,
-            .hwdiv,
-            .hwdiv_arm,
-            .mp,
             .neonfp,
             .ret_addr_stack,
             .slowfpvfmx,
             .slowfpvmlx,
             .swift,
             .use_misched,
-            .vfp4,
+            .v8a,
             .zcz,
         }),
     };
@@ -2133,34 +2101,34 @@ pub const cpu = struct {
         .name = "exynos_m1",
         .llvm_name = null,
         .features = featureSet(&[_]Feature{
-            .v8a,
             .exynos,
+            .v8a,
         }),
     };
     pub const exynos_m2 = CpuModel{
         .name = "exynos_m2",
         .llvm_name = null,
         .features = featureSet(&[_]Feature{
-            .v8a,
             .exynos,
+            .v8a,
         }),
     };
     pub const exynos_m3 = CpuModel{
         .name = "exynos_m3",
         .llvm_name = "exynos-m3",
         .features = featureSet(&[_]Feature{
-            .v8_2a,
             .exynos,
+            .v8a,
         }),
     };
     pub const exynos_m4 = CpuModel{
         .name = "exynos_m4",
         .llvm_name = "exynos-m4",
         .features = featureSet(&[_]Feature{
-            .v8_2a,
             .dotprod,
             .exynos,
             .fullfp16,
+            .v8_2a,
         }),
     };
     pub const exynos_m5 = CpuModel{
@@ -2190,7 +2158,6 @@ pub const cpu = struct {
         .llvm_name = "krait",
         .features = featureSet(&[_]Feature{
             .avoid_partial_cpsr,
-            .fp16,
             .hwdiv,
             .hwdiv_arm,
             .muxed_units,
@@ -2205,10 +2172,6 @@ pub const cpu = struct {
         .name = "kryo",
         .llvm_name = "kryo",
         .features = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .hwdiv,
-            .hwdiv_arm,
             .v8a,
         }),
     };
@@ -2216,8 +2179,8 @@ pub const cpu = struct {
         .name = "mpcore",
         .llvm_name = "mpcore",
         .features = featureSet(&[_]Feature{
-            .v6k,
             .slowfpvmlx,
+            .v6k,
             .vfp2,
         }),
     };
@@ -2232,12 +2195,27 @@ pub const cpu = struct {
         .name = "neoverse_n1",
         .llvm_name = "neoverse-n1",
         .features = featureSet(&[_]Feature{
-            .v8_2a,
-            .crc,
-            .crypto,
             .dotprod,
-            .hwdiv,
-            .hwdiv_arm,
+            .v8_2a,
+        }),
+    };
+    pub const neoverse_n2 = CpuModel{
+        .name = "neoverse_n2",
+        .llvm_name = "neoverse-n2",
+        .features = featureSet(&[_]Feature{
+            .bf16,
+            .i8mm,
+            .v8_5a,
+        }),
+    };
+    pub const neoverse_v1 = CpuModel{
+        .name = "neoverse_v1",
+        .llvm_name = "neoverse-v1",
+        .features = featureSet(&[_]Feature{
+            .bf16,
+            .fullfp16,
+            .i8mm,
+            .v8_4a,
         }),
     };
     pub const sc000 = CpuModel{
@@ -2251,10 +2229,10 @@ pub const cpu = struct {
         .name = "sc300",
         .llvm_name = "sc300",
         .features = featureSet(&[_]Feature{
-            .v7m,
             .m3,
             .no_branch_predictor,
             .use_misched,
+            .v7m,
         }),
     };
     pub const strongarm = CpuModel{
@@ -2289,7 +2267,6 @@ pub const cpu = struct {
         .name = "swift",
         .llvm_name = "swift",
         .features = featureSet(&[_]Feature{
-            .v7a,
             .avoid_movs_shop,
             .avoid_partial_cpsr,
             .disable_postra_scheduler,
@@ -2308,6 +2285,7 @@ pub const cpu = struct {
             .slowfpvmlx,
             .swift,
             .use_misched,
+            .v7a,
             .vfp4,
             .vmlx_hazards,
             .wide_stride_vfp,
diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig
index f85867444a..079d30cf92 100644
--- a/lib/std/target/avr.zig
+++ b/lib/std/target/avr.zig
@@ -1,8 +1,5 @@
-// SPDX-License-Identifier: MIT
-// Copyright (c) 2015-2021 Zig Contributors
-// This file is part of [zig](https://ziglang.org/), which is MIT licensed.
-// The MIT license requires this copyright notice to be included in all copies
-// and substantial portions of the software.
+//! This file is auto-generated by tools/update_cpu_features.zig.
+
 const std = @import("../std.zig");
 const CpuFeature = std.Target.Cpu.Feature;
 const CpuModel = std.Target.Cpu.Model;
@@ -163,7 +160,6 @@ pub const all_features = blk: {
         .dependencies = featureSet(&[_]Feature{
             .avr0,
             .@"break",
-            .memmappedregs,
             .sram,
             .tinyencoding,
         }),
@@ -802,6 +798,13 @@ pub const cpu = struct {
             .avr5,
         }),
     };
+    pub const atmega168pb = CpuModel{
+        .name = "atmega168pb",
+        .llvm_name = "atmega168pb",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
     pub const atmega169 = CpuModel{
         .name = "atmega169",
         .llvm_name = "atmega169",
@@ -949,6 +952,13 @@ pub const cpu = struct {
             .avr5,
         }),
     };
+    pub const atmega324pb = CpuModel{
+        .name = "atmega324pb",
+        .llvm_name = "atmega324pb",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
     pub const atmega325 = CpuModel{
         .name = "atmega325",
         .llvm_name = "atmega325",
@@ -1019,6 +1029,13 @@ pub const cpu = struct {
             .avr5,
         }),
     };
+    pub const atmega328pb = CpuModel{
+        .name = "atmega328pb",
+        .llvm_name = "atmega328pb",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
     pub const atmega329 = CpuModel{
         .name = "atmega329",
         .llvm_name = "atmega329",
@@ -1166,6 +1183,13 @@ pub const cpu = struct {
             .avr4,
         }),
     };
+    pub const atmega48pb = CpuModel{
+        .name = "atmega48pb",
+        .llvm_name = "atmega48pb",
+        .features = featureSet(&[_]Feature{
+            .avr4,
+        }),
+    };
     pub const atmega64 = CpuModel{
         .name = "atmega64",
         .llvm_name = "atmega64",
@@ -1338,7 +1362,11 @@ pub const cpu = struct {
         .name = "atmega8",
         .llvm_name = "atmega8",
         .features = featureSet(&[_]Feature{
-            .avr4,
+            .avr2,
+            .lpmx,
+            .movw,
+            .mul,
+            .spm,
         }),
     };
     pub const atmega8515 = CpuModel{
@@ -1391,11 +1419,22 @@ pub const cpu = struct {
             .avr4,
         }),
     };
+    pub const atmega88pb = CpuModel{
+        .name = "atmega88pb",
+        .llvm_name = "atmega88pb",
+        .features = featureSet(&[_]Feature{
+            .avr4,
+        }),
+    };
     pub const atmega8a = CpuModel{
         .name = "atmega8a",
         .llvm_name = "atmega8a",
         .features = featureSet(&[_]Feature{
-            .avr4,
+            .avr2,
+            .lpmx,
+            .movw,
+            .mul,
+            .spm,
         }),
     };
     pub const atmega8hva = CpuModel{
@@ -1595,6 +1634,13 @@ pub const cpu = struct {
             .avr25,
         }),
     };
+    pub const attiny441 = CpuModel{
+        .name = "attiny441",
+        .llvm_name = "attiny441",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
     pub const attiny44a = CpuModel{
         .name = "attiny44a",
         .llvm_name = "attiny44a",
@@ -1651,6 +1697,13 @@ pub const cpu = struct {
             .avr25,
         }),
     };
+    pub const attiny841 = CpuModel{
+        .name = "attiny841",
+        .llvm_name = "attiny841",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
     pub const attiny84a = CpuModel{
         .name = "attiny84a",
         .llvm_name = "attiny84a",
@@ -1802,7 +1855,7 @@ pub const cpu = struct {
         .name = "atxmega16e5",
         .llvm_name = "atxmega16e5",
         .features = featureSet(&[_]Feature{
-            .xmega,
+            .xmegau,
         }),
     };
     pub const atxmega192a3 = CpuModel{
@@ -1907,7 +1960,7 @@ pub const cpu = struct {
         .name = "atxmega32e5",
         .llvm_name = "atxmega32e5",
         .features = featureSet(&[_]Feature{
-            .xmega,
+            .xmegau,
         }),
     };
     pub const atxmega32x1 = CpuModel{
@@ -2005,7 +2058,7 @@ pub const cpu = struct {
         .name = "atxmega8e5",
         .llvm_name = "atxmega8e5",
         .features = featureSet(&[_]Feature{
-            .xmega,
+            .xmegau,
         }),
     };
     pub const avr1 = CpuModel{
diff --git a/lib/std/target/bpf.zig b/lib/std/target/bpf.zig
index 73287ec6a8..3d3032689d 100644
--- a/lib/std/target/bpf.zig
+++ b/lib/std/target/bpf.zig
@@ -1,8 +1,5 @@
-// SPDX-License-Identifier: MIT
-// Copyright (c) 2015-2021 Zig Contributors
-// This file is part of [zig](https://ziglang.org/), which is MIT licensed.
-// The MIT license requires this copyright notice to be included in all copies
-// and substantial portions of the software.
+//! This file is auto-generated by tools/update_cpu_features.zig.
+
 const std = @import("../std.zig");
 const CpuFeature = std.Target.Cpu.Feature;
 const CpuModel = std.Target.Cpu.Model;
diff --git a/lib/std/target/hexagon.zig b/lib/std/target/hexagon.zig
index b1f565f52d..aa8d8f6efd 100644
--- a/lib/std/target/hexagon.zig
+++ b/lib/std/target/hexagon.zig
@@ -1,8 +1,5 @@
-// SPDX-License-Identifier: MIT
-// Copyright (c) 2015-2021 Zig Contributors
-// This file is part of [zig](https://ziglang.org/), which is MIT licensed.
-// The MIT license requires this copyright notice to be included in all copies
-// and substantial portions of the software.
+//! This file is auto-generated by tools/update_cpu_features.zig.
+
 const std = @import("../std.zig");
 const CpuFeature = std.Target.Cpu.Feature;
 const CpuModel = std.Target.Cpu.Model;
@@ -92,7 +89,6 @@ pub const all_features = blk: {
         .llvm_name = "hvxv62",
         .description = "Hexagon HVX instructions",
         .dependencies = featureSet(&[_]Feature{
-            .hvx,
             .hvxv60,
         }),
     };
@@ -100,8 +96,6 @@ pub const all_features = blk: {
         .llvm_name = "hvxv65",
         .description = "Hexagon HVX instructions",
         .dependencies = featureSet(&[_]Feature{
-            .hvx,
-            .hvxv60,
             .hvxv62,
         }),
     };
@@ -109,9 +103,6 @@ pub const all_features = blk: {
         .llvm_name = "hvxv66",
         .description = "Hexagon HVX instructions",
         .dependencies = featureSet(&[_]Feature{
-            .hvx,
-            .hvxv60,
-            .hvxv62,
             .hvxv65,
             .zreg,
         }),
@@ -120,9 +111,6 @@ pub const all_features = blk: {
         .llvm_name = "hvxv67",
         .description = "Hexagon HVX instructions",
         .dependencies = featureSet(&[_]Feature{
-            .hvxv60,
-            .hvxv62,
-            .hvxv65,
             .hvxv66,
         }),
     };
@@ -248,7 +236,6 @@ pub const cpu = struct {
             .memops,
             .nvj,
             .nvs,
-            .packets,
             .prev65,
             .small_data,
             .v5,
@@ -265,7 +252,6 @@ pub const cpu = struct {
             .memops,
             .nvj,
             .nvs,
-            .packets,
             .prev65,
             .small_data,
             .v5,
@@ -280,7 +266,6 @@ pub const cpu = struct {
             .memops,
             .nvj,
             .nvs,
-            .packets,
             .prev65,
             .small_data,
             .v5,
@@ -296,7 +281,6 @@ pub const cpu = struct {
             .memops,
             .nvj,
             .nvs,
-            .packets,
             .prev65,
             .small_data,
             .v5,
@@ -313,7 +297,6 @@ pub const cpu = struct {
             .memops,
             .nvj,
             .nvs,
-            .packets,
             .prev65,
             .small_data,
             .v5,
@@ -332,7 +315,6 @@ pub const cpu = struct {
             .memops,
             .nvj,
             .nvs,
-            .packets,
             .small_data,
             .v5,
             .v55,
@@ -351,7 +333,6 @@ pub const cpu = struct {
             .memops,
             .nvj,
             .nvs,
-            .packets,
             .small_data,
             .v5,
             .v55,
@@ -371,7 +352,6 @@ pub const cpu = struct {
             .memops,
             .nvj,
             .nvs,
-            .packets,
             .small_data,
             .v5,
             .v55,
@@ -391,7 +371,6 @@ pub const cpu = struct {
             .mem_noshuf,
             .memops,
             .nvs,
-            .packets,
             .small_data,
             .tinycore,
             .v5,
diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig
index 59da13ac39..c88d2ec8fb 100644
--- a/lib/std/target/mips.zig
+++ b/lib/std/target/mips.zig
@@ -1,8 +1,5 @@
-// SPDX-License-Identifier: MIT
-// Copyright (c) 2015-2021 Zig Contributors
-// This file is part of [zig](https://ziglang.org/), which is MIT licensed.
-// The MIT license requires this copyright notice to be included in all copies
-// and substantial portions of the software.
+//! This file is auto-generated by tools/update_cpu_features.zig.
+
 const std = @import("../std.zig");
 const CpuFeature = std.Target.Cpu.Feature;
 const CpuModel = std.Target.Cpu.Model;
@@ -108,7 +105,6 @@ pub const all_features = blk: {
         .llvm_name = "dspr3",
         .description = "Mips DSP-R3 ASE",
         .dependencies = featureSet(&[_]Feature{
-            .dsp,
             .dspr2,
         }),
     };
@@ -301,10 +297,8 @@ pub const all_features = blk: {
         .llvm_name = "mips64r6",
         .description = "Mips64r6 ISA Support [experimental]",
         .dependencies = featureSet(&[_]Feature{
-            .abs2008,
             .mips32r6,
             .mips64r5,
-            .nan2008,
         }),
     };
     result[@enumToInt(Feature.msa)] = .{
@@ -515,16 +509,13 @@ pub const cpu = struct {
         .llvm_name = "octeon",
         .features = featureSet(&[_]Feature{
             .cnmips,
-            .mips64r2,
         }),
     };
     pub const @"octeon+" = CpuModel{
         .name = "octeon+",
         .llvm_name = "octeon+",
         .features = featureSet(&[_]Feature{
-            .cnmips,
             .cnmipsp,
-            .mips64r2,
         }),
     };
     pub const p5600 = CpuModel{
diff --git a/lib/std/target/msp430.zig b/lib/std/target/msp430.zig
index c1005a1d81..be59b09706 100644
--- a/lib/std/target/msp430.zig
+++ b/lib/std/target/msp430.zig
@@ -1,8 +1,5 @@
-// SPDX-License-Identifier: MIT
-// Copyright (c) 2015-2021 Zig Contributors
-// This file is part of [zig](https://ziglang.org/), which is MIT licensed.
-// The MIT license requires this copyright notice to be included in all copies
-// and substantial portions of the software.
+//! This file is auto-generated by tools/update_cpu_features.zig.
+
 const std = @import("../std.zig");
 const CpuFeature = std.Target.Cpu.Feature;
 const CpuModel = std.Target.Cpu.Model;
diff --git a/lib/std/target/nvptx.zig b/lib/std/target/nvptx.zig
index b025fbfcf7..6b9b9bf777 100644
--- a/lib/std/target/nvptx.zig
+++ b/lib/std/target/nvptx.zig
@@ -1,8 +1,5 @@
-// SPDX-License-Identifier: MIT
-// Copyright (c) 2015-2021 Zig Contributors
-// This file is part of [zig](https://ziglang.org/), which is MIT licensed.
-// The MIT license requires this copyright notice to be included in all copies
-// and substantial portions of the software.
+//! This file is auto-generated by tools/update_cpu_features.zig.
+
 const std = @import("../std.zig");
 const CpuFeature = std.Target.Cpu.Feature;
 const CpuModel = std.Target.Cpu.Model;
diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig
index 2db7d30e8d..4e2200a47f 100644
--- a/lib/std/target/powerpc.zig
+++ b/lib/std/target/powerpc.zig
@@ -1,8 +1,5 @@
-// SPDX-License-Identifier: MIT
-// Copyright (c) 2015-2021 Zig Contributors
-// This file is part of [zig](https://ziglang.org/), which is MIT licensed.
-// The MIT license requires this copyright notice to be included in all copies
-// and substantial portions of the software.
+//! This file is auto-generated by tools/update_cpu_features.zig.
+
 const std = @import("../std.zig");
 const CpuFeature = std.Target.Cpu.Feature;
 const CpuModel = std.Target.Cpu.Model;
@@ -10,6 +7,7 @@ const CpuModel = std.Target.Cpu.Model;
 pub const Feature = enum {
     @"64bit",
     @"64bitregs",
+    aix,
     allow_unaligned_fp_access,
     altivec,
     booke,
@@ -19,6 +17,7 @@ pub const Feature = enum {
     crypto,
     direct_move,
     e500,
+    efpu2,
     extdiv,
     fcpsgn,
     float128,
@@ -32,6 +31,7 @@ pub const Feature = enum {
     fsqrt,
     fuse_addi_load,
     fuse_addis_load,
+    fuse_store,
     fusion,
     hard_float,
     htm,
@@ -44,7 +44,10 @@ pub const Feature = enum {
     lfiwax,
     longcall,
     mfocrf,
+    mma,
+    modern_aix_as,
     msync,
+    paired_vector_memops,
     partword_atomics,
     pcrelative_memops,
     popcntd,
@@ -53,13 +56,12 @@ pub const Feature = enum {
     power8_vector,
     power9_altivec,
     power9_vector,
-    ppc_postra_sched,
-    ppc_prera_sched,
     ppc4xx,
     ppc6xx,
+    ppc_postra_sched,
+    ppc_prera_sched,
     predictable_select_expensive,
     prefix_instrs,
-    qpx,
     recipprec,
     secure_plt,
     slow_popcntd,
@@ -86,6 +88,11 @@ pub const all_features = blk: {
         .description = "Enable 64-bit registers usage for ppc32 [beta]",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@enumToInt(Feature.aix)] = .{
+        .llvm_name = "aix",
+        .description = "AIX OS",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@enumToInt(Feature.allow_unaligned_fp_access)] = .{
         .llvm_name = "allow-unaligned-fp-access",
         .description = "CPU does not trap on unaligned FP access",
@@ -139,6 +146,13 @@ pub const all_features = blk: {
         .description = "Enable E500/E500mc instructions",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@enumToInt(Feature.efpu2)] = .{
+        .llvm_name = "efpu2",
+        .description = "Enable Embedded Floating-Point APU 2 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .spe,
+        }),
+    };
     result[@enumToInt(Feature.extdiv)] = .{
         .llvm_name = "extdiv",
         .description = "Enable extended divide instructions",
@@ -228,6 +242,13 @@ pub const all_features = blk: {
             .fusion,
         }),
     };
+    result[@enumToInt(Feature.fuse_store)] = .{
+        .llvm_name = "fuse-store",
+        .description = "Target supports store clustering",
+        .dependencies = featureSet(&[_]Feature{
+            .fusion,
+        }),
+    };
     result[@enumToInt(Feature.fusion)] = .{
         .llvm_name = "fusion",
         .description = "Target supports instruction fusion",
@@ -292,6 +313,20 @@ pub const all_features = blk: {
         .description = "Enable the MFOCRF instruction",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@enumToInt(Feature.mma)] = .{
+        .llvm_name = "mma",
+        .description = "Enable MMA instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .paired_vector_memops,
+            .power8_vector,
+            .power9_altivec,
+        }),
+    };
+    result[@enumToInt(Feature.modern_aix_as)] = .{
+        .llvm_name = "modern-aix-as",
+        .description = "AIX system assembler is modern enough to support new mnes",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@enumToInt(Feature.msync)] = .{
         .llvm_name = "msync",
         .description = "Has only the msync instruction instead of sync",
@@ -299,6 +334,13 @@ pub const all_features = blk: {
             .booke,
         }),
     };
+    result[@enumToInt(Feature.paired_vector_memops)] = .{
+        .llvm_name = "paired-vector-memops",
+        .description = "32Byte load and store instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .isa_v30_instructions,
+        }),
+    };
     result[@enumToInt(Feature.partword_atomics)] = .{
         .llvm_name = "partword-atomics",
         .description = "Enable l[bh]arx and st[bh]cx.",
@@ -308,7 +350,7 @@ pub const all_features = blk: {
         .llvm_name = "pcrelative-memops",
         .description = "Enable PC relative Memory Ops",
         .dependencies = featureSet(&[_]Feature{
-            .isa_v30_instructions,
+            .prefix_instrs,
         }),
     };
     result[@enumToInt(Feature.popcntd)] = .{
@@ -351,21 +393,10 @@ pub const all_features = blk: {
         .llvm_name = "power9-vector",
         .description = "Enable POWER9 vector instructions",
         .dependencies = featureSet(&[_]Feature{
-            .isa_v30_instructions,
             .power8_vector,
             .power9_altivec,
         }),
     };
-    result[@enumToInt(Feature.ppc_postra_sched)] = .{
-        .llvm_name = "ppc-postra-sched",
-        .description = "Use PowerPC post-RA scheduling strategy",
-        .dependencies = featureSet(&[_]Feature{}),
-    };
-    result[@enumToInt(Feature.ppc_prera_sched)] = .{
-        .llvm_name = "ppc-prera-sched",
-        .description = "Use PowerPC pre-RA scheduling strategy",
-        .dependencies = featureSet(&[_]Feature{}),
-    };
     result[@enumToInt(Feature.ppc4xx)] = .{
         .llvm_name = "ppc4xx",
         .description = "Enable PPC 4xx instructions",
@@ -376,6 +407,16 @@ pub const all_features = blk: {
         .description = "Enable PPC 6xx instructions",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@enumToInt(Feature.ppc_postra_sched)] = .{
+        .llvm_name = "ppc-postra-sched",
+        .description = "Use PowerPC post-RA scheduling strategy",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+    result[@enumToInt(Feature.ppc_prera_sched)] = .{
+        .llvm_name = "ppc-prera-sched",
+        .description = "Use PowerPC pre-RA scheduling strategy",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@enumToInt(Feature.predictable_select_expensive)] = .{
         .llvm_name = "predictable-select-expensive",
         .description = "Prefer likely predicted branches over selects",
@@ -385,18 +426,10 @@ pub const all_features = blk: {
         .llvm_name = "prefix-instrs",
         .description = "Enable prefixed instructions",
         .dependencies = featureSet(&[_]Feature{
-            .isa_v30_instructions,
             .power8_vector,
             .power9_altivec,
         }),
     };
-    result[@enumToInt(Feature.qpx)] = .{
-        .llvm_name = "qpx",
-        .description = "Enable QPX instructions",
-        .dependencies = featureSet(&[_]Feature{
-            .fpu,
-        }),
-    };
     result[@enumToInt(Feature.recipprec)] = .{
         .llvm_name = "recipprec",
         .description = "Assume higher precision reciprocal estimates",
@@ -452,94 +485,90 @@ pub const all_features = blk: {
 };
 
 pub const cpu = struct {
-    pub const @"ppc440" = CpuModel{
-        .name = "ppc440",
+    pub const @"440" = CpuModel{
+        .name = "440",
         .llvm_name = "440",
         .features = featureSet(&[_]Feature{
-            .booke,
             .fres,
             .frsqrte,
-            .icbt,
             .isel,
             .msync,
         }),
     };
-    pub const @"ppc450" = CpuModel{
-        .name = "ppc450",
+    pub const @"450" = CpuModel{
+        .name = "450",
         .llvm_name = "450",
         .features = featureSet(&[_]Feature{
-            .booke,
             .fres,
             .frsqrte,
-            .icbt,
             .isel,
             .msync,
         }),
     };
-    pub const @"ppc601" = CpuModel{
-        .name = "ppc601",
+    pub const @"601" = CpuModel{
+        .name = "601",
         .llvm_name = "601",
         .features = featureSet(&[_]Feature{
             .fpu,
         }),
     };
-    pub const @"ppc602" = CpuModel{
-        .name = "ppc602",
+    pub const @"602" = CpuModel{
+        .name = "602",
         .llvm_name = "602",
         .features = featureSet(&[_]Feature{
             .fpu,
         }),
     };
-    pub const @"ppc603" = CpuModel{
-        .name = "ppc603",
+    pub const @"603" = CpuModel{
+        .name = "603",
         .llvm_name = "603",
         .features = featureSet(&[_]Feature{
             .fres,
             .frsqrte,
         }),
     };
-    pub const @"ppc603e" = CpuModel{
-        .name = "ppc603e",
+    pub const @"603e" = CpuModel{
+        .name = "603e",
         .llvm_name = "603e",
         .features = featureSet(&[_]Feature{
             .fres,
             .frsqrte,
         }),
     };
-    pub const @"ppc603ev" = CpuModel{
-        .name = "ppc603ev",
+    pub const @"603ev" = CpuModel{
+        .name = "603ev",
         .llvm_name = "603ev",
         .features = featureSet(&[_]Feature{
             .fres,
             .frsqrte,
         }),
     };
-    pub const @"ppc604" = CpuModel{
-        .name = "ppc604",
+    pub const @"604" = CpuModel{
+        .name = "604",
         .llvm_name = "604",
         .features = featureSet(&[_]Feature{
             .fres,
             .frsqrte,
         }),
     };
-    pub const @"ppc604e" = CpuModel{
-        .name = "ppc604e",
+    pub const @"604e" = CpuModel{
+        .name = "604e",
         .llvm_name = "604e",
         .features = featureSet(&[_]Feature{
             .fres,
             .frsqrte,
         }),
     };
-    pub const @"ppc620" = CpuModel{
-        .name = "ppc620",
+    pub const @"620" = CpuModel{
+        .name = "620",
         .llvm_name = "620",
         .features = featureSet(&[_]Feature{
             .fres,
             .frsqrte,
         }),
     };
-    pub const @"ppc7400" = CpuModel{
-        .name = "ppc7400",
+    pub const @"7400" = CpuModel{
+        .name = "7400",
         .llvm_name = "7400",
         .features = featureSet(&[_]Feature{
             .altivec,
@@ -547,8 +576,8 @@ pub const cpu = struct {
             .frsqrte,
         }),
     };
-    pub const @"ppc7450" = CpuModel{
-        .name = "ppc7450",
+    pub const @"7450" = CpuModel{
+        .name = "7450",
         .llvm_name = "7450",
         .features = featureSet(&[_]Feature{
             .altivec,
@@ -556,16 +585,16 @@ pub const cpu = struct {
             .frsqrte,
         }),
     };
-    pub const @"ppc750" = CpuModel{
-        .name = "ppc750",
+    pub const @"750" = CpuModel{
+        .name = "750",
         .llvm_name = "750",
         .features = featureSet(&[_]Feature{
             .fres,
             .frsqrte,
         }),
     };
-    pub const @"ppc970" = CpuModel{
-        .name = "ppc970",
+    pub const @"970" = CpuModel{
+        .name = "970",
         .llvm_name = "970",
         .features = featureSet(&[_]Feature{
             .@"64bit",
@@ -592,7 +621,6 @@ pub const cpu = struct {
             .frsqrte,
             .frsqrtes,
             .fsqrt,
-            .icbt,
             .isel,
             .ldbrx,
             .lfiwax,
@@ -602,38 +630,10 @@ pub const cpu = struct {
             .stfiwx,
         }),
     };
-    pub const a2q = CpuModel{
-        .name = "a2q",
-        .llvm_name = "a2q",
-        .features = featureSet(&[_]Feature{
-            .@"64bit",
-            .booke,
-            .cmpb,
-            .fcpsgn,
-            .fpcvt,
-            .fprnd,
-            .fre,
-            .fres,
-            .frsqrte,
-            .frsqrtes,
-            .fsqrt,
-            .icbt,
-            .isel,
-            .ldbrx,
-            .lfiwax,
-            .mfocrf,
-            .qpx,
-            .recipprec,
-            .slow_popcntd,
-            .stfiwx,
-        }),
-    };
     pub const e500 = CpuModel{
         .name = "e500",
         .llvm_name = "e500",
         .features = featureSet(&[_]Feature{
-            .booke,
-            .icbt,
             .isel,
             .msync,
             .spe,
@@ -644,7 +644,6 @@ pub const cpu = struct {
         .llvm_name = "e500mc",
         .features = featureSet(&[_]Feature{
             .booke,
-            .icbt,
             .isel,
             .stfiwx,
         }),
@@ -655,7 +654,6 @@ pub const cpu = struct {
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .booke,
-            .icbt,
             .isel,
             .mfocrf,
             .stfiwx,
@@ -667,7 +665,6 @@ pub const cpu = struct {
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .allow_unaligned_fp_access,
-            .altivec,
             .bpermd,
             .cmpb,
             .crypto,
@@ -681,28 +678,24 @@ pub const cpu = struct {
             .frsqrte,
             .frsqrtes,
             .fsqrt,
+            .fuse_store,
             .htm,
             .icbt,
-            .isa_v30_instructions,
-            .isa_v31_instructions,
             .isel,
             .ldbrx,
             .lfiwax,
             .mfocrf,
+            .mma,
             .partword_atomics,
             .pcrelative_memops,
             .popcntd,
             .power10_vector,
-            .power8_altivec,
-            .power8_vector,
-            .power9_altivec,
-            .power9_vector,
+            .ppc_postra_sched,
+            .ppc_prera_sched,
             .predictable_select_expensive,
-            .prefix_instrs,
             .recipprec,
             .stfiwx,
             .two_const_nr,
-            .vsx,
         }),
     };
     pub const g3 = CpuModel{
@@ -760,7 +753,7 @@ pub const cpu = struct {
     };
     pub const ppc32 = CpuModel{
         .name = "ppc32",
-        .llvm_name = "ppc",
+        .llvm_name = "ppc32",
         .features = featureSet(&[_]Feature{
             .hard_float,
         }),
@@ -784,7 +777,6 @@ pub const cpu = struct {
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .allow_unaligned_fp_access,
-            .altivec,
             .bpermd,
             .cmpb,
             .crypto,
@@ -808,13 +800,11 @@ pub const cpu = struct {
             .mfocrf,
             .partword_atomics,
             .popcntd,
-            .power8_altivec,
             .power8_vector,
             .predictable_select_expensive,
             .recipprec,
             .stfiwx,
             .two_const_nr,
-            .vsx,
         }),
     };
     pub const pwr10 = CpuModel{
@@ -823,7 +813,6 @@ pub const cpu = struct {
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .allow_unaligned_fp_access,
-            .altivec,
             .bpermd,
             .cmpb,
             .crypto,
@@ -837,28 +826,24 @@ pub const cpu = struct {
             .frsqrte,
             .frsqrtes,
             .fsqrt,
+            .fuse_store,
             .htm,
             .icbt,
-            .isa_v30_instructions,
-            .isa_v31_instructions,
             .isel,
             .ldbrx,
             .lfiwax,
             .mfocrf,
+            .mma,
             .partword_atomics,
             .pcrelative_memops,
             .popcntd,
             .power10_vector,
-            .power8_altivec,
-            .power8_vector,
-            .power9_altivec,
-            .power9_vector,
+            .ppc_postra_sched,
+            .ppc_prera_sched,
             .predictable_select_expensive,
-            .prefix_instrs,
             .recipprec,
             .stfiwx,
             .two_const_nr,
-            .vsx,
         }),
     };
     pub const pwr3 = CpuModel{
@@ -963,7 +948,6 @@ pub const cpu = struct {
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .allow_unaligned_fp_access,
-            .altivec,
             .bpermd,
             .cmpb,
             .extdiv,
@@ -992,7 +976,6 @@ pub const cpu = struct {
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .allow_unaligned_fp_access,
-            .altivec,
             .bpermd,
             .cmpb,
             .crypto,
@@ -1016,13 +999,11 @@ pub const cpu = struct {
             .mfocrf,
             .partword_atomics,
             .popcntd,
-            .power8_altivec,
             .power8_vector,
             .predictable_select_expensive,
             .recipprec,
             .stfiwx,
             .two_const_nr,
-            .vsx,
         }),
     };
     pub const pwr9 = CpuModel{
@@ -1031,7 +1012,6 @@ pub const cpu = struct {
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .allow_unaligned_fp_access,
-            .altivec,
             .bpermd,
             .cmpb,
             .crypto,
@@ -1047,16 +1027,12 @@ pub const cpu = struct {
             .fsqrt,
             .htm,
             .icbt,
-            .isa_v30_instructions,
             .isel,
             .ldbrx,
             .lfiwax,
             .mfocrf,
             .partword_atomics,
             .popcntd,
-            .power8_altivec,
-            .power8_vector,
-            .power9_altivec,
             .power9_vector,
             .ppc_postra_sched,
             .ppc_prera_sched,
@@ -1065,7 +1041,6 @@ pub const cpu = struct {
             .stfiwx,
             .two_const_nr,
             .vectors_use_two_units,
-            .vsx,
         }),
     };
 };
diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig
index b9eea13c87..5b19a936cf 100644
--- a/lib/std/target/riscv.zig
+++ b/lib/std/target/riscv.zig
@@ -1,8 +1,5 @@
-// SPDX-License-Identifier: MIT
-// Copyright (c) 2015-2021 Zig Contributors
-// This file is part of [zig](https://ziglang.org/), which is MIT licensed.
-// The MIT license requires this copyright notice to be included in all copies
-// and substantial portions of the software.
+//! This file is auto-generated by tools/update_cpu_features.zig.
+
 const std = @import("../std.zig");
 const CpuFeature = std.Target.Cpu.Feature;
 const CpuModel = std.Target.Cpu.Model;
@@ -15,6 +12,7 @@ pub const Feature = enum {
     e,
     experimental_b,
     experimental_v,
+    experimental_zba,
     experimental_zbb,
     experimental_zbc,
     experimental_zbe,
@@ -25,6 +23,9 @@ pub const Feature = enum {
     experimental_zbr,
     experimental_zbs,
     experimental_zbt,
+    experimental_zfh,
+    experimental_zvamo,
+    experimental_zvlsseg,
     f,
     m,
     no_rvc_hints,
@@ -100,6 +101,7 @@ pub const all_features = blk: {
         .llvm_name = "experimental-b",
         .description = "'B' (Bit Manipulation Instructions)",
         .dependencies = featureSet(&[_]Feature{
+            .experimental_zba,
             .experimental_zbb,
             .experimental_zbc,
             .experimental_zbe,
@@ -114,9 +116,12 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.experimental_v)] = .{
         .llvm_name = "experimental-v",
         .description = "'V' (Vector Instructions)",
-        .dependencies = featureSet(&[_]Feature{
-            .f,
-        }),
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+    result[@enumToInt(Feature.experimental_zba)] = .{
+        .llvm_name = "experimental-zba",
+        .description = "'Zba' (Address calculation 'B' Instructions)",
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.experimental_zbb)] = .{
         .llvm_name = "experimental-zbb",
@@ -168,6 +173,27 @@ pub const all_features = blk: {
         .description = "'Zbt' (Ternary 'B' Instructions)",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@enumToInt(Feature.experimental_zfh)] = .{
+        .llvm_name = "experimental-zfh",
+        .description = "'Zfh' (Half-Precision Floating-Point)",
+        .dependencies = featureSet(&[_]Feature{
+            .f,
+        }),
+    };
+    result[@enumToInt(Feature.experimental_zvamo)] = .{
+        .llvm_name = "experimental-zvamo",
+        .description = "'Zvamo'(Vector AMO Operations)",
+        .dependencies = featureSet(&[_]Feature{
+            .experimental_v,
+        }),
+    };
+    result[@enumToInt(Feature.experimental_zvlsseg)] = .{
+        .llvm_name = "experimental-zvlsseg",
+        .description = "'Zvlsseg' (Vector segment load/store instructions)",
+        .dependencies = featureSet(&[_]Feature{
+            .experimental_v,
+        }),
+    };
     result[@enumToInt(Feature.f)] = .{
         .llvm_name = "f",
         .description = "'F' (Single-Precision Floating-Point)",
@@ -364,7 +390,6 @@ pub const cpu = struct {
             .a,
             .c,
             .d,
-            .f,
             .m,
         }),
     };
@@ -376,7 +401,6 @@ pub const cpu = struct {
             .a,
             .c,
             .d,
-            .f,
             .m,
         }),
     };
@@ -404,6 +428,18 @@ pub const cpu = struct {
             .@"64bit",
         }),
     };
+    pub const sifive_7_rv32 = CpuModel{
+        .name = "sifive_7_rv32",
+        .llvm_name = "sifive-7-rv32",
+        .features = featureSet(&[_]Feature{}),
+    };
+    pub const sifive_7_rv64 = CpuModel{
+        .name = "sifive_7_rv64",
+        .llvm_name = "sifive-7-rv64",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+        }),
+    };
     pub const sifive_e31 = CpuModel{
         .name = "sifive_e31",
         .llvm_name = "sifive-e31",
@@ -413,6 +449,16 @@ pub const cpu = struct {
             .m,
         }),
     };
+    pub const sifive_e76 = CpuModel{
+        .name = "sifive_e76",
+        .llvm_name = "sifive-e76",
+        .features = featureSet(&[_]Feature{
+            .a,
+            .c,
+            .f,
+            .m,
+        }),
+    };
     pub const sifive_u54 = CpuModel{
         .name = "sifive_u54",
         .llvm_name = "sifive-u54",
@@ -421,7 +467,17 @@ pub const cpu = struct {
             .a,
             .c,
             .d,
-            .f,
+            .m,
+        }),
+    };
+    pub const sifive_u74 = CpuModel{
+        .name = "sifive_u74",
+        .llvm_name = "sifive-u74",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .a,
+            .c,
+            .d,
             .m,
         }),
     };
diff --git a/lib/std/target/sparc.zig b/lib/std/target/sparc.zig
index a075160d59..5423739be6 100644
--- a/lib/std/target/sparc.zig
+++ b/lib/std/target/sparc.zig
@@ -1,8 +1,5 @@
-// SPDX-License-Identifier: MIT
-// Copyright (c) 2015-2021 Zig Contributors
-// This file is part of [zig](https://ziglang.org/), which is MIT licensed.
-// The MIT license requires this copyright notice to be included in all copies
-// and substantial portions of the software.
+//! This file is auto-generated by tools/update_cpu_features.zig.
+
 const std = @import("../std.zig");
 const CpuFeature = std.Target.Cpu.Feature;
 const CpuModel = std.Target.Cpu.Model;
@@ -160,6 +157,11 @@ pub const cpu = struct {
         .llvm_name = "f934",
         .features = featureSet(&[_]Feature{}),
     };
+    pub const generic = CpuModel{
+        .name = "generic",
+        .llvm_name = "generic",
+        .features = featureSet(&[_]Feature{}),
+    };
     pub const gr712rc = CpuModel{
         .name = "gr712rc",
         .llvm_name = "gr712rc",
diff --git a/lib/std/target/systemz.zig b/lib/std/target/systemz.zig
index 8a78167e69..65c53984eb 100644
--- a/lib/std/target/systemz.zig
+++ b/lib/std/target/systemz.zig
@@ -1,8 +1,5 @@
-// SPDX-License-Identifier: MIT
-// Copyright (c) 2015-2021 Zig Contributors
-// This file is part of [zig](https://ziglang.org/), which is MIT licensed.
-// The MIT license requires this copyright notice to be included in all copies
-// and substantial portions of the software.
+//! This file is auto-generated by tools/update_cpu_features.zig.
+
 const std = @import("../std.zig");
 const CpuFeature = std.Target.Cpu.Feature;
 const CpuModel = std.Target.Cpu.Model;
diff --git a/lib/std/target/ve.zig b/lib/std/target/ve.zig
new file mode 100644
index 0000000000..ff3eea698d
--- /dev/null
+++ b/lib/std/target/ve.zig
@@ -0,0 +1,36 @@
+//! This file is auto-generated by tools/update_cpu_features.zig.
+
+const std = @import("../std.zig");
+const CpuFeature = std.Target.Cpu.Feature;
+const CpuModel = std.Target.Cpu.Model;
+
+pub const Feature = enum {
+    vpu,
+};
+
+pub usingnamespace CpuFeature.feature_set_fns(Feature);
+
+pub const all_features = blk: {
+    const len = @typeInfo(Feature).Enum.fields.len;
+    std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
+    var result: [len]CpuFeature = undefined;
+    result[@enumToInt(Feature.vpu)] = .{
+        .llvm_name = "vpu",
+        .description = "Enable the VPU",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+    const ti = @typeInfo(Feature);
+    for (result) |*elem, i| {
+        elem.index = i;
+        elem.name = ti.Enum.fields[i].name;
+    }
+    break :blk result;
+};
+
+pub const cpu = struct {
+    pub const generic = CpuModel{
+        .name = "generic",
+        .llvm_name = "generic",
+        .features = featureSet(&[_]Feature{}),
+    };
+};
diff --git a/lib/std/target/wasm.zig b/lib/std/target/wasm.zig
index 0a3281c692..4714125f30 100644
--- a/lib/std/target/wasm.zig
+++ b/lib/std/target/wasm.zig
@@ -1,8 +1,5 @@
-// SPDX-License-Identifier: MIT
-// Copyright (c) 2015-2021 Zig Contributors
-// This file is part of [zig](https://ziglang.org/), which is MIT licensed.
-// The MIT license requires this copyright notice to be included in all copies
-// and substantial portions of the software.
+//! This file is auto-generated by tools/update_cpu_features.zig.
+
 const std = @import("../std.zig");
 const CpuFeature = std.Target.Cpu.Feature;
 const CpuModel = std.Target.Cpu.Model;
diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig
index abe154d509..eeb773b034 100644
--- a/lib/std/target/x86.zig
+++ b/lib/std/target/x86.zig
@@ -1,13 +1,12 @@
-// SPDX-License-Identifier: MIT
-// Copyright (c) 2015-2021 Zig Contributors
-// This file is part of [zig](https://ziglang.org/), which is MIT licensed.
-// The MIT license requires this copyright notice to be included in all copies
-// and substantial portions of the software.
+//! This file is auto-generated by tools/update_cpu_features.zig.
+
 const std = @import("../std.zig");
 const CpuFeature = std.Target.Cpu.Feature;
 const CpuModel = std.Target.Cpu.Model;
 
 pub const Feature = enum {
+    @"16bit_mode",
+    @"32bit_mode",
     @"3dnow",
     @"3dnowa",
     @"64bit",
@@ -33,6 +32,7 @@ pub const Feature = enum {
     avx512vnni,
     avx512vp2intersect,
     avx512vpopcntdq,
+    avxvnni,
     bmi,
     bmi2,
     branchfusion,
@@ -64,11 +64,14 @@ pub const Feature = enum {
     fma,
     fma4,
     fsgsbase,
+    fsrm,
     fxsr,
     gfni,
+    hreset,
     idivl_to_divb,
     idivq_to_divl,
     invpcid,
+    kl,
     lea_sp,
     lea_uses_ag,
     lvi_cfi,
@@ -76,12 +79,10 @@ pub const Feature = enum {
     lwp,
     lzcnt,
     macrofusion,
-    merge_to_threeway_branch,
     mmx,
     movbe,
     movdir64b,
     movdiri,
-    mpx,
     mwaitx,
     nopl,
     pad_short_functions,
@@ -120,15 +121,16 @@ pub const Feature = enum {
     slow_unaligned_mem_32,
     soft_float,
     sse,
-    sse_unaligned_mem,
     sse2,
     sse3,
     sse4_1,
     sse4_2,
     sse4a,
+    sse_unaligned_mem,
     ssse3,
     tbm,
     tsxldtrk,
+    uintr,
     use_aa,
     use_glm_div_sqrt_costs,
     vaes,
@@ -136,6 +138,7 @@ pub const Feature = enum {
     vzeroupper,
     waitpkg,
     wbnoinvd,
+    widekl,
     x87,
     xop,
     xsave,
@@ -150,6 +153,16 @@ pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
     std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
     var result: [len]CpuFeature = undefined;
+    result[@enumToInt(Feature.@"16bit_mode")] = .{
+        .llvm_name = "16bit-mode",
+        .description = "16-bit mode (i8086)",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+    result[@enumToInt(Feature.@"32bit_mode")] = .{
+        .llvm_name = "32bit-mode",
+        .description = "32-bit mode (80386)",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@enumToInt(Feature.@"3dnow")] = .{
         .llvm_name = "3dnow",
         .description = "Enable 3DNow! instructions",
@@ -321,6 +334,13 @@ pub const all_features = blk: {
             .avx512f,
         }),
     };
+    result[@enumToInt(Feature.avxvnni)] = .{
+        .llvm_name = "avxvnni",
+        .description = "Support AVX_VNNI encoding",
+        .dependencies = featureSet(&[_]Feature{
+            .avx2,
+        }),
+    };
     result[@enumToInt(Feature.bmi)] = .{
         .llvm_name = "bmi",
         .description = "Support BMI instructions",
@@ -485,6 +505,11 @@ pub const all_features = blk: {
         .description = "Support FS/GS Base instructions",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@enumToInt(Feature.fsrm)] = .{
+        .llvm_name = "fsrm",
+        .description = "REP MOVSB of short lengths is faster",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@enumToInt(Feature.fxsr)] = .{
         .llvm_name = "fxsr",
         .description = "Support fxsave/fxrestore instructions",
@@ -497,6 +522,11 @@ pub const all_features = blk: {
             .sse2,
         }),
     };
+    result[@enumToInt(Feature.hreset)] = .{
+        .llvm_name = "hreset",
+        .description = "Has hreset instruction",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@enumToInt(Feature.idivl_to_divb)] = .{
         .llvm_name = "idivl-to-divb",
         .description = "Use 8-bit divide for positive values less than 256",
@@ -512,6 +542,13 @@ pub const all_features = blk: {
         .description = "Invalidate Process-Context Identifier",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@enumToInt(Feature.kl)] = .{
+        .llvm_name = "kl",
+        .description = "Support Key Locker kl Instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse2,
+        }),
+    };
     result[@enumToInt(Feature.lea_sp)] = .{
         .llvm_name = "lea-sp",
         .description = "Use LEA for adjusting the stack pointer",
@@ -547,11 +584,6 @@ pub const all_features = blk: {
         .description = "Various instructions can be fused with conditional branches",
         .dependencies = featureSet(&[_]Feature{}),
     };
-    result[@enumToInt(Feature.merge_to_threeway_branch)] = .{
-        .llvm_name = "merge-to-threeway-branch",
-        .description = "Merge branches to a three-way conditional branch",
-        .dependencies = featureSet(&[_]Feature{}),
-    };
     result[@enumToInt(Feature.mmx)] = .{
         .llvm_name = "mmx",
         .description = "Enable MMX instructions",
@@ -572,11 +604,6 @@ pub const all_features = blk: {
         .description = "Support movdiri instruction",
         .dependencies = featureSet(&[_]Feature{}),
     };
-    result[@enumToInt(Feature.mpx)] = .{
-        .llvm_name = "mpx",
-        .description = "Deprecated. Support MPX instructions",
-        .dependencies = featureSet(&[_]Feature{}),
-    };
     result[@enumToInt(Feature.mwaitx)] = .{
         .llvm_name = "mwaitx",
         .description = "Enable MONITORX/MWAITX timer functionality",
@@ -691,7 +718,7 @@ pub const all_features = blk: {
     };
     result[@enumToInt(Feature.sahf)] = .{
         .llvm_name = "sahf",
-        .description = "Support LAHF and SAHF instructions",
+        .description = "Support LAHF and SAHF instructions in 64-bit mode",
         .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.serialize)] = .{
@@ -778,11 +805,6 @@ pub const all_features = blk: {
         .description = "Enable SSE instructions",
         .dependencies = featureSet(&[_]Feature{}),
     };
-    result[@enumToInt(Feature.sse_unaligned_mem)] = .{
-        .llvm_name = "sse-unaligned-mem",
-        .description = "Allow unaligned memory operands with SSE instructions",
-        .dependencies = featureSet(&[_]Feature{}),
-    };
     result[@enumToInt(Feature.sse2)] = .{
         .llvm_name = "sse2",
         .description = "Enable SSE2 instructions",
@@ -818,6 +840,11 @@ pub const all_features = blk: {
             .sse3,
         }),
     };
+    result[@enumToInt(Feature.sse_unaligned_mem)] = .{
+        .llvm_name = "sse-unaligned-mem",
+        .description = "Allow unaligned memory operands with SSE instructions",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@enumToInt(Feature.ssse3)] = .{
         .llvm_name = "ssse3",
         .description = "Enable SSSE3 instructions",
@@ -835,6 +862,11 @@ pub const all_features = blk: {
         .description = "Support TSXLDTRK instructions",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@enumToInt(Feature.uintr)] = .{
+        .llvm_name = "uintr",
+        .description = "Has UINTR Instructions",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@enumToInt(Feature.use_aa)] = .{
         .llvm_name = "use-aa",
         .description = "Use alias analysis during codegen",
@@ -876,6 +908,13 @@ pub const all_features = blk: {
         .description = "Write Back No Invalidate",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@enumToInt(Feature.widekl)] = .{
+        .llvm_name = "widekl",
+        .description = "Support Key Locker wide Instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .kl,
+        }),
+    };
     result[@enumToInt(Feature.x87)] = .{
         .llvm_name = "x87",
         .description = "Enable X87 float instructions",
@@ -923,6 +962,97 @@ pub const all_features = blk: {
 };
 
 pub const cpu = struct {
+    pub const _i386 = CpuModel{
+        .name = "_i386",
+        .llvm_name = "i386",
+        .features = featureSet(&[_]Feature{
+            .slow_unaligned_mem_16,
+            .vzeroupper,
+            .x87,
+        }),
+    };
+    pub const _i486 = CpuModel{
+        .name = "_i486",
+        .llvm_name = "i486",
+        .features = featureSet(&[_]Feature{
+            .slow_unaligned_mem_16,
+            .vzeroupper,
+            .x87,
+        }),
+    };
+    pub const _i586 = CpuModel{
+        .name = "_i586",
+        .llvm_name = "i586",
+        .features = featureSet(&[_]Feature{
+            .cx8,
+            .slow_unaligned_mem_16,
+            .vzeroupper,
+            .x87,
+        }),
+    };
+    pub const _i686 = CpuModel{
+        .name = "_i686",
+        .llvm_name = "i686",
+        .features = featureSet(&[_]Feature{
+            .cmov,
+            .cx8,
+            .slow_unaligned_mem_16,
+            .vzeroupper,
+            .x87,
+        }),
+    };
+    pub const alderlake = CpuModel{
+        .name = "alderlake",
+        .llvm_name = "alderlake",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .adx,
+            .aes,
+            .avxvnni,
+            .bmi,
+            .bmi2,
+            .cldemote,
+            .clflushopt,
+            .cmov,
+            .cx16,
+            .ermsb,
+            .f16c,
+            .false_deps_popcnt,
+            .fast_15bytenop,
+            .fast_gather,
+            .fast_scalar_fsqrt,
+            .fast_shld_rotate,
+            .fast_variable_shuffle,
+            .fast_vector_fsqrt,
+            .fma,
+            .fsgsbase,
+            .fxsr,
+            .hreset,
+            .idivq_to_divl,
+            .invpcid,
+            .lzcnt,
+            .macrofusion,
+            .mmx,
+            .movbe,
+            .nopl,
+            .pclmul,
+            .popcnt,
+            .prfchw,
+            .ptwrite,
+            .rdrnd,
+            .rdseed,
+            .sahf,
+            .serialize,
+            .sgx,
+            .slow_3ops_lea,
+            .vzeroupper,
+            .waitpkg,
+            .x87,
+            .xsavec,
+            .xsaveopt,
+            .xsaves,
+        }),
+    };
     pub const amdfam10 = CpuModel{
         .name = "amdfam10",
         .llvm_name = "amdfam10",
@@ -931,7 +1061,6 @@ pub const cpu = struct {
             .@"64bit",
             .cmov,
             .cx16,
-            .cx8,
             .fast_scalar_shift_masks,
             .fxsr,
             .lzcnt,
@@ -959,43 +1088,45 @@ pub const cpu = struct {
             .x87,
         }),
     };
-    pub const athlon_4 = CpuModel{
-        .name = "athlon_4",
-        .llvm_name = "athlon-4",
+    pub const athlon64 = CpuModel{
+        .name = "athlon64",
+        .llvm_name = "athlon64",
         .features = featureSet(&[_]Feature{
             .@"3dnowa",
+            .@"64bit",
             .cmov,
             .cx8,
+            .fast_scalar_shift_masks,
             .fxsr,
             .nopl,
             .slow_shld,
             .slow_unaligned_mem_16,
-            .sse,
+            .sse2,
             .vzeroupper,
             .x87,
         }),
     };
-    pub const athlon_fx = CpuModel{
-        .name = "athlon_fx",
-        .llvm_name = "athlon-fx",
+    pub const athlon64_sse3 = CpuModel{
+        .name = "athlon64_sse3",
+        .llvm_name = "athlon64-sse3",
         .features = featureSet(&[_]Feature{
             .@"3dnowa",
             .@"64bit",
             .cmov,
-            .cx8,
+            .cx16,
             .fast_scalar_shift_masks,
             .fxsr,
             .nopl,
             .slow_shld,
             .slow_unaligned_mem_16,
-            .sse2,
+            .sse3,
             .vzeroupper,
             .x87,
         }),
     };
-    pub const athlon_mp = CpuModel{
-        .name = "athlon_mp",
-        .llvm_name = "athlon-mp",
+    pub const athlon_4 = CpuModel{
+        .name = "athlon_4",
+        .llvm_name = "athlon-4",
         .features = featureSet(&[_]Feature{
             .@"3dnowa",
             .cmov,
@@ -1009,23 +1140,27 @@ pub const cpu = struct {
             .x87,
         }),
     };
-    pub const athlon_tbird = CpuModel{
-        .name = "athlon_tbird",
-        .llvm_name = "athlon-tbird",
+    pub const athlon_fx = CpuModel{
+        .name = "athlon_fx",
+        .llvm_name = "athlon-fx",
         .features = featureSet(&[_]Feature{
             .@"3dnowa",
+            .@"64bit",
             .cmov,
             .cx8,
+            .fast_scalar_shift_masks,
+            .fxsr,
             .nopl,
             .slow_shld,
             .slow_unaligned_mem_16,
+            .sse2,
             .vzeroupper,
             .x87,
         }),
     };
-    pub const athlon_xp = CpuModel{
-        .name = "athlon_xp",
-        .llvm_name = "athlon-xp",
+    pub const athlon_mp = CpuModel{
+        .name = "athlon_mp",
+        .llvm_name = "athlon-mp",
         .features = featureSet(&[_]Feature{
             .@"3dnowa",
             .cmov,
@@ -1039,39 +1174,32 @@ pub const cpu = struct {
             .x87,
         }),
     };
-    pub const athlon64 = CpuModel{
-        .name = "athlon64",
-        .llvm_name = "athlon64",
+    pub const athlon_tbird = CpuModel{
+        .name = "athlon_tbird",
+        .llvm_name = "athlon-tbird",
         .features = featureSet(&[_]Feature{
             .@"3dnowa",
-            .@"64bit",
             .cmov,
             .cx8,
-            .fast_scalar_shift_masks,
-            .fxsr,
             .nopl,
             .slow_shld,
             .slow_unaligned_mem_16,
-            .sse2,
             .vzeroupper,
             .x87,
         }),
     };
-    pub const athlon64_sse3 = CpuModel{
-        .name = "athlon64_sse3",
-        .llvm_name = "athlon64-sse3",
+    pub const athlon_xp = CpuModel{
+        .name = "athlon_xp",
+        .llvm_name = "athlon-xp",
         .features = featureSet(&[_]Feature{
             .@"3dnowa",
-            .@"64bit",
             .cmov,
-            .cx16,
             .cx8,
-            .fast_scalar_shift_masks,
             .fxsr,
             .nopl,
             .slow_shld,
             .slow_unaligned_mem_16,
-            .sse3,
+            .sse,
             .vzeroupper,
             .x87,
         }),
@@ -1083,7 +1211,6 @@ pub const cpu = struct {
             .@"64bit",
             .cmov,
             .cx16,
-            .cx8,
             .fxsr,
             .idivl_to_divb,
             .idivq_to_divl,
@@ -1109,7 +1236,6 @@ pub const cpu = struct {
             .@"64bit",
             .cmov,
             .cx16,
-            .cx8,
             .fast_scalar_shift_masks,
             .fxsr,
             .lzcnt,
@@ -1132,7 +1258,6 @@ pub const cpu = struct {
             .branchfusion,
             .cmov,
             .cx16,
-            .cx8,
             .fast_11bytenop,
             .fast_scalar_shift_masks,
             .fxsr,
@@ -1161,7 +1286,6 @@ pub const cpu = struct {
             .branchfusion,
             .cmov,
             .cx16,
-            .cx8,
             .f16c,
             .fast_11bytenop,
             .fast_bextr,
@@ -1194,7 +1318,6 @@ pub const cpu = struct {
             .branchfusion,
             .cmov,
             .cx16,
-            .cx8,
             .f16c,
             .fast_11bytenop,
             .fast_bextr,
@@ -1215,7 +1338,6 @@ pub const cpu = struct {
             .vzeroupper,
             .x87,
             .xop,
-            .xsave,
             .xsaveopt,
         }),
     };
@@ -1231,7 +1353,6 @@ pub const cpu = struct {
             .branchfusion,
             .cmov,
             .cx16,
-            .cx8,
             .f16c,
             .fast_11bytenop,
             .fast_bextr,
@@ -1255,7 +1376,6 @@ pub const cpu = struct {
             .vzeroupper,
             .x87,
             .xop,
-            .xsave,
             .xsaveopt,
         }),
     };
@@ -1266,7 +1386,6 @@ pub const cpu = struct {
             .@"64bit",
             .cmov,
             .cx16,
-            .cx8,
             .fxsr,
             .idivl_to_divb,
             .idivq_to_divl,
@@ -1290,13 +1409,11 @@ pub const cpu = struct {
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
-            .avx,
             .avx2,
             .bmi,
             .bmi2,
             .cmov,
             .cx16,
-            .cx8,
             .ermsb,
             .f16c,
             .false_deps_lzcnt_tzcnt,
@@ -1312,7 +1429,6 @@ pub const cpu = struct {
             .invpcid,
             .lzcnt,
             .macrofusion,
-            .merge_to_threeway_branch,
             .mmx,
             .movbe,
             .nopl,
@@ -1323,10 +1439,8 @@ pub const cpu = struct {
             .rdseed,
             .sahf,
             .slow_3ops_lea,
-            .sse4_2,
             .vzeroupper,
             .x87,
-            .xsave,
             .xsaveopt,
         }),
     };
@@ -1337,7 +1451,6 @@ pub const cpu = struct {
             .@"64bit",
             .cmov,
             .cx16,
-            .cx8,
             .fast_15bytenop,
             .fast_scalar_shift_masks,
             .fast_vector_shift_masks,
@@ -1361,11 +1474,9 @@ pub const cpu = struct {
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .aes,
-            .avx,
             .bmi,
             .cmov,
             .cx16,
-            .cx8,
             .f16c,
             .fast_15bytenop,
             .fast_bextr,
@@ -1384,9 +1495,7 @@ pub const cpu = struct {
             .sahf,
             .slow_shld,
             .sse4a,
-            .ssse3,
             .x87,
-            .xsave,
             .xsaveopt,
         }),
     };
@@ -1421,12 +1530,8 @@ pub const cpu = struct {
             .@"64bit",
             .adx,
             .aes,
-            .avx,
-            .avx2,
-            .avx512bw,
             .avx512cd,
             .avx512dq,
-            .avx512f,
             .avx512ifma,
             .avx512vbmi,
             .avx512vl,
@@ -1435,23 +1540,19 @@ pub const cpu = struct {
             .clflushopt,
             .cmov,
             .cx16,
-            .cx8,
             .ermsb,
-            .f16c,
             .fast_15bytenop,
             .fast_gather,
             .fast_scalar_fsqrt,
             .fast_shld_rotate,
             .fast_variable_shuffle,
             .fast_vector_fsqrt,
-            .fma,
             .fsgsbase,
             .fxsr,
             .idivq_to_divl,
             .invpcid,
             .lzcnt,
             .macrofusion,
-            .merge_to_threeway_branch,
             .mmx,
             .movbe,
             .nopl,
@@ -1466,10 +1567,8 @@ pub const cpu = struct {
             .sgx,
             .sha,
             .slow_3ops_lea,
-            .sse4_2,
             .vzeroupper,
             .x87,
-            .xsave,
             .xsavec,
             .xsaveopt,
             .xsaves,
@@ -1482,12 +1581,9 @@ pub const cpu = struct {
             .@"64bit",
             .adx,
             .aes,
-            .avx,
-            .avx2,
             .avx512bw,
             .avx512cd,
             .avx512dq,
-            .avx512f,
             .avx512vl,
             .avx512vnni,
             .bmi,
@@ -1496,9 +1592,7 @@ pub const cpu = struct {
             .clwb,
             .cmov,
             .cx16,
-            .cx8,
             .ermsb,
-            .f16c,
             .false_deps_popcnt,
             .fast_15bytenop,
             .fast_gather,
@@ -1506,14 +1600,12 @@ pub const cpu = struct {
             .fast_shld_rotate,
             .fast_variable_shuffle,
             .fast_vector_fsqrt,
-            .fma,
             .fsgsbase,
             .fxsr,
             .idivq_to_divl,
             .invpcid,
             .lzcnt,
             .macrofusion,
-            .merge_to_threeway_branch,
             .mmx,
             .movbe,
             .nopl,
@@ -1526,10 +1618,8 @@ pub const cpu = struct {
             .rdseed,
             .sahf,
             .slow_3ops_lea,
-            .sse4_2,
             .vzeroupper,
             .x87,
-            .xsave,
             .xsavec,
             .xsaveopt,
             .xsaves,
@@ -1542,13 +1632,9 @@ pub const cpu = struct {
             .@"64bit",
             .adx,
             .aes,
-            .avx,
-            .avx2,
             .avx512bf16,
-            .avx512bw,
             .avx512cd,
             .avx512dq,
-            .avx512f,
             .avx512vl,
             .avx512vnni,
             .bmi,
@@ -1557,9 +1643,7 @@ pub const cpu = struct {
             .clwb,
             .cmov,
             .cx16,
-            .cx8,
             .ermsb,
-            .f16c,
             .false_deps_popcnt,
             .fast_15bytenop,
             .fast_gather,
@@ -1567,14 +1651,12 @@ pub const cpu = struct {
             .fast_shld_rotate,
             .fast_variable_shuffle,
             .fast_vector_fsqrt,
-            .fma,
             .fsgsbase,
             .fxsr,
             .idivq_to_divl,
             .invpcid,
             .lzcnt,
             .macrofusion,
-            .merge_to_threeway_branch,
             .mmx,
             .movbe,
             .nopl,
@@ -1587,47 +1669,29 @@ pub const cpu = struct {
             .rdseed,
             .sahf,
             .slow_3ops_lea,
-            .sse4_2,
             .vzeroupper,
             .x87,
-            .xsave,
             .xsavec,
             .xsaveopt,
             .xsaves,
         }),
     };
-    pub const core_avx_i = CpuModel{
-        .name = "core_avx_i",
-        .llvm_name = "core-avx-i",
+    pub const core2 = CpuModel{
+        .name = "core2",
+        .llvm_name = "core2",
         .features = featureSet(&[_]Feature{
             .@"64bit",
-            .avx,
             .cmov,
             .cx16,
-            .cx8,
-            .f16c,
-            .false_deps_popcnt,
-            .fast_15bytenop,
-            .fast_scalar_fsqrt,
-            .fast_shld_rotate,
-            .fsgsbase,
             .fxsr,
-            .idivq_to_divl,
             .macrofusion,
-            .merge_to_threeway_branch,
             .mmx,
             .nopl,
-            .pclmul,
-            .popcnt,
-            .rdrnd,
             .sahf,
-            .slow_3ops_lea,
-            .slow_unaligned_mem_32,
-            .sse4_2,
+            .slow_unaligned_mem_16,
+            .ssse3,
             .vzeroupper,
             .x87,
-            .xsave,
-            .xsaveopt,
         }),
     };
     pub const core_avx2 = CpuModel{
@@ -1635,13 +1699,11 @@ pub const cpu = struct {
         .llvm_name = "core-avx2",
         .features = featureSet(&[_]Feature{
             .@"64bit",
-            .avx,
             .avx2,
             .bmi,
             .bmi2,
             .cmov,
             .cx16,
-            .cx8,
             .ermsb,
             .f16c,
             .false_deps_lzcnt_tzcnt,
@@ -1657,7 +1719,6 @@ pub const cpu = struct {
             .invpcid,
             .lzcnt,
             .macrofusion,
-            .merge_to_threeway_branch,
             .mmx,
             .movbe,
             .nopl,
@@ -1666,30 +1727,38 @@ pub const cpu = struct {
             .rdrnd,
             .sahf,
             .slow_3ops_lea,
-            .sse4_2,
             .vzeroupper,
             .x87,
-            .xsave,
             .xsaveopt,
         }),
     };
-    pub const core2 = CpuModel{
-        .name = "core2",
-        .llvm_name = "core2",
+    pub const core_avx_i = CpuModel{
+        .name = "core_avx_i",
+        .llvm_name = "core-avx-i",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .cmov,
             .cx16,
-            .cx8,
+            .f16c,
+            .false_deps_popcnt,
+            .fast_15bytenop,
+            .fast_scalar_fsqrt,
+            .fast_shld_rotate,
+            .fsgsbase,
             .fxsr,
+            .idivq_to_divl,
             .macrofusion,
             .mmx,
             .nopl,
+            .pclmul,
+            .popcnt,
+            .rdrnd,
             .sahf,
-            .slow_unaligned_mem_16,
-            .ssse3,
+            .slow_3ops_lea,
+            .slow_unaligned_mem_32,
             .vzeroupper,
             .x87,
+            .xsaveopt,
         }),
     };
     pub const corei7 = CpuModel{
@@ -1699,7 +1768,6 @@ pub const cpu = struct {
             .@"64bit",
             .cmov,
             .cx16,
-            .cx8,
             .fxsr,
             .macrofusion,
             .mmx,
@@ -1719,7 +1787,6 @@ pub const cpu = struct {
             .avx,
             .cmov,
             .cx16,
-            .cx8,
             .false_deps_popcnt,
             .fast_15bytenop,
             .fast_scalar_fsqrt,
@@ -1727,7 +1794,6 @@ pub const cpu = struct {
             .fxsr,
             .idivq_to_divl,
             .macrofusion,
-            .merge_to_threeway_branch,
             .mmx,
             .nopl,
             .pclmul,
@@ -1735,10 +1801,8 @@ pub const cpu = struct {
             .sahf,
             .slow_3ops_lea,
             .slow_unaligned_mem_32,
-            .sse4_2,
             .vzeroupper,
             .x87,
-            .xsave,
             .xsaveopt,
         }),
     };
@@ -1746,8 +1810,12 @@ pub const cpu = struct {
         .name = "generic",
         .llvm_name = "generic",
         .features = featureSet(&[_]Feature{
+            .@"64bit",
             .cx8,
-            .slow_unaligned_mem_16,
+            .idivq_to_divl,
+            .macrofusion,
+            .slow_3ops_lea,
+            .slow_incdec,
             .vzeroupper,
             .x87,
         }),
@@ -1772,7 +1840,6 @@ pub const cpu = struct {
             .clflushopt,
             .cmov,
             .cx16,
-            .cx8,
             .false_deps_popcnt,
             .fsgsbase,
             .fxsr,
@@ -1790,11 +1857,9 @@ pub const cpu = struct {
             .slow_lea,
             .slow_two_mem_ops,
             .sse4_2,
-            .ssse3,
             .use_glm_div_sqrt_costs,
             .vzeroupper,
             .x87,
-            .xsave,
             .xsavec,
             .xsaveopt,
             .xsaves,
@@ -1809,7 +1874,6 @@ pub const cpu = struct {
             .clflushopt,
             .cmov,
             .cx16,
-            .cx8,
             .fsgsbase,
             .fxsr,
             .mmx,
@@ -1829,11 +1893,9 @@ pub const cpu = struct {
             .slow_lea,
             .slow_two_mem_ops,
             .sse4_2,
-            .ssse3,
             .use_glm_div_sqrt_costs,
             .vzeroupper,
             .x87,
-            .xsave,
             .xsavec,
             .xsaveopt,
             .xsaves,
@@ -1844,13 +1906,11 @@ pub const cpu = struct {
         .llvm_name = "haswell",
         .features = featureSet(&[_]Feature{
             .@"64bit",
-            .avx,
             .avx2,
             .bmi,
             .bmi2,
             .cmov,
             .cx16,
-            .cx8,
             .ermsb,
             .f16c,
             .false_deps_lzcnt_tzcnt,
@@ -1866,7 +1926,6 @@ pub const cpu = struct {
             .invpcid,
             .lzcnt,
             .macrofusion,
-            .merge_to_threeway_branch,
             .mmx,
             .movbe,
             .nopl,
@@ -1875,66 +1934,20 @@ pub const cpu = struct {
             .rdrnd,
             .sahf,
             .slow_3ops_lea,
-            .sse4_2,
             .vzeroupper,
             .x87,
-            .xsave,
             .xsaveopt,
         }),
     };
-    pub const _i386 = CpuModel{
-        .name = "_i386",
-        .llvm_name = "i386",
-        .features = featureSet(&[_]Feature{
-            .slow_unaligned_mem_16,
-            .vzeroupper,
-            .x87,
-        }),
-    };
-    pub const _i486 = CpuModel{
-        .name = "_i486",
-        .llvm_name = "i486",
-        .features = featureSet(&[_]Feature{
-            .slow_unaligned_mem_16,
-            .vzeroupper,
-            .x87,
-        }),
-    };
-    pub const _i586 = CpuModel{
-        .name = "_i586",
-        .llvm_name = "i586",
-        .features = featureSet(&[_]Feature{
-            .cx8,
-            .slow_unaligned_mem_16,
-            .vzeroupper,
-            .x87,
-        }),
-    };
-    pub const _i686 = CpuModel{
-        .name = "_i686",
-        .llvm_name = "i686",
-        .features = featureSet(&[_]Feature{
-            .cmov,
-            .cx8,
-            .slow_unaligned_mem_16,
-            .vzeroupper,
-            .x87,
-        }),
-    };
     pub const icelake_client = CpuModel{
         .name = "icelake_client",
         .llvm_name = "icelake-client",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
-            .aes,
-            .avx,
-            .avx2,
             .avx512bitalg,
-            .avx512bw,
             .avx512cd,
             .avx512dq,
-            .avx512f,
             .avx512ifma,
             .avx512vbmi,
             .avx512vbmi2,
@@ -1947,28 +1960,24 @@ pub const cpu = struct {
             .clwb,
             .cmov,
             .cx16,
-            .cx8,
             .ermsb,
-            .f16c,
             .fast_15bytenop,
             .fast_gather,
             .fast_scalar_fsqrt,
             .fast_shld_rotate,
             .fast_variable_shuffle,
             .fast_vector_fsqrt,
-            .fma,
             .fsgsbase,
+            .fsrm,
             .fxsr,
             .gfni,
             .idivq_to_divl,
             .invpcid,
             .lzcnt,
             .macrofusion,
-            .merge_to_threeway_branch,
             .mmx,
             .movbe,
             .nopl,
-            .pclmul,
             .pku,
             .popcnt,
             .prefer_256_bit,
@@ -1980,12 +1989,10 @@ pub const cpu = struct {
             .sgx,
             .sha,
             .slow_3ops_lea,
-            .sse4_2,
             .vaes,
             .vpclmulqdq,
             .vzeroupper,
             .x87,
-            .xsave,
             .xsavec,
             .xsaveopt,
             .xsaves,
@@ -1997,14 +2004,9 @@ pub const cpu = struct {
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
-            .aes,
-            .avx,
-            .avx2,
             .avx512bitalg,
-            .avx512bw,
             .avx512cd,
             .avx512dq,
-            .avx512f,
             .avx512ifma,
             .avx512vbmi,
             .avx512vbmi2,
@@ -2017,28 +2019,24 @@ pub const cpu = struct {
             .clwb,
             .cmov,
             .cx16,
-            .cx8,
             .ermsb,
-            .f16c,
             .fast_15bytenop,
             .fast_gather,
             .fast_scalar_fsqrt,
             .fast_shld_rotate,
             .fast_variable_shuffle,
             .fast_vector_fsqrt,
-            .fma,
             .fsgsbase,
+            .fsrm,
             .fxsr,
             .gfni,
             .idivq_to_divl,
             .invpcid,
             .lzcnt,
             .macrofusion,
-            .merge_to_threeway_branch,
             .mmx,
             .movbe,
             .nopl,
-            .pclmul,
             .pconfig,
             .pku,
             .popcnt,
@@ -2051,13 +2049,11 @@ pub const cpu = struct {
             .sgx,
             .sha,
             .slow_3ops_lea,
-            .sse4_2,
             .vaes,
             .vpclmulqdq,
             .vzeroupper,
             .wbnoinvd,
             .x87,
-            .xsave,
             .xsavec,
             .xsaveopt,
             .xsaves,
@@ -2068,10 +2064,8 @@ pub const cpu = struct {
         .llvm_name = "ivybridge",
         .features = featureSet(&[_]Feature{
             .@"64bit",
-            .avx,
             .cmov,
             .cx16,
-            .cx8,
             .f16c,
             .false_deps_popcnt,
             .fast_15bytenop,
@@ -2081,7 +2075,6 @@ pub const cpu = struct {
             .fxsr,
             .idivq_to_divl,
             .macrofusion,
-            .merge_to_threeway_branch,
             .mmx,
             .nopl,
             .pclmul,
@@ -2090,10 +2083,8 @@ pub const cpu = struct {
             .sahf,
             .slow_3ops_lea,
             .slow_unaligned_mem_32,
-            .sse4_2,
             .vzeroupper,
             .x87,
-            .xsave,
             .xsaveopt,
         }),
     };
@@ -2156,7 +2147,6 @@ pub const cpu = struct {
             .@"64bit",
             .cmov,
             .cx16,
-            .cx8,
             .fast_scalar_shift_masks,
             .fxsr,
             .nopl,
@@ -2176,16 +2166,12 @@ pub const cpu = struct {
             .aes,
             .avx512cd,
             .avx512er,
-            .avx512f,
             .avx512pf,
             .bmi,
             .bmi2,
             .cmov,
             .cx16,
-            .cx8,
-            .f16c,
             .fast_gather,
-            .fma,
             .fsgsbase,
             .fxsr,
             .idivq_to_divl,
@@ -2206,7 +2192,6 @@ pub const cpu = struct {
             .slow_pmaddwd,
             .slow_two_mem_ops,
             .x87,
-            .xsave,
             .xsaveopt,
         }),
     };
@@ -2219,17 +2204,13 @@ pub const cpu = struct {
             .aes,
             .avx512cd,
             .avx512er,
-            .avx512f,
             .avx512pf,
             .avx512vpopcntdq,
             .bmi,
             .bmi2,
             .cmov,
             .cx16,
-            .cx8,
-            .f16c,
             .fast_gather,
-            .fma,
             .fsgsbase,
             .fxsr,
             .idivq_to_divl,
@@ -2250,7 +2231,6 @@ pub const cpu = struct {
             .slow_pmaddwd,
             .slow_two_mem_ops,
             .x87,
-            .xsave,
             .xsaveopt,
         }),
     };
@@ -2258,6 +2238,8 @@ pub const cpu = struct {
         .name = "lakemont",
         .llvm_name = "lakemont",
         .features = featureSet(&[_]Feature{
+            .cx8,
+            .slow_unaligned_mem_16,
             .vzeroupper,
         }),
     };
@@ -2268,7 +2250,6 @@ pub const cpu = struct {
             .@"64bit",
             .cmov,
             .cx16,
-            .cx8,
             .fxsr,
             .macrofusion,
             .mmx,
@@ -2287,7 +2268,6 @@ pub const cpu = struct {
             .@"64bit",
             .cmov,
             .cx16,
-            .cx8,
             .fxsr,
             .mmx,
             .nopl,
@@ -2323,7 +2303,6 @@ pub const cpu = struct {
             .@"64bit",
             .cmov,
             .cx16,
-            .cx8,
             .fast_scalar_shift_masks,
             .fxsr,
             .nopl,
@@ -2341,7 +2320,6 @@ pub const cpu = struct {
             .@"64bit",
             .cmov,
             .cx16,
-            .cx8,
             .fxsr,
             .macrofusion,
             .mmx,
@@ -2363,32 +2341,6 @@ pub const cpu = struct {
             .x87,
         }),
     };
-    pub const pentium_m = CpuModel{
-        .name = "pentium_m",
-        .llvm_name = "pentium-m",
-        .features = featureSet(&[_]Feature{
-            .cmov,
-            .cx8,
-            .fxsr,
-            .mmx,
-            .nopl,
-            .slow_unaligned_mem_16,
-            .sse2,
-            .vzeroupper,
-            .x87,
-        }),
-    };
-    pub const pentium_mmx = CpuModel{
-        .name = "pentium_mmx",
-        .llvm_name = "pentium-mmx",
-        .features = featureSet(&[_]Feature{
-            .cx8,
-            .mmx,
-            .slow_unaligned_mem_16,
-            .vzeroupper,
-            .x87,
-        }),
-    };
     pub const pentium2 = CpuModel{
         .name = "pentium2",
         .llvm_name = "pentium2",
@@ -2463,6 +2415,32 @@ pub const cpu = struct {
             .x87,
         }),
     };
+    pub const pentium_m = CpuModel{
+        .name = "pentium_m",
+        .llvm_name = "pentium-m",
+        .features = featureSet(&[_]Feature{
+            .cmov,
+            .cx8,
+            .fxsr,
+            .mmx,
+            .nopl,
+            .slow_unaligned_mem_16,
+            .sse2,
+            .vzeroupper,
+            .x87,
+        }),
+    };
+    pub const pentium_mmx = CpuModel{
+        .name = "pentium_mmx",
+        .llvm_name = "pentium-mmx",
+        .features = featureSet(&[_]Feature{
+            .cx8,
+            .mmx,
+            .slow_unaligned_mem_16,
+            .vzeroupper,
+            .x87,
+        }),
+    };
     pub const pentiumpro = CpuModel{
         .name = "pentiumpro",
         .llvm_name = "pentiumpro",
@@ -2498,7 +2476,6 @@ pub const cpu = struct {
             .avx,
             .cmov,
             .cx16,
-            .cx8,
             .false_deps_popcnt,
             .fast_15bytenop,
             .fast_scalar_fsqrt,
@@ -2506,7 +2483,6 @@ pub const cpu = struct {
             .fxsr,
             .idivq_to_divl,
             .macrofusion,
-            .merge_to_threeway_branch,
             .mmx,
             .nopl,
             .pclmul,
@@ -2514,13 +2490,87 @@ pub const cpu = struct {
             .sahf,
             .slow_3ops_lea,
             .slow_unaligned_mem_32,
-            .sse4_2,
             .vzeroupper,
             .x87,
-            .xsave,
             .xsaveopt,
         }),
     };
+    pub const sapphirerapids = CpuModel{
+        .name = "sapphirerapids",
+        .llvm_name = "sapphirerapids",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .adx,
+            .amx_bf16,
+            .amx_int8,
+            .avx512bf16,
+            .avx512bitalg,
+            .avx512cd,
+            .avx512dq,
+            .avx512ifma,
+            .avx512vbmi,
+            .avx512vbmi2,
+            .avx512vl,
+            .avx512vnni,
+            .avx512vp2intersect,
+            .avx512vpopcntdq,
+            .avxvnni,
+            .bmi,
+            .bmi2,
+            .cldemote,
+            .clflushopt,
+            .clwb,
+            .cmov,
+            .cx16,
+            .enqcmd,
+            .ermsb,
+            .fast_15bytenop,
+            .fast_gather,
+            .fast_scalar_fsqrt,
+            .fast_shld_rotate,
+            .fast_variable_shuffle,
+            .fast_vector_fsqrt,
+            .fsgsbase,
+            .fsrm,
+            .fxsr,
+            .gfni,
+            .idivq_to_divl,
+            .invpcid,
+            .lzcnt,
+            .macrofusion,
+            .mmx,
+            .movbe,
+            .movdir64b,
+            .movdiri,
+            .nopl,
+            .pconfig,
+            .pku,
+            .popcnt,
+            .prefer_256_bit,
+            .prfchw,
+            .ptwrite,
+            .rdpid,
+            .rdrnd,
+            .rdseed,
+            .sahf,
+            .serialize,
+            .sgx,
+            .sha,
+            .shstk,
+            .slow_3ops_lea,
+            .tsxldtrk,
+            .uintr,
+            .vaes,
+            .vpclmulqdq,
+            .vzeroupper,
+            .waitpkg,
+            .wbnoinvd,
+            .x87,
+            .xsavec,
+            .xsaveopt,
+            .xsaves,
+        }),
+    };
     pub const silvermont = CpuModel{
         .name = "silvermont",
         .llvm_name = "silvermont",
@@ -2528,7 +2578,6 @@ pub const cpu = struct {
             .@"64bit",
             .cmov,
             .cx16,
-            .cx8,
             .false_deps_popcnt,
             .fast_7bytenop,
             .fxsr,
@@ -2546,7 +2595,6 @@ pub const cpu = struct {
             .slow_pmulld,
             .slow_two_mem_ops,
             .sse4_2,
-            .ssse3,
             .vzeroupper,
             .x87,
         }),
@@ -2558,12 +2606,9 @@ pub const cpu = struct {
             .@"64bit",
             .adx,
             .aes,
-            .avx,
-            .avx2,
             .avx512bw,
             .avx512cd,
             .avx512dq,
-            .avx512f,
             .avx512vl,
             .bmi,
             .bmi2,
@@ -2571,9 +2616,7 @@ pub const cpu = struct {
             .clwb,
             .cmov,
             .cx16,
-            .cx8,
             .ermsb,
-            .f16c,
             .false_deps_popcnt,
             .fast_15bytenop,
             .fast_gather,
@@ -2581,14 +2624,12 @@ pub const cpu = struct {
             .fast_shld_rotate,
             .fast_variable_shuffle,
             .fast_vector_fsqrt,
-            .fma,
             .fsgsbase,
             .fxsr,
             .idivq_to_divl,
             .invpcid,
             .lzcnt,
             .macrofusion,
-            .merge_to_threeway_branch,
             .mmx,
             .movbe,
             .nopl,
@@ -2601,10 +2642,8 @@ pub const cpu = struct {
             .rdseed,
             .sahf,
             .slow_3ops_lea,
-            .sse4_2,
             .vzeroupper,
             .x87,
-            .xsave,
             .xsavec,
             .xsaveopt,
             .xsaves,
@@ -2617,14 +2656,12 @@ pub const cpu = struct {
             .@"64bit",
             .adx,
             .aes,
-            .avx,
             .avx2,
             .bmi,
             .bmi2,
             .clflushopt,
             .cmov,
             .cx16,
-            .cx8,
             .ermsb,
             .f16c,
             .false_deps_popcnt,
@@ -2641,7 +2678,6 @@ pub const cpu = struct {
             .invpcid,
             .lzcnt,
             .macrofusion,
-            .merge_to_threeway_branch,
             .mmx,
             .movbe,
             .nopl,
@@ -2653,10 +2689,8 @@ pub const cpu = struct {
             .sahf,
             .sgx,
             .slow_3ops_lea,
-            .sse4_2,
             .vzeroupper,
             .x87,
-            .xsave,
             .xsavec,
             .xsaveopt,
             .xsaves,
@@ -2669,12 +2703,9 @@ pub const cpu = struct {
             .@"64bit",
             .adx,
             .aes,
-            .avx,
-            .avx2,
             .avx512bw,
             .avx512cd,
             .avx512dq,
-            .avx512f,
             .avx512vl,
             .bmi,
             .bmi2,
@@ -2682,9 +2713,7 @@ pub const cpu = struct {
             .clwb,
             .cmov,
             .cx16,
-            .cx8,
             .ermsb,
-            .f16c,
             .false_deps_popcnt,
             .fast_15bytenop,
             .fast_gather,
@@ -2692,14 +2721,12 @@ pub const cpu = struct {
             .fast_shld_rotate,
             .fast_variable_shuffle,
             .fast_vector_fsqrt,
-            .fma,
             .fsgsbase,
             .fxsr,
             .idivq_to_divl,
             .invpcid,
             .lzcnt,
             .macrofusion,
-            .merge_to_threeway_branch,
             .mmx,
             .movbe,
             .nopl,
@@ -2712,10 +2739,8 @@ pub const cpu = struct {
             .rdseed,
             .sahf,
             .slow_3ops_lea,
-            .sse4_2,
             .vzeroupper,
             .x87,
-            .xsave,
             .xsavec,
             .xsaveopt,
             .xsaves,
@@ -2728,7 +2753,6 @@ pub const cpu = struct {
             .@"64bit",
             .cmov,
             .cx16,
-            .cx8,
             .false_deps_popcnt,
             .fast_7bytenop,
             .fxsr,
@@ -2746,7 +2770,6 @@ pub const cpu = struct {
             .slow_pmulld,
             .slow_two_mem_ops,
             .sse4_2,
-            .ssse3,
             .vzeroupper,
             .x87,
         }),
@@ -2757,14 +2780,9 @@ pub const cpu = struct {
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
-            .aes,
-            .avx,
-            .avx2,
             .avx512bitalg,
-            .avx512bw,
             .avx512cd,
             .avx512dq,
-            .avx512f,
             .avx512ifma,
             .avx512vbmi,
             .avx512vbmi2,
@@ -2778,30 +2796,26 @@ pub const cpu = struct {
             .clwb,
             .cmov,
             .cx16,
-            .cx8,
             .ermsb,
-            .f16c,
             .fast_15bytenop,
             .fast_gather,
             .fast_scalar_fsqrt,
             .fast_shld_rotate,
             .fast_variable_shuffle,
             .fast_vector_fsqrt,
-            .fma,
             .fsgsbase,
+            .fsrm,
             .fxsr,
             .gfni,
             .idivq_to_divl,
             .invpcid,
             .lzcnt,
             .macrofusion,
-            .merge_to_threeway_branch,
             .mmx,
             .movbe,
             .movdir64b,
             .movdiri,
             .nopl,
-            .pclmul,
             .pku,
             .popcnt,
             .prefer_256_bit,
@@ -2814,12 +2828,10 @@ pub const cpu = struct {
             .sha,
             .shstk,
             .slow_3ops_lea,
-            .sse4_2,
             .vaes,
             .vpclmulqdq,
             .vzeroupper,
             .x87,
-            .xsave,
             .xsavec,
             .xsaveopt,
             .xsaves,
@@ -2835,7 +2847,6 @@ pub const cpu = struct {
             .clwb,
             .cmov,
             .cx16,
-            .cx8,
             .fsgsbase,
             .fxsr,
             .gfni,
@@ -2856,11 +2867,9 @@ pub const cpu = struct {
             .slow_lea,
             .slow_two_mem_ops,
             .sse4_2,
-            .ssse3,
             .use_glm_div_sqrt_costs,
             .vzeroupper,
             .x87,
-            .xsave,
             .xsavec,
             .xsaveopt,
             .xsaves,
@@ -2873,7 +2882,6 @@ pub const cpu = struct {
             .@"64bit",
             .cmov,
             .cx16,
-            .cx8,
             .fxsr,
             .macrofusion,
             .mmx,
@@ -2886,21 +2894,21 @@ pub const cpu = struct {
             .x87,
         }),
     };
-    pub const winchip_c6 = CpuModel{
-        .name = "winchip_c6",
-        .llvm_name = "winchip-c6",
+    pub const winchip2 = CpuModel{
+        .name = "winchip2",
+        .llvm_name = "winchip2",
         .features = featureSet(&[_]Feature{
-            .mmx,
+            .@"3dnow",
             .slow_unaligned_mem_16,
             .vzeroupper,
             .x87,
         }),
     };
-    pub const winchip2 = CpuModel{
-        .name = "winchip2",
-        .llvm_name = "winchip2",
+    pub const winchip_c6 = CpuModel{
+        .name = "winchip_c6",
+        .llvm_name = "winchip-c6",
         .features = featureSet(&[_]Feature{
-            .@"3dnow",
+            .mmx,
             .slow_unaligned_mem_16,
             .vzeroupper,
             .x87,
@@ -2925,6 +2933,100 @@ pub const cpu = struct {
             .x87,
         }),
     };
+    pub const x86_64_v2 = CpuModel{
+        .name = "x86_64_v2",
+        .llvm_name = "x86-64-v2",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .cmov,
+            .cx16,
+            .false_deps_popcnt,
+            .fast_15bytenop,
+            .fast_scalar_fsqrt,
+            .fast_shld_rotate,
+            .fxsr,
+            .idivq_to_divl,
+            .macrofusion,
+            .mmx,
+            .nopl,
+            .popcnt,
+            .sahf,
+            .slow_3ops_lea,
+            .slow_unaligned_mem_32,
+            .sse4_2,
+            .vzeroupper,
+            .x87,
+        }),
+    };
+    pub const x86_64_v3 = CpuModel{
+        .name = "x86_64_v3",
+        .llvm_name = "x86-64-v3",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .avx2,
+            .bmi,
+            .bmi2,
+            .cmov,
+            .cx16,
+            .f16c,
+            .false_deps_lzcnt_tzcnt,
+            .false_deps_popcnt,
+            .fast_15bytenop,
+            .fast_scalar_fsqrt,
+            .fast_shld_rotate,
+            .fast_variable_shuffle,
+            .fma,
+            .fxsr,
+            .idivq_to_divl,
+            .lzcnt,
+            .macrofusion,
+            .mmx,
+            .movbe,
+            .nopl,
+            .popcnt,
+            .sahf,
+            .slow_3ops_lea,
+            .vzeroupper,
+            .x87,
+            .xsave,
+        }),
+    };
+    pub const x86_64_v4 = CpuModel{
+        .name = "x86_64_v4",
+        .llvm_name = "x86-64-v4",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .avx512bw,
+            .avx512cd,
+            .avx512dq,
+            .avx512vl,
+            .bmi,
+            .bmi2,
+            .cmov,
+            .cx16,
+            .false_deps_popcnt,
+            .fast_15bytenop,
+            .fast_gather,
+            .fast_scalar_fsqrt,
+            .fast_shld_rotate,
+            .fast_variable_shuffle,
+            .fast_vector_fsqrt,
+            .fxsr,
+            .idivq_to_divl,
+            .lzcnt,
+            .macrofusion,
+            .mmx,
+            .movbe,
+            .nopl,
+            .popcnt,
+            .prefer_256_bit,
+            .sahf,
+            .slow_3ops_lea,
+            .vzeroupper,
+            .x87,
+            .xsave,
+        }),
+    };
     pub const yonah = CpuModel{
         .name = "yonah",
         .llvm_name = "yonah",
@@ -2979,7 +3081,6 @@ pub const cpu = struct {
             .sse4a,
             .vzeroupper,
             .x87,
-            .xsave,
             .xsavec,
             .xsaveopt,
             .xsaves,
@@ -3027,7 +3128,56 @@ pub const cpu = struct {
             .vzeroupper,
             .wbnoinvd,
             .x87,
-            .xsave,
+            .xsavec,
+            .xsaveopt,
+            .xsaves,
+        }),
+    };
+    pub const znver3 = CpuModel{
+        .name = "znver3",
+        .llvm_name = "znver3",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .adx,
+            .avx2,
+            .bmi,
+            .bmi2,
+            .branchfusion,
+            .clflushopt,
+            .clwb,
+            .clzero,
+            .cmov,
+            .cx16,
+            .f16c,
+            .fast_15bytenop,
+            .fast_bextr,
+            .fast_lzcnt,
+            .fast_scalar_shift_masks,
+            .fma,
+            .fsgsbase,
+            .fsrm,
+            .fxsr,
+            .invpcid,
+            .lzcnt,
+            .mmx,
+            .movbe,
+            .mwaitx,
+            .nopl,
+            .pku,
+            .popcnt,
+            .prfchw,
+            .rdpid,
+            .rdrnd,
+            .rdseed,
+            .sahf,
+            .sha,
+            .slow_shld,
+            .sse4a,
+            .vaes,
+            .vpclmulqdq,
+            .vzeroupper,
+            .wbnoinvd,
+            .x87,
             .xsavec,
             .xsaveopt,
             .xsaves,
diff --git a/lib/std/zig/cross_target.zig b/lib/std/zig/cross_target.zig
index c34dcc2bd3..8d6f63f5e3 100644
--- a/lib/std/zig/cross_target.zig
+++ b/lib/std/zig/cross_target.zig
@@ -111,11 +111,11 @@ pub const CrossTarget = struct {
             .kfreebsd,
             .lv2,
             .solaris,
+            .zos,
             .haiku,
             .minix,
             .rtems,
             .nacl,
-            .cnk,
             .aix,
             .cuda,
             .nvcl,
@@ -714,11 +714,11 @@ pub const CrossTarget = struct {
             .kfreebsd,
             .lv2,
             .solaris,
+            .zos,
             .haiku,
             .minix,
             .rtems,
             .nacl,
-            .cnk,
             .aix,
             .cuda,
             .nvcl,
diff --git a/lib/std/zig/system.zig b/lib/std/zig/system.zig
index 2d9f286dd6..485bd479bf 100644
--- a/lib/std/zig/system.zig
+++ b/lib/std/zig/system.zig
@@ -326,11 +326,33 @@ pub const NativeTargetInfo = struct {
             cpu_detection_unimplemented = true;
             break :backup_cpu_detection Target.Cpu.baseline(cpu_arch);
         };
-        cross_target.updateCpuFeatures(&cpu.features);
-
-        var target = try detectAbiAndDynamicLinker(allocator, cpu, os, cross_target);
-        target.cpu_detection_unimplemented = cpu_detection_unimplemented;
-        return target;
+        var result = try detectAbiAndDynamicLinker(allocator, cpu, os, cross_target);
+        // For x86, we need to populate some CPU feature flags depending on architecture
+        // and mode:
+        //  * 16bit_mode => if the abi is code16
+        //  * 32bit_mode => if the arch is i386
+        // However, the "mode" flags can be used as overrides, so if the user explicitly
+        // sets one of them, that takes precedence.
+        switch (cpu_arch) {
+            .i386 => {
+                if (!std.Target.x86.featureSetHasAny(cross_target.cpu_features_add, .{
+                    .@"16bit_mode", .@"32bit_mode",
+                })) {
+                    switch (result.target.abi) {
+                        .code16 => result.target.cpu.features.addFeature(
+                            @enumToInt(std.Target.x86.Feature.@"16bit_mode"),
+                        ),
+                        else => result.target.cpu.features.addFeature(
+                            @enumToInt(std.Target.x86.Feature.@"32bit_mode"),
+                        ),
+                    }
+                }
+            },
+            else => {},
+        }
+        cross_target.updateCpuFeatures(&result.target.cpu.features);
+        result.cpu_detection_unimplemented = cpu_detection_unimplemented;
+        return result;
     }
 
     /// First we attempt to use the executable's own binary. If it is dynamically
diff --git a/lib/std/zig/system/x86.zig b/lib/std/zig/system/x86.zig
index bda9a17c95..0b645ae8e3 100644
--- a/lib/std/zig/system/x86.zig
+++ b/lib/std/zig/system/x86.zig
@@ -311,6 +311,10 @@ fn detectAMDProcessor(cpu: *Target.Cpu, family: u32, model: u32) void {
             }
             return;
         },
+        25 => {
+            cpu.model = &Target.x86.cpu.znver3;
+            return;
+        },
         else => {
             return;
         },