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authorTimon Kruiper <timonkruiper@gmail.com>2021-01-08 19:28:34 +0100
committerTimon Kruiper <timonkruiper@gmail.com>2021-01-08 19:30:52 +0100
commit56c059077cdaf71220cb44f06902051a34ffd31d (patch)
tree6caa61bd74fdb294c293e025f9f76ae3580aac79 /lib/std/thread.zig
parent3715ed7b54d4382a4495eb041ff3f9ad987bacfb (diff)
downloadzig-56c059077cdaf71220cb44f06902051a34ffd31d.tar.gz
zig-56c059077cdaf71220cb44f06902051a34ffd31d.zip
stage2: add initial impl of control flow in LLVM backend
The following TZIR instrutions have been implemented in the backend: - all cmp operators (lt, lte, gt, gte, eq, neq) - block - br - condbr The following LLVMIR is generated for a simple assert function: ``` define void @assert(i1 %0) { Entry: %1 = alloca i1, align 1 store i1 %0, i1* %1, align 1 %2 = load i1, i1* %1, align 1 %3 = xor i1 %2, true br i1 %3, label %Then, label %Else Then: ; preds = %Entry call void @llvm.debugtrap() unreachable Else: ; preds = %Entry br label %Block Block: ; preds = %Else ret void } ``` See tests for more examples.
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