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| author | Jakub Konka <kubkon@jakubkonka.com> | 2020-12-16 12:39:30 +0100 |
|---|---|---|
| committer | Jakub Konka <kubkon@jakubkonka.com> | 2020-12-16 18:13:52 +0100 |
| commit | 6f3ed2f71f3548b399214f604d820cd2dd2887f3 (patch) | |
| tree | 3d3e25dd7e53bb40f25fb25769e18c2ec3d1d6c8 /lib/std/target/powerpc.zig | |
| parent | 38bf94280bb9735a005673d3eae132f75795b854 (diff) | |
| download | zig-6f3ed2f71f3548b399214f604d820cd2dd2887f3.tar.gz zig-6f3ed2f71f3548b399214f604d820cd2dd2887f3.zip | |
Update target details
llvm commit b2851aea80e5a8f0cfd6c3c5a56a6b00fb28c6b6
zig-llvm-target-details-generator commit
4299674ecabeb668b0d84285cd1b41a652a391b1
Diffstat (limited to 'lib/std/target/powerpc.zig')
| -rw-r--r-- | lib/std/target/powerpc.zig | 128 |
1 files changed, 66 insertions, 62 deletions
diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig index 0ec02b18a3..2cd66a1b63 100644 --- a/lib/std/target/powerpc.zig +++ b/lib/std/target/powerpc.zig @@ -32,6 +32,7 @@ pub const Feature = enum { fsqrt, fuse_addi_load, fuse_addis_load, + fuse_store, fusion, hard_float, htm, @@ -44,7 +45,9 @@ pub const Feature = enum { lfiwax, longcall, mfocrf, + mma, msync, + paired_vector_memops, partword_atomics, pcrelative_memops, popcntd, @@ -59,7 +62,6 @@ pub const Feature = enum { ppc6xx, predictable_select_expensive, prefix_instrs, - qpx, recipprec, secure_plt, slow_popcntd, @@ -73,6 +75,7 @@ pub const Feature = enum { pub usingnamespace CpuFeature.feature_set_fns(Feature); pub const all_features = blk: { + @setEvalBranchQuota(10000); const len = @typeInfo(Feature).Enum.fields.len; std.debug.assert(len <= CpuFeature.Set.needed_bit_count); var result: [len]CpuFeature = undefined; @@ -228,6 +231,13 @@ pub const all_features = blk: { .fusion, }), }; + result[@enumToInt(Feature.fuse_store)] = .{ + .llvm_name = "fuse-store", + .description = "Target supports store clustering", + .dependencies = featureSet(&[_]Feature{ + .fusion, + }), + }; result[@enumToInt(Feature.fusion)] = .{ .llvm_name = "fusion", .description = "Target supports instruction fusion", @@ -292,6 +302,15 @@ pub const all_features = blk: { .description = "Enable the MFOCRF instruction", .dependencies = featureSet(&[_]Feature{}), }; + result[@enumToInt(Feature.mma)] = .{ + .llvm_name = "mma", + .description = "Enable MMA instructions", + .dependencies = featureSet(&[_]Feature{ + .paired_vector_memops, + .power8_vector, + .power9_altivec, + }), + }; result[@enumToInt(Feature.msync)] = .{ .llvm_name = "msync", .description = "Has only the msync instruction instead of sync", @@ -299,6 +318,13 @@ pub const all_features = blk: { .booke, }), }; + result[@enumToInt(Feature.paired_vector_memops)] = .{ + .llvm_name = "paired-vector-memops", + .description = "32Byte load and store instructions", + .dependencies = featureSet(&[_]Feature{ + .isa_v30_instructions, + }), + }; result[@enumToInt(Feature.partword_atomics)] = .{ .llvm_name = "partword-atomics", .description = "Enable l[bh]arx and st[bh]cx.", @@ -309,6 +335,7 @@ pub const all_features = blk: { .description = "Enable PC relative Memory Ops", .dependencies = featureSet(&[_]Feature{ .isa_v30_instructions, + .prefix_instrs, }), }; result[@enumToInt(Feature.popcntd)] = .{ @@ -390,13 +417,6 @@ pub const all_features = blk: { .power9_altivec, }), }; - result[@enumToInt(Feature.qpx)] = .{ - .llvm_name = "qpx", - .description = "Enable QPX instructions", - .dependencies = featureSet(&[_]Feature{ - .fpu, - }), - }; result[@enumToInt(Feature.recipprec)] = .{ .llvm_name = "recipprec", .description = "Assume higher precision reciprocal estimates", @@ -452,8 +472,8 @@ pub const all_features = blk: { }; pub const cpu = struct { - pub const @"ppc440" = CpuModel{ - .name = "ppc440", + pub const @"440" = CpuModel{ + .name = "440", .llvm_name = "440", .features = featureSet(&[_]Feature{ .booke, @@ -464,8 +484,8 @@ pub const cpu = struct { .msync, }), }; - pub const @"ppc450" = CpuModel{ - .name = "ppc450", + pub const @"450" = CpuModel{ + .name = "450", .llvm_name = "450", .features = featureSet(&[_]Feature{ .booke, @@ -476,70 +496,70 @@ pub const cpu = struct { .msync, }), }; - pub const @"ppc601" = CpuModel{ - .name = "ppc601", + pub const @"601" = CpuModel{ + .name = "601", .llvm_name = "601", .features = featureSet(&[_]Feature{ .fpu, }), }; - pub const @"ppc602" = CpuModel{ - .name = "ppc602", + pub const @"602" = CpuModel{ + .name = "602", .llvm_name = "602", .features = featureSet(&[_]Feature{ .fpu, }), }; - pub const @"ppc603" = CpuModel{ - .name = "ppc603", + pub const @"603" = CpuModel{ + .name = "603", .llvm_name = "603", .features = featureSet(&[_]Feature{ .fres, .frsqrte, }), }; - pub const @"ppc603e" = CpuModel{ - .name = "ppc603e", + pub const @"603e" = CpuModel{ + .name = "603e", .llvm_name = "603e", .features = featureSet(&[_]Feature{ .fres, .frsqrte, }), }; - pub const @"ppc603ev" = CpuModel{ - .name = "ppc603ev", + pub const @"603ev" = CpuModel{ + .name = "603ev", .llvm_name = "603ev", .features = featureSet(&[_]Feature{ .fres, .frsqrte, }), }; - pub const @"ppc604" = CpuModel{ - .name = "ppc604", + pub const @"604" = CpuModel{ + .name = "604", .llvm_name = "604", .features = featureSet(&[_]Feature{ .fres, .frsqrte, }), }; - pub const @"ppc604e" = CpuModel{ - .name = "ppc604e", + pub const @"604e" = CpuModel{ + .name = "604e", .llvm_name = "604e", .features = featureSet(&[_]Feature{ .fres, .frsqrte, }), }; - pub const @"ppc620" = CpuModel{ - .name = "ppc620", + pub const @"620" = CpuModel{ + .name = "620", .llvm_name = "620", .features = featureSet(&[_]Feature{ .fres, .frsqrte, }), }; - pub const @"ppc7400" = CpuModel{ - .name = "ppc7400", + pub const @"7400" = CpuModel{ + .name = "7400", .llvm_name = "7400", .features = featureSet(&[_]Feature{ .altivec, @@ -547,8 +567,8 @@ pub const cpu = struct { .frsqrte, }), }; - pub const @"ppc7450" = CpuModel{ - .name = "ppc7450", + pub const @"7450" = CpuModel{ + .name = "7450", .llvm_name = "7450", .features = featureSet(&[_]Feature{ .altivec, @@ -556,16 +576,16 @@ pub const cpu = struct { .frsqrte, }), }; - pub const @"ppc750" = CpuModel{ - .name = "ppc750", + pub const @"750" = CpuModel{ + .name = "750", .llvm_name = "750", .features = featureSet(&[_]Feature{ .fres, .frsqrte, }), }; - pub const @"ppc970" = CpuModel{ - .name = "ppc970", + pub const @"970" = CpuModel{ + .name = "970", .llvm_name = "970", .features = featureSet(&[_]Feature{ .@"64bit", @@ -602,32 +622,6 @@ pub const cpu = struct { .stfiwx, }), }; - pub const a2q = CpuModel{ - .name = "a2q", - .llvm_name = "a2q", - .features = featureSet(&[_]Feature{ - .@"64bit", - .booke, - .cmpb, - .fcpsgn, - .fpcvt, - .fprnd, - .fre, - .fres, - .frsqrte, - .frsqrtes, - .fsqrt, - .icbt, - .isel, - .ldbrx, - .lfiwax, - .mfocrf, - .qpx, - .recipprec, - .slow_popcntd, - .stfiwx, - }), - }; pub const e500 = CpuModel{ .name = "e500", .llvm_name = "e500", @@ -681,6 +675,7 @@ pub const cpu = struct { .frsqrte, .frsqrtes, .fsqrt, + .fuse_store, .htm, .icbt, .isa_v30_instructions, @@ -689,6 +684,8 @@ pub const cpu = struct { .ldbrx, .lfiwax, .mfocrf, + .mma, + .paired_vector_memops, .partword_atomics, .pcrelative_memops, .popcntd, @@ -697,6 +694,8 @@ pub const cpu = struct { .power8_vector, .power9_altivec, .power9_vector, + .ppc_postra_sched, + .ppc_prera_sched, .predictable_select_expensive, .prefix_instrs, .recipprec, @@ -837,6 +836,7 @@ pub const cpu = struct { .frsqrte, .frsqrtes, .fsqrt, + .fuse_store, .htm, .icbt, .isa_v30_instructions, @@ -845,6 +845,8 @@ pub const cpu = struct { .ldbrx, .lfiwax, .mfocrf, + .mma, + .paired_vector_memops, .partword_atomics, .pcrelative_memops, .popcntd, @@ -853,6 +855,8 @@ pub const cpu = struct { .power8_vector, .power9_altivec, .power9_vector, + .ppc_postra_sched, + .ppc_prera_sched, .predictable_select_expensive, .prefix_instrs, .recipprec, |
