Merge pull request #5527 from shawnanastasio/ppc64le

Implement support for powerpc64{,le}

1 files changed, 10 insertions, 3 deletions

diff --git a/lib/std/os/linux/tls.zig b/lib/std/os/linux/tls.zig
index b10dae14d7..0330a4e410 100644
--- a/lib/std/os/linux/tls.zig
+++ b/lib/std/os/linux/tls.zig
@@ -53,7 +53,7 @@ const TLSVariant = enum {
 };
 
 const tls_variant = switch (builtin.arch) {
-    .arm, .armeb, .aarch64, .aarch64_be, .riscv32, .riscv64, .mips, .mipsel => TLSVariant.VariantI,
+    .arm, .armeb, .aarch64, .aarch64_be, .riscv32, .riscv64, .mips, .mipsel, .powerpc, .powerpc64, .powerpc64le => TLSVariant.VariantI,
     .x86_64, .i386 => TLSVariant.VariantII,
     else => @compileError("undefined tls_variant for this architecture"),
 };
@@ -77,12 +77,12 @@ const tls_tp_points_past_tcb = switch (builtin.arch) {
 // make the generated code more efficient
 
 const tls_tp_offset = switch (builtin.arch) {
-    .mips, .mipsel => 0x7000,
+    .mips, .mipsel, .powerpc, .powerpc64, .powerpc64le => 0x7000,
     else => 0,
 };
 
 const tls_dtv_offset = switch (builtin.arch) {
-    .mips, .mipsel => 0x8000,
+    .mips, .mipsel, .powerpc, .powerpc64, .powerpc64le => 0x8000,
     .riscv32, .riscv64 => 0x800,
     else => 0,
 };
@@ -165,6 +165,13 @@ pub fn setThreadPointer(addr: usize) void {
             const rc = std.os.linux.syscall1(.set_thread_area, addr);
             assert(rc == 0);
         },
+        .powerpc, .powerpc64, .powerpc64le => {
+            asm volatile (
+                \\ mr 13, %[addr]
+                :
+                : [addr] "r" (addr)
+            );
+        },
         else => @compileError("Unsupported architecture"),
     }
 }