aboutsummaryrefslogtreecommitdiff
path: root/lib/std/os/linux/powerpc64.zig
diff options
context:
space:
mode:
authorAndrew Kelley <andrew@ziglang.org>2020-09-10 15:56:27 -0400
committerGitHub <noreply@github.com>2020-09-10 15:56:27 -0400
commit2315331d23d1cfe38f431ec5b81e52101e01dfd7 (patch)
tree7ce52b1c1034cb4ad145721218f69bc699410a59 /lib/std/os/linux/powerpc64.zig
parentea9b38c93c38e402c807b20802eb003bcc4ddc5b (diff)
parent51fcf949f97d068e917c0c3301ba63a4a305ab6e (diff)
downloadzig-2315331d23d1cfe38f431ec5b81e52101e01dfd7.tar.gz
zig-2315331d23d1cfe38f431ec5b81e52101e01dfd7.zip
Merge pull request #5527 from shawnanastasio/ppc64le
Implement support for powerpc64{,le}
Diffstat (limited to 'lib/std/os/linux/powerpc64.zig')
-rw-r--r--lib/std/os/linux/powerpc64.zig127
1 files changed, 127 insertions, 0 deletions
diff --git a/lib/std/os/linux/powerpc64.zig b/lib/std/os/linux/powerpc64.zig
new file mode 100644
index 0000000000..337a6aa30a
--- /dev/null
+++ b/lib/std/os/linux/powerpc64.zig
@@ -0,0 +1,127 @@
+usingnamespace @import("../bits.zig");
+
+pub fn syscall0(number: SYS) usize {
+ return asm volatile (
+ \\ sc
+ \\ bns+ 1f
+ \\ neg 3, 3
+ \\ 1:
+ : [ret] "={r3}" (-> usize)
+ : [number] "{r0}" (@enumToInt(number))
+ : "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12"
+ );
+}
+
+pub fn syscall1(number: SYS, arg1: usize) usize {
+ return asm volatile (
+ \\ sc
+ \\ bns+ 1f
+ \\ neg 3, 3
+ \\ 1:
+ : [ret] "={r3}" (-> usize)
+ : [number] "{r0}" (@enumToInt(number)),
+ [arg1] "{r3}" (arg1)
+ : "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12"
+ );
+}
+
+pub fn syscall2(number: SYS, arg1: usize, arg2: usize) usize {
+ return asm volatile (
+ \\ sc
+ \\ bns+ 1f
+ \\ neg 3, 3
+ \\ 1:
+ : [ret] "={r3}" (-> usize)
+ : [number] "{r0}" (@enumToInt(number)),
+ [arg1] "{r3}" (arg1),
+ [arg2] "{r4}" (arg2)
+ : "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12"
+ );
+}
+
+pub fn syscall3(number: SYS, arg1: usize, arg2: usize, arg3: usize) usize {
+ return asm volatile (
+ \\ sc
+ \\ bns+ 1f
+ \\ neg 3, 3
+ \\ 1:
+ : [ret] "={r3}" (-> usize)
+ : [number] "{r0}" (@enumToInt(number)),
+ [arg1] "{r3}" (arg1),
+ [arg2] "{r4}" (arg2),
+ [arg3] "{r5}" (arg3)
+ : "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12"
+ );
+}
+
+pub fn syscall4(number: SYS, arg1: usize, arg2: usize, arg3: usize, arg4: usize) usize {
+ return asm volatile (
+ \\ sc
+ \\ bns+ 1f
+ \\ neg 3, 3
+ \\ 1:
+ : [ret] "={r3}" (-> usize)
+ : [number] "{r0}" (@enumToInt(number)),
+ [arg1] "{r3}" (arg1),
+ [arg2] "{r4}" (arg2),
+ [arg3] "{r5}" (arg3),
+ [arg4] "{r6}" (arg4)
+ : "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12"
+ );
+}
+
+pub fn syscall5(number: SYS, arg1: usize, arg2: usize, arg3: usize, arg4: usize, arg5: usize) usize {
+ return asm volatile (
+ \\ sc
+ \\ bns+ 1f
+ \\ neg 3, 3
+ \\ 1:
+ : [ret] "={r3}" (-> usize)
+ : [number] "{r0}" (@enumToInt(number)),
+ [arg1] "{r3}" (arg1),
+ [arg2] "{r4}" (arg2),
+ [arg3] "{r5}" (arg3),
+ [arg4] "{r6}" (arg4),
+ [arg5] "{r7}" (arg5)
+ : "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12"
+ );
+}
+
+pub fn syscall6(
+ number: SYS,
+ arg1: usize,
+ arg2: usize,
+ arg3: usize,
+ arg4: usize,
+ arg5: usize,
+ arg6: usize,
+) usize {
+ return asm volatile (
+ \\ sc
+ \\ bns+ 1f
+ \\ neg 3, 3
+ \\ 1:
+ : [ret] "={r3}" (-> usize)
+ : [number] "{r0}" (@enumToInt(number)),
+ [arg1] "{r3}" (arg1),
+ [arg2] "{r4}" (arg2),
+ [arg3] "{r5}" (arg3),
+ [arg4] "{r6}" (arg4),
+ [arg5] "{r7}" (arg5),
+ [arg6] "{r8}" (arg6)
+ : "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12"
+ );
+}
+
+/// This matches the libc clone function.
+pub extern fn clone(func: fn (arg: usize) callconv(.C) u8, stack: usize, flags: usize, arg: usize, ptid: *i32, tls: usize, ctid: *i32) usize;
+
+pub const restore = restore_rt;
+
+pub fn restore_rt() callconv(.Naked) void {
+ return asm volatile ("sc"
+ :
+ : [number] "{r0}" (@enumToInt(SYS.rt_sigreturn))
+ : "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12"
+ );
+}