diff options
| author | Alex Rønne Petersen <alex@alexrp.com> | 2025-10-18 11:12:56 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-10-18 11:12:56 +0200 |
| commit | 631915ad961c83b8a2e4e36f11a278dae054372e (patch) | |
| tree | 75a28dd93d57aba7c0d86d6e205b65cd151a7fec /lib/std/debug/Dwarf.zig | |
| parent | 35d079051467cc5edbb80ce48cbaeb5bddc92850 (diff) | |
| parent | 9fd7f38600a61b665978db6203ce019b6fe3054b (diff) | |
| download | zig-631915ad961c83b8a2e4e36f11a278dae054372e.tar.gz zig-631915ad961c83b8a2e4e36f11a278dae054372e.zip | |
Merge pull request #25600 from alexrp/std-debug-more-arches
`std.debug`: add CPU contexts and DWARF mappings for more architectures
Diffstat (limited to 'lib/std/debug/Dwarf.zig')
| -rw-r--r-- | lib/std/debug/Dwarf.zig | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/lib/std/debug/Dwarf.zig b/lib/std/debug/Dwarf.zig index acd71eb4ed..7229dcdf4c 100644 --- a/lib/std/debug/Dwarf.zig +++ b/lib/std/debug/Dwarf.zig @@ -1430,14 +1430,20 @@ pub fn compactUnwindToDwarfRegNumber(unwind_reg_number: u3) !u16 { pub fn ipRegNum(arch: std.Target.Cpu.Arch) ?u16 { return switch (arch) { .aarch64, .aarch64_be => 32, + .arc => 160, .arm, .armeb, .thumb, .thumbeb => 15, + .csky => 64, .hexagon => 76, + .lanai => 2, .loongarch32, .loongarch64 => 64, + .m68k => 26, .mips, .mipsel, .mips64, .mips64el => 66, + .or1k => 35, .powerpc, .powerpcle, .powerpc64, .powerpc64le => 67, .riscv32, .riscv32be, .riscv64, .riscv64be => 65, .s390x => 65, .sparc, .sparc64 => 32, + .ve => 144, .x86 => 8, .x86_64 => 16, else => null, @@ -1447,14 +1453,20 @@ pub fn ipRegNum(arch: std.Target.Cpu.Arch) ?u16 { pub fn fpRegNum(arch: std.Target.Cpu.Arch) u16 { return switch (arch) { .aarch64, .aarch64_be => 29, + .arc => 27, .arm, .armeb, .thumb, .thumbeb => 11, + .csky => 14, .hexagon => 30, + .lanai => 5, .loongarch32, .loongarch64 => 22, + .m68k => 14, .mips, .mipsel, .mips64, .mips64el => 30, + .or1k => 2, .powerpc, .powerpcle, .powerpc64, .powerpc64le => 1, .riscv32, .riscv32be, .riscv64, .riscv64be => 8, .s390x => 11, .sparc, .sparc64 => 30, + .ve => 9, .x86 => 5, .x86_64 => 6, else => unreachable, @@ -1464,14 +1476,20 @@ pub fn fpRegNum(arch: std.Target.Cpu.Arch) u16 { pub fn spRegNum(arch: std.Target.Cpu.Arch) u16 { return switch (arch) { .aarch64, .aarch64_be => 31, + .arc => 28, .arm, .armeb, .thumb, .thumbeb => 13, + .csky => 14, .hexagon => 29, + .lanai => 4, .loongarch32, .loongarch64 => 3, + .m68k => 15, .mips, .mipsel, .mips64, .mips64el => 29, + .or1k => 1, .powerpc, .powerpcle, .powerpc64, .powerpc64le => 1, .riscv32, .riscv32be, .riscv64, .riscv64be => 2, .s390x => 15, .sparc, .sparc64 => 14, + .ve => 11, .x86 => 4, .x86_64 => 7, else => unreachable, |
