riscv: implement more operators

we can run `std.debug.print` now, with both run-time strings and integers!

1 files changed, 1 insertions, 8 deletions

diff --git a/lib/std/builtin.zig b/lib/std/builtin.zig
index 0ef5cffd24..a600f055df 100644
--- a/lib/std/builtin.zig
+++ b/lib/std/builtin.zig
@@ -775,14 +775,7 @@ pub fn default_panic(msg: []const u8, error_return_trace: ?*StackTrace, ret_addr
     }
 
     if (builtin.zig_backend == .stage2_riscv64) {
-        asm volatile ("ecall"
-            :
-            : [number] "{a7}" (64),
-              [arg1] "{a0}" (1),
-              [arg2] "{a1}" (@intFromPtr(msg.ptr)),
-              [arg3] "{a2}" (msg.len),
-            : "memory"
-        );
+        std.debug.print("panic: {s}\n", .{msg});
         std.posix.exit(127);
     }