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authorAndrew Kelley <andrew@ziglang.org>2020-12-16 17:25:48 -0700
committerAndrew Kelley <andrew@ziglang.org>2020-12-16 17:25:48 -0700
commit8f1408578cb255fbbdc555d746b25cefb331105e (patch)
treee11a39bf04e1627ee5db084e82f64a05220a9a56 /lib/std/Thread.zig
parentbbb3403b5dff854b01989882a539b29a9e33d732 (diff)
downloadzig-8f1408578cb255fbbdc555d746b25cefb331105e.tar.gz
zig-8f1408578cb255fbbdc555d746b25cefb331105e.zip
update the CPU target features and models
Rather than directly pasting the output from the target-details-generator tool, we have to look at the diff line by line and decide how to incorporate the changes. The baseline abstraction is something that Zig provides. The changes to x86 appear to be incorrect. After LLVM commit 3ad09fd03c51823aeb0bcbd7898aada33e9228d6 the CPU features are stored in a different data layout in their tables, and so we need to update the target details extraction tool to match.
Diffstat (limited to 'lib/std/Thread.zig')
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