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authorAndrew Kelley <andrew@ziglang.org>2025-04-05 01:46:13 -0400
committerGitHub <noreply@github.com>2025-04-05 01:46:13 -0400
commit0cd31fc7ff157551cfbba5da35cd79f118d2a2e3 (patch)
treea308488f5d85184c8ec402fb3f55f1cf2704443e /lib/std/Target/hexagon.zig
parent8acedfd5baabab705946ad097746f9183ef62420 (diff)
parentcefe65c1b8abe65a22d4b68410db1be264fdeda0 (diff)
downloadzig-0cd31fc7ff157551cfbba5da35cd79f118d2a2e3.tar.gz
zig-0cd31fc7ff157551cfbba5da35cd79f118d2a2e3.zip
Merge pull request #22780 from ziglang/llvm20
LLVM 20
Diffstat (limited to 'lib/std/Target/hexagon.zig')
-rw-r--r--lib/std/Target/hexagon.zig79
1 files changed, 79 insertions, 0 deletions
diff --git a/lib/std/Target/hexagon.zig b/lib/std/Target/hexagon.zig
index 983086bc18..a2185b2f5f 100644
--- a/lib/std/Target/hexagon.zig
+++ b/lib/std/Target/hexagon.zig
@@ -23,6 +23,8 @@ pub const Feature = enum {
hvxv69,
hvxv71,
hvxv73,
+ hvxv75,
+ hvxv79,
long_calls,
mem_noshuf,
memops,
@@ -46,6 +48,8 @@ pub const Feature = enum {
v69,
v71,
v73,
+ v75,
+ v79,
zreg,
};
@@ -171,6 +175,20 @@ pub const all_features = blk: {
.hvxv71,
}),
};
+ result[@intFromEnum(Feature.hvxv75)] = .{
+ .llvm_name = "hvxv75",
+ .description = "Hexagon HVX instructions",
+ .dependencies = featureSet(&[_]Feature{
+ .hvxv73,
+ }),
+ };
+ result[@intFromEnum(Feature.hvxv79)] = .{
+ .llvm_name = "hvxv79",
+ .description = "Hexagon HVX instructions",
+ .dependencies = featureSet(&[_]Feature{
+ .hvxv75,
+ }),
+ };
result[@intFromEnum(Feature.long_calls)] = .{
.llvm_name = "long-calls",
.description = "Use constant-extended calls",
@@ -290,6 +308,16 @@ pub const all_features = blk: {
.description = "Enable Hexagon V73 architecture",
.dependencies = featureSet(&[_]Feature{}),
};
+ result[@intFromEnum(Feature.v75)] = .{
+ .llvm_name = "v75",
+ .description = "Enable Hexagon V75 architecture",
+ .dependencies = featureSet(&[_]Feature{}),
+ };
+ result[@intFromEnum(Feature.v79)] = .{
+ .llvm_name = "v79",
+ .description = "Enable Hexagon V79 architecture",
+ .dependencies = featureSet(&[_]Feature{}),
+ };
result[@intFromEnum(Feature.zreg)] = .{
.llvm_name = "zreg",
.description = "Hexagon ZReg extension instructions",
@@ -583,4 +611,55 @@ pub const cpu = struct {
.v73,
}),
};
+ pub const hexagonv75: CpuModel = .{
+ .name = "hexagonv75",
+ .llvm_name = "hexagonv75",
+ .features = featureSet(&[_]Feature{
+ .compound,
+ .duplex,
+ .mem_noshuf,
+ .memops,
+ .nvj,
+ .nvs,
+ .small_data,
+ .v5,
+ .v55,
+ .v60,
+ .v62,
+ .v65,
+ .v66,
+ .v67,
+ .v68,
+ .v69,
+ .v71,
+ .v73,
+ .v75,
+ }),
+ };
+ pub const hexagonv79: CpuModel = .{
+ .name = "hexagonv79",
+ .llvm_name = "hexagonv79",
+ .features = featureSet(&[_]Feature{
+ .compound,
+ .duplex,
+ .mem_noshuf,
+ .memops,
+ .nvj,
+ .nvs,
+ .small_data,
+ .v5,
+ .v55,
+ .v60,
+ .v62,
+ .v65,
+ .v66,
+ .v67,
+ .v68,
+ .v69,
+ .v71,
+ .v73,
+ .v75,
+ .v79,
+ }),
+ };
};