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authorLiviu Dudau <liviu@dudau.co.uk>2024-04-09 18:47:20 +0000
committerAndrew Kelley <andrew@ziglang.org>2024-04-17 15:06:48 -0700
commita0de077600a35e41ce861398eaf3c8e832fee42e (patch)
tree65573517c636b1a42e5e018b6de6740eec21b8a6 /lib/compiler_rt/mulo.zig
parent1fb23813166e768a59bc7468d09bcb2e8e0f8f03 (diff)
downloadzig-a0de077600a35e41ce861398eaf3c8e832fee42e.tar.gz
zig-a0de077600a35e41ce861398eaf3c8e832fee42e.zip
std.zig.system.linux: Use arm.zig detection for AArch64 CPU features
When building zig natively from source on an RK3588 SoC board, the generated stage3 compiler will use unsupported 'sha256h.4s' instructions due to mis-identified CPU features. This happens when trying to compile a new project generated with "zig init" $ ~/devel/zig/build/stage3/bin/zig build thread 919 panic: Illegal instruction at address 0x1fdc0c4 /home/dliviu/devel/zig/lib/std/crypto/sha2.zig:223:29: 0x1fdc0c4 in round (zig) asm volatile ( ^ /home/dliviu/devel/zig/lib/std/crypto/sha2.zig:168:20: 0x1fdca87 in final (zig) d.round(&d.buf); ^ /home/dliviu/devel/zig/lib/std/crypto/sha2.zig:180:20: 0x1c8bb33 in finalResult (zig) d.final(&result); ^ /mnt/home/dliviu/devel/zig/src/Package/Fetch.zig:754:49: 0x1a3a8eb in relativePathDigest (zig) return Manifest.hexDigest(hasher.finalResult()); ^ /mnt/home/dliviu/devel/zig/src/main.zig:5128:53: 0x1a37413 in cmdBuild (zig) Package.Fetch.relativePathDigest(build_mod.root, global_cache_directory), ^ ???:?:?: 0xff09ffffffffffff in ??? (???) Unwind information for `???:0xff09ffffffffffff` was not available, trace may be incomplete ???:?:?: 0x3f7f137 in ??? (???) Aborted (core dumped) system/linux.zig parses "/proc/cpuinfo" to determine the CPU features, but it seems to generate the wrong set of features from: $ cat /proc/cpuinfo processor : 0 BogoMIPS : 48.00 Features : fp asimd evtstrm crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x2 CPU part : 0xd05 CPU revision : 0 ..... processor : 4 BogoMIPS : 48.00 Features : fp asimd evtstrm crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x4 CPU part : 0xd0b CPU revision : 0 ..... To fix this, use the Linux kernel way of reading the feature registers as documented here: https://www.kernel.org/doc/html/latest/arch/arm64/cpu-feature-registers.html arm.zig already has the code to parse the feature register values, we just need to collect them in an array and pass them for identification. Signed-off-by: Liviu Dudau <liviu@dudau.co.uk>
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