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authorLemonBoy <thatlemon@gmail.com>2021-04-26 18:28:17 +0200
committerLemonBoy <thatlemon@gmail.com>2021-04-26 18:28:17 +0200
commit7e6cc4c50565b6403bd2ecaabccd4ca37cb05ed2 (patch)
tree45398fc74908df0dbfaf6939bb2623ddc5fc4787
parent896d93e1e6f7638afd1536c0d40d93a3faeb1356 (diff)
downloadzig-7e6cc4c50565b6403bd2ecaabccd4ca37cb05ed2.tar.gz
zig-7e6cc4c50565b6403bd2ecaabccd4ca37cb05ed2.zip
stage2: Ensure the features set is populated
-rw-r--r--lib/std/zig/system/linux.zig6
1 files changed, 4 insertions, 2 deletions
diff --git a/lib/std/zig/system/linux.zig b/lib/std/zig/system/linux.zig
index 14e61a9de4..ce802df7a8 100644
--- a/lib/std/zig/system/linux.zig
+++ b/lib/std/zig/system/linux.zig
@@ -53,10 +53,11 @@ const SparcCpuinfoImpl = struct {
// At the moment we only support 64bit SPARC systems.
assert(self.is_64bit);
+ const model = self.model orelse Target.Cpu.Model.generic(arch);
return Target.Cpu{
.arch = arch,
- .model = self.model orelse Target.Cpu.Model.generic(arch),
- .features = Target.Cpu.Feature.Set.empty,
+ .model = model,
+ .features = model.features,
};
}
};
@@ -75,6 +76,7 @@ test "cpuinfo: SPARC" {
const r = SparcCpuinfoParser.parse(.sparcv9, fbs.reader()) catch unreachable;
testing.expectEqual(&Target.sparc.cpu.niagara2, r.?.model);
+ testing.expect(Target.sparc.cpu.niagara2.features.eql(r.?.features));
}
// The generic implementation of a /proc/cpuinfo parser.