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From a58d581e212b3acbc65e56384e6bc60bb109f29a Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Fri, 7 Aug 2020 15:51:42 +0100
Subject: [PATCH] arm64: tegra: Use valid PWM period for VDD_GPU on Tegra210
From: Thierry Reding <treding@nvidia.com>
The PWM on Tegra210 can run at a maximum frequency of 48 MHz and cannot
reach the minimum period is 5334 ns. The currently configured period of
4880 ns is not within the valid range, so set it to 8000 ns. This value
was taken from the downstream DTS files and seems to work fine.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
---
arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 2 +-
arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
index cc6ed45a2b485..e2e984a75f601 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
@@ -346,7 +346,7 @@ regulators {
vdd_gpu: regulator@100 {
compatible = "pwm-regulator";
reg = <100>;
- pwms = <&pwm 1 4880>;
+ pwms = <&pwm 1 8000>;
regulator-name = "VDD_GPU";
regulator-min-microvolt = <710000>;
regulator-max-microvolt = <1320000>;
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
index 9bc52fdb393c8..ebaac57853138 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
@@ -789,7 +789,7 @@ vdd_cpu: regulator@5 {
vdd_gpu: regulator@6 {
compatible = "pwm-regulator";
reg = <6>;
- pwms = <&pwm 1 4880>;
+ pwms = <&pwm 1 8000>;
regulator-name = "VDD_GPU";
regulator-min-microvolt = <710000>;
regulator-max-microvolt = <1320000>;
--
2.26.2
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