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-rw-r--r--SOURCES/0001-Revert-drm-i915-mtl-Add-fake-PCH-for-Meteor-Lake.patch221
-rw-r--r--SOURCES/0001-amd-pstate.patch64
-rw-r--r--SOURCES/Patchlist.changelog3
-rw-r--r--SOURCES/kernel.changelog5
-rw-r--r--SOURCES/patch-6.10-redhat.patch39
-rw-r--r--SOURCES/scx-kernel.patch8
-rw-r--r--SOURCES/steamdeck-oled-hw-quirks.patch35
7 files changed, 51 insertions, 324 deletions
diff --git a/SOURCES/0001-Revert-drm-i915-mtl-Add-fake-PCH-for-Meteor-Lake.patch b/SOURCES/0001-Revert-drm-i915-mtl-Add-fake-PCH-for-Meteor-Lake.patch
deleted file mode 100644
index c01e878..0000000
--- a/SOURCES/0001-Revert-drm-i915-mtl-Add-fake-PCH-for-Meteor-Lake.patch
+++ /dev/null
@@ -1,221 +0,0 @@
-From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
-From: Jan200101 <sentrycraft123@gmail.com>
-Date: Tue, 9 Jul 2024 19:51:54 +0200
-Subject: [PATCH] Revert "drm/i915/mtl: Add fake PCH for Meteor Lake"
-
-This reverts commit 93cbc1accbcec2740231755774420934658e2b18.
-
-Signed-off-by: Jan200101 <sentrycraft123@gmail.com>
----
- drivers/gpu/drm/i915/display/intel_backlight.c | 2 +-
- drivers/gpu/drm/i915/display/intel_bios.c | 3 ++-
- drivers/gpu/drm/i915/display/intel_cdclk.c | 6 +++---
- drivers/gpu/drm/i915/display/intel_display_irq.c | 2 +-
- drivers/gpu/drm/i915/display/intel_gmbus.c | 5 ++++-
- drivers/gpu/drm/i915/display/intel_hotplug_irq.c | 6 ++++--
- drivers/gpu/drm/i915/display/intel_pps.c | 2 +-
- drivers/gpu/drm/i915/soc/intel_pch.c | 16 ++++++++--------
- drivers/gpu/drm/i915/soc/intel_pch.h | 6 +++++-
- 9 files changed, 29 insertions(+), 19 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/display/intel_backlight.c b/drivers/gpu/drm/i915/display/intel_backlight.c
-index 1946d7fb3c2e..3f3cd944a1c5 100644
---- a/drivers/gpu/drm/i915/display/intel_backlight.c
-+++ b/drivers/gpu/drm/i915/display/intel_backlight.c
-@@ -1465,7 +1465,7 @@ static bool cnp_backlight_controller_is_valid(struct drm_i915_private *i915, int
-
- if (controller == 1 &&
- INTEL_PCH_TYPE(i915) >= PCH_ICP &&
-- INTEL_PCH_TYPE(i915) <= PCH_ADP)
-+ INTEL_PCH_TYPE(i915) < PCH_MTP)
- return intel_de_read(i915, SOUTH_CHICKEN1) & ICP_SECOND_PPS_IO_SELECT;
-
- return true;
-diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
-index 7d1e443f97b9..02ec8e52dd7d 100644
---- a/drivers/gpu/drm/i915/display/intel_bios.c
-+++ b/drivers/gpu/drm/i915/display/intel_bios.c
-@@ -2228,7 +2228,8 @@ static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
- if (IS_DGFX(i915))
- return vbt_pin;
-
-- if (INTEL_PCH_TYPE(i915) >= PCH_MTL || IS_ALDERLAKE_P(i915)) {
-+ if (INTEL_PCH_TYPE(i915) >= PCH_LNL || HAS_PCH_MTP(i915) ||
-+ IS_ALDERLAKE_P(i915)) {
- ddc_pin_map = adlp_ddc_pin_map;
- n_entries = ARRAY_SIZE(adlp_ddc_pin_map);
- } else if (IS_ALDERLAKE_S(i915)) {
-diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
-index f672bfd70d45..789b3a379363 100644
---- a/drivers/gpu/drm/i915/display/intel_cdclk.c
-+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
-@@ -3509,15 +3509,15 @@ u32 intel_read_rawclk(struct drm_i915_private *dev_priv)
- {
- u32 freq;
-
-- if (INTEL_PCH_TYPE(dev_priv) >= PCH_MTL)
-+ if (INTEL_PCH_TYPE(dev_priv) >= PCH_DG1)
-+ freq = dg1_rawclk(dev_priv);
-+ else if (INTEL_PCH_TYPE(dev_priv) >= PCH_MTP)
- /*
- * MTL always uses a 38.4 MHz rawclk. The bspec tells us
- * "RAWCLK_FREQ defaults to the values for 38.4 and does
- * not need to be programmed."
- */
- freq = 38400;
-- else if (INTEL_PCH_TYPE(dev_priv) >= PCH_DG1)
-- freq = dg1_rawclk(dev_priv);
- else if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP)
- freq = cnp_rawclk(dev_priv);
- else if (HAS_PCH_SPLIT(dev_priv))
-diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
-index f846c5b108b5..f950a87392cf 100644
---- a/drivers/gpu/drm/i915/display/intel_display_irq.c
-+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
-@@ -986,7 +986,7 @@ static void gen8_read_and_ack_pch_irqs(struct drm_i915_private *i915, u32 *pch_i
- * their flags both in the PICA and SDE IIR.
- */
- if (*pch_iir & SDE_PICAINTERRUPT) {
-- drm_WARN_ON(&i915->drm, INTEL_PCH_TYPE(i915) < PCH_MTL);
-+ drm_WARN_ON(&i915->drm, INTEL_PCH_TYPE(i915) < PCH_MTP);
-
- pica_ier = intel_de_rmw(i915, PICAINTERRUPT_IER, ~0, 0);
- *pica_iir = intel_de_read(i915, PICAINTERRUPT_IIR);
-diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c
-index d3e03ed5b79c..e9e4dcf345f9 100644
---- a/drivers/gpu/drm/i915/display/intel_gmbus.c
-+++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
-@@ -155,7 +155,7 @@ static const struct gmbus_pin *get_gmbus_pin(struct drm_i915_private *i915,
- const struct gmbus_pin *pins;
- size_t size;
-
-- if (INTEL_PCH_TYPE(i915) >= PCH_MTL) {
-+ if (INTEL_PCH_TYPE(i915) >= PCH_LNL) {
- pins = gmbus_pins_mtp;
- size = ARRAY_SIZE(gmbus_pins_mtp);
- } else if (INTEL_PCH_TYPE(i915) >= PCH_DG2) {
-@@ -164,6 +164,9 @@ static const struct gmbus_pin *get_gmbus_pin(struct drm_i915_private *i915,
- } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
- pins = gmbus_pins_dg1;
- size = ARRAY_SIZE(gmbus_pins_dg1);
-+ } else if (INTEL_PCH_TYPE(i915) >= PCH_MTP) {
-+ pins = gmbus_pins_mtp;
-+ size = ARRAY_SIZE(gmbus_pins_mtp);
- } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
- pins = gmbus_pins_icp;
- size = ARRAY_SIZE(gmbus_pins_icp);
-diff --git a/drivers/gpu/drm/i915/display/intel_hotplug_irq.c b/drivers/gpu/drm/i915/display/intel_hotplug_irq.c
-index 76076509f771..04f62f27ad74 100644
---- a/drivers/gpu/drm/i915/display/intel_hotplug_irq.c
-+++ b/drivers/gpu/drm/i915/display/intel_hotplug_irq.c
-@@ -163,10 +163,12 @@ static void intel_hpd_init_pins(struct drm_i915_private *dev_priv)
- (!HAS_PCH_SPLIT(dev_priv) || HAS_PCH_NOP(dev_priv)))
- return;
-
-- if (INTEL_PCH_TYPE(dev_priv) >= PCH_MTL)
-+ if (INTEL_PCH_TYPE(dev_priv) >= PCH_LNL)
- hpd->pch_hpd = hpd_mtp;
- else if (INTEL_PCH_TYPE(dev_priv) >= PCH_DG1)
- hpd->pch_hpd = hpd_sde_dg1;
-+ else if (INTEL_PCH_TYPE(dev_priv) >= PCH_MTP)
-+ hpd->pch_hpd = hpd_mtp;
- else if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP)
- hpd->pch_hpd = hpd_icp;
- else if (HAS_PCH_CNP(dev_priv) || HAS_PCH_SPT(dev_priv))
-@@ -1137,7 +1139,7 @@ static void xelpdp_hpd_irq_setup(struct drm_i915_private *i915)
-
- if (INTEL_PCH_TYPE(i915) >= PCH_LNL)
- xe2lpd_sde_hpd_irq_setup(i915);
-- else if (INTEL_PCH_TYPE(i915) >= PCH_MTL)
-+ else if (INTEL_PCH_TYPE(i915) >= PCH_MTP)
- mtp_hpd_irq_setup(i915);
- }
-
-diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
-index 2d65a538f83e..a8fa3a20990e 100644
---- a/drivers/gpu/drm/i915/display/intel_pps.c
-+++ b/drivers/gpu/drm/i915/display/intel_pps.c
-@@ -366,7 +366,7 @@ static bool intel_pps_is_valid(struct intel_dp *intel_dp)
-
- if (intel_dp->pps.pps_idx == 1 &&
- INTEL_PCH_TYPE(i915) >= PCH_ICP &&
-- INTEL_PCH_TYPE(i915) <= PCH_ADP)
-+ INTEL_PCH_TYPE(i915) < PCH_MTP)
- return intel_de_read(i915, SOUTH_CHICKEN1) & ICP_SECOND_PPS_IO_SELECT;
-
- return true;
-diff --git a/drivers/gpu/drm/i915/soc/intel_pch.c b/drivers/gpu/drm/i915/soc/intel_pch.c
-index 3cad6dac06b0..240beafb38ed 100644
---- a/drivers/gpu/drm/i915/soc/intel_pch.c
-+++ b/drivers/gpu/drm/i915/soc/intel_pch.c
-@@ -140,6 +140,11 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id)
- drm_WARN_ON(&dev_priv->drm, !IS_ALDERLAKE_S(dev_priv) &&
- !IS_ALDERLAKE_P(dev_priv));
- return PCH_ADP;
-+ case INTEL_PCH_MTP_DEVICE_ID_TYPE:
-+ case INTEL_PCH_MTP2_DEVICE_ID_TYPE:
-+ drm_dbg_kms(&dev_priv->drm, "Found Meteor Lake PCH\n");
-+ drm_WARN_ON(&dev_priv->drm, !IS_METEORLAKE(dev_priv));
-+ return PCH_MTP;
- default:
- return PCH_NONE;
- }
-@@ -168,7 +173,9 @@ intel_virt_detect_pch(const struct drm_i915_private *dev_priv,
- * make an educated guess as to which PCH is really there.
- */
-
-- if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv))
-+ if (IS_METEORLAKE(dev_priv))
-+ id = INTEL_PCH_MTP_DEVICE_ID_TYPE;
-+ else if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv))
- id = INTEL_PCH_ADP_DEVICE_ID_TYPE;
- else if (IS_TIGERLAKE(dev_priv) || IS_ROCKETLAKE(dev_priv))
- id = INTEL_PCH_TGP_DEVICE_ID_TYPE;
-@@ -218,13 +225,6 @@ void intel_detect_pch(struct drm_i915_private *dev_priv)
- if (DISPLAY_VER(dev_priv) >= 20) {
- dev_priv->pch_type = PCH_LNL;
- return;
-- } else if (IS_METEORLAKE(dev_priv)) {
-- /*
-- * Both north display and south display are on the SoC die.
-- * The real PCH is uninvolved in display.
-- */
-- dev_priv->pch_type = PCH_MTL;
-- return;
- } else if (IS_DG2(dev_priv)) {
- dev_priv->pch_type = PCH_DG2;
- return;
-diff --git a/drivers/gpu/drm/i915/soc/intel_pch.h b/drivers/gpu/drm/i915/soc/intel_pch.h
-index 89e89ede265d..1b03ea60a7a8 100644
---- a/drivers/gpu/drm/i915/soc/intel_pch.h
-+++ b/drivers/gpu/drm/i915/soc/intel_pch.h
-@@ -25,11 +25,11 @@ enum intel_pch {
- PCH_ICP, /* Ice Lake/Jasper Lake PCH */
- PCH_TGP, /* Tiger Lake/Mule Creek Canyon PCH */
- PCH_ADP, /* Alder Lake PCH */
-+ PCH_MTP, /* Meteor Lake PCH */
-
- /* Fake PCHs, functionality handled on the same PCI dev */
- PCH_DG1 = 1024,
- PCH_DG2,
-- PCH_MTL,
- PCH_LNL,
- };
-
-@@ -59,12 +59,16 @@ enum intel_pch {
- #define INTEL_PCH_ADP2_DEVICE_ID_TYPE 0x5180
- #define INTEL_PCH_ADP3_DEVICE_ID_TYPE 0x7A00
- #define INTEL_PCH_ADP4_DEVICE_ID_TYPE 0x5480
-+#define INTEL_PCH_MTP_DEVICE_ID_TYPE 0x7E00
-+#define INTEL_PCH_MTP2_DEVICE_ID_TYPE 0xAE00
- #define INTEL_PCH_P2X_DEVICE_ID_TYPE 0x7100
- #define INTEL_PCH_P3X_DEVICE_ID_TYPE 0x7000
- #define INTEL_PCH_QEMU_DEVICE_ID_TYPE 0x2900 /* qemu q35 has 2918 */
-
- #define INTEL_PCH_TYPE(dev_priv) ((dev_priv)->pch_type)
- #define INTEL_PCH_ID(dev_priv) ((dev_priv)->pch_id)
-+#define HAS_PCH_LNL(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_LNL)
-+#define HAS_PCH_MTP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_MTP)
- #define HAS_PCH_DG2(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_DG2)
- #define HAS_PCH_ADP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_ADP)
- #define HAS_PCH_DG1(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_DG1)
diff --git a/SOURCES/0001-amd-pstate.patch b/SOURCES/0001-amd-pstate.patch
index d4986ef..c865d00 100644
--- a/SOURCES/0001-amd-pstate.patch
+++ b/SOURCES/0001-amd-pstate.patch
@@ -177,19 +177,6 @@ index a092b13ffbc2..804fab4ebb26 100644
u64 value = READ_ONCE(cpudata->cppc_req_cached);
value &= ~GENMASK_ULL(31, 24);
-@@ -304,10 +296,8 @@ static int amd_pstate_set_energy_pref_index(struct amd_cpudata *cpudata,
- int epp = -EINVAL;
- int ret;
-
-- if (!pref_index) {
-- pr_debug("EPP pref_index is invalid\n");
-- return -EINVAL;
-- }
-+ if (!pref_index)
-+ epp = cpudata->epp_default;
-
- if (epp == -EINVAL)
- epp = epp_values[pref_index];
@@ -524,7 +514,10 @@ static inline bool amd_pstate_sample(struct amd_cpudata *cpudata)
static void amd_pstate_update(struct amd_cpudata *cpudata, u32 min_perf,
u32 des_perf, u32 max_perf, bool fast_switch, int gov_flags)
@@ -521,8 +508,7 @@ index a092b13ffbc2..804fab4ebb26 100644
policy->driver_data = cpudata;
-- cpudata->epp_cached = amd_pstate_get_epp(cpudata, 0);
-+ cpudata->epp_cached = cpudata->epp_default = amd_pstate_get_epp(cpudata, 0);
+ cpudata->epp_cached = cpudata->epp_default = amd_pstate_get_epp(cpudata, 0);
policy->min = policy->cpuinfo.min_freq;
policy->max = policy->cpuinfo.max_freq;
@@ -656,19 +642,7 @@ index a092b13ffbc2..804fab4ebb26 100644
if (!acpi_cpc_valid()) {
pr_warn_once("the _CPC object is not present in SBIOS or ACPI disabled\n");
return -ENODEV;
-@@ -1766,35 +1889,43 @@ static int __init amd_pstate_init(void)
- /* check if this machine need CPPC quirks */
- dmi_check_system(amd_pstate_quirks_table);
-
-- switch (cppc_state) {
-- case AMD_PSTATE_UNDEFINED:
-+ /*
-+ * determine the driver mode from the command line or kernel config.
-+ * If no command line input is provided, cppc_state will be AMD_PSTATE_UNDEFINED.
-+ * command line options will override the kernel config settings.
-+ */
-+
-+ if (cppc_state == AMD_PSTATE_UNDEFINED) {
+@@ -1774,11 +1899,9 @@ static int __init amd_pstate_init(void)
/* Disable on the following configs by default:
* 1. Undefined platforms
* 2. Server platforms
@@ -681,27 +655,7 @@ index a092b13ffbc2..804fab4ebb26 100644
pr_info("driver load is disabled, boot with specific mode to enable this\n");
return -ENODEV;
}
-- ret = amd_pstate_set_driver(CONFIG_X86_AMD_PSTATE_DEFAULT_MODE);
-- if (ret)
-- return ret;
-- break;
-+ /* get driver mode from kernel config option [1:4] */
-+ cppc_state = CONFIG_X86_AMD_PSTATE_DEFAULT_MODE;
-+ }
-+
-+ switch (cppc_state) {
- case AMD_PSTATE_DISABLE:
-+ pr_info("driver load is disabled, boot with specific mode to enable this\n");
- return -ENODEV;
- case AMD_PSTATE_PASSIVE:
- case AMD_PSTATE_ACTIVE:
- case AMD_PSTATE_GUIDED:
-+ ret = amd_pstate_set_driver(cppc_state);
-+ if (ret)
-+ return ret;
- break;
- default:
- return -EINVAL;
+@@ -1802,7 +1925,7 @@ static int __init amd_pstate_init(void)
}
/* capability check */
@@ -710,13 +664,7 @@ index a092b13ffbc2..804fab4ebb26 100644
pr_debug("AMD CPPC MSR based functionality is supported\n");
if (cppc_state != AMD_PSTATE_ACTIVE)
current_pstate_driver->adjust_perf = amd_pstate_adjust_perf;
-@@ -1808,13 +1939,15 @@ static int __init amd_pstate_init(void)
- /* enable amd pstate feature */
- ret = amd_pstate_enable(true);
- if (ret) {
-- pr_err("failed to enable with return %d\n", ret);
-+ pr_err("failed to enable driver mode(%d)\n", cppc_state);
- return ret;
+@@ -1821,8 +1944,10 @@ static int __init amd_pstate_init(void)
}
ret = cpufreq_register_driver(current_pstate_driver);
@@ -741,11 +689,11 @@ diff --git a/drivers/cpufreq/amd-pstate.h b/drivers/cpufreq/amd-pstate.h
index e6a28e7f4dbf..cc8bb2bc325a 100644
--- a/drivers/cpufreq/amd-pstate.h
+++ b/drivers/cpufreq/amd-pstate.h
-@@ -99,6 +99,8 @@ struct amd_cpudata {
+@@ -99,7 +99,8 @@ struct amd_cpudata {
u32 policy;
u64 cppc_cap1_cached;
bool suspended;
-+ s16 epp_default;
+ s16 epp_default;
+ bool boost_state;
};
diff --git a/SOURCES/Patchlist.changelog b/SOURCES/Patchlist.changelog
index 3241732..dfa2e4f 100644
--- a/SOURCES/Patchlist.changelog
+++ b/SOURCES/Patchlist.changelog
@@ -1,3 +1,6 @@
+https://gitlab.com/cki-project/kernel-ark/-/commit/3a19264d7608d1c0cb6adff9f45883887a30ba29
+ 3a19264d7608d1c0cb6adff9f45883887a30ba29 Revert "ata: libata-scsi: Honor the D_SENSE bit for CK_COND=1 and no error"
+
https://gitlab.com/cki-project/kernel-ark/-/commit/2c6b48dfc4f3aad194a99c23f8d3e604c1a5593f
2c6b48dfc4f3aad194a99c23f8d3e604c1a5593f wifi: brcmfmac: cfg80211: Handle SSID based pmksa deletion
diff --git a/SOURCES/kernel.changelog b/SOURCES/kernel.changelog
index 7d58f0a..f8bfb2e 100644
--- a/SOURCES/kernel.changelog
+++ b/SOURCES/kernel.changelog
@@ -1,3 +1,8 @@
+* Wed Aug 14 2024 Justin M. Forbes <jforbes@fedoraproject.org> [6.10.5-0]
+- Revert "ata: libata-scsi: Honor the D_SENSE bit for CK_COND=1 and no error" (Niklas Cassel)
+- Linux v6.10.5
+Resolves:
+
* Sun Aug 11 2024 Justin M. Forbes <jforbes@fedoraproject.org> [6.10.4-0]
- wifi: brcmfmac: cfg80211: Handle SSID based pmksa deletion (Janne Grunau)
- New config for 6.10.3 (Justin M. Forbes)
diff --git a/SOURCES/patch-6.10-redhat.patch b/SOURCES/patch-6.10-redhat.patch
index f39d754..ae6051c 100644
--- a/SOURCES/patch-6.10-redhat.patch
+++ b/SOURCES/patch-6.10-redhat.patch
@@ -12,6 +12,7 @@
drivers/acpi/irq.c | 17 ++-
drivers/acpi/scan.c | 9 ++
drivers/ata/libahci.c | 18 +++
+ drivers/ata/libata-scsi.c | 15 ++-
drivers/char/ipmi/ipmi_dmi.c | 15 +++
drivers/char/ipmi/ipmi_msghandler.c | 16 ++-
drivers/char/random.c | 122 +++++++++++++++++
@@ -40,10 +41,10 @@
security/lockdown/Kconfig | 13 ++
security/lockdown/lockdown.c | 1 +
security/security.c | 12 ++
- 42 files changed, 789 insertions(+), 259 deletions(-)
+ 43 files changed, 802 insertions(+), 261 deletions(-)
diff --git a/Makefile b/Makefile
-index aec5cc0babf8..d1c4b7c6cdea 100644
+index f9badb79ae8f..4d0eadfc33a1 100644
--- a/Makefile
+++ b/Makefile
@@ -22,6 +22,18 @@ $(if $(filter __%, $(MAKECMDGOALS)), \
@@ -82,10 +83,10 @@ index ee5115252aac..7f3796df8404 100644
The VM uses one page of physical memory for each page table.
For systems with a lot of processes, this can use a lot of
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
-index 5d91259ee7b5..3a9f1962da72 100644
+index 11bbdc15c6e5..9cecc1448e3c 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
-@@ -1368,7 +1368,7 @@ endchoice
+@@ -1364,7 +1364,7 @@ endchoice
config ARM64_FORCE_52BIT
bool "Force 52-bit virtual addresses for userspace"
@@ -616,6 +617,32 @@ index 83431aae74d8..f2a9c0d644af 100644
/* wait for engine to stop. This could be as long as 500 msec */
tmp = ata_wait_register(ap, port_mmio + PORT_CMD,
PORT_CMD_LIST_ON, PORT_CMD_LIST_ON, 1, 500);
+diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c
+index 076fbeadce01..4e0847601103 100644
+--- a/drivers/ata/libata-scsi.c
++++ b/drivers/ata/libata-scsi.c
+@@ -941,8 +941,19 @@ static void ata_gen_passthru_sense(struct ata_queued_cmd *qc)
+ &sense_key, &asc, &ascq);
+ ata_scsi_set_sense(qc->dev, cmd, sense_key, asc, ascq);
+ } else {
+- /* ATA PASS-THROUGH INFORMATION AVAILABLE */
+- ata_scsi_set_sense(qc->dev, cmd, RECOVERED_ERROR, 0, 0x1D);
++ /*
++ * ATA PASS-THROUGH INFORMATION AVAILABLE
++ *
++ * Note: we are supposed to call ata_scsi_set_sense(), which
++ * respects the D_SENSE bit, instead of unconditionally
++ * generating the sense data in descriptor format. However,
++ * because hdparm, hddtemp, and udisks incorrectly assume sense
++ * data in descriptor format, without even looking at the
++ * RESPONSE CODE field in the returned sense data (to see which
++ * format the returned sense data is in), we are stuck with
++ * being bug compatible with older kernels.
++ */
++ scsi_build_sense(cmd, 1, RECOVERED_ERROR, 0, 0x1D);
+ }
+ }
+
diff --git a/drivers/char/ipmi/ipmi_dmi.c b/drivers/char/ipmi/ipmi_dmi.c
index bbf7029e224b..cf7faa970dd6 100644
--- a/drivers/char/ipmi/ipmi_dmi.c
@@ -1582,7 +1609,7 @@ index 568410e64ce6..6afbaee83950 100644
* Intersil/Techwell TW686[4589]-based video capture cards have an empty (zero)
* class code. Fix it.
diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c
-index 1b7561abe05d..13f23905fb25 100644
+index 6b64af7d4927..a7ad470b8b8c 100644
--- a/drivers/scsi/sd.c
+++ b/drivers/scsi/sd.c
@@ -120,6 +120,14 @@ static const char *sd_cache_types[] = {
@@ -1600,7 +1627,7 @@ index 1b7561abe05d..13f23905fb25 100644
static void sd_set_flush_flag(struct scsi_disk *sdkp)
{
bool wc = false, fua = false;
-@@ -4252,6 +4260,8 @@ static int __init init_sd(void)
+@@ -4253,6 +4261,8 @@ static int __init init_sd(void)
goto err_out_class;
}
diff --git a/SOURCES/scx-kernel.patch b/SOURCES/scx-kernel.patch
index 1445dae..5bf5505 100644
--- a/SOURCES/scx-kernel.patch
+++ b/SOURCES/scx-kernel.patch
@@ -1237,15 +1237,15 @@ index ebf21373f663..fb6276f74ee6 100644
/*
* Put the rq online, if not already. This happens:
*
-@@ -9740,6 +9848,8 @@ int sched_cpu_deactivate(unsigned int cpu)
- }
- rq_unlock_irqrestore(rq, &rf);
+@@ -9903,6 +9903,8 @@
+
+ sched_set_rq_offline(rq, cpu);
+ scx_rq_deactivate(rq);
+
- #ifdef CONFIG_SCHED_SMT
/*
* When going down, decrement the number of cores with SMT present.
+ */
@@ -10061,11 +10061,15 @@
int i;
diff --git a/SOURCES/steamdeck-oled-hw-quirks.patch b/SOURCES/steamdeck-oled-hw-quirks.patch
index df352d7..585e908 100644
--- a/SOURCES/steamdeck-oled-hw-quirks.patch
+++ b/SOURCES/steamdeck-oled-hw-quirks.patch
@@ -71,41 +71,6 @@ index e8b2fc4002a52..3c69d860e1c9d 100644
--
GitLab
-From b59fed802470f07fafe72f6a2bdda2163da5ba33 Mon Sep 17 00:00:00 2001
-From: Swapnil Patel <Swapnil.Patel@amd.com>
-Date: Tue, 26 Sep 2023 16:24:25 -0400
-Subject: [PATCH] drm/amd/display: Don't add common modes for eDP connector
-
-[Why]
-Currently, we are adding various common modes to drm_connector for DP
-and eDP connection even if they aren't part of EDID. This results in
-unsupported modes getting added to eDP connector.
-
-[How]
-Add common modes to drm_connector only for DP connection.
-
-Signed-off-by: Swapnil Patel <swapnil.patel@amd.com>
----
- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
-index 85159cd0bfcd..2efefca8143b 100644
---- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
-+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
-@@ -7332,7 +7332,8 @@ static int amdgpu_dm_connector_get_modes(struct drm_connector *connector)
- drm_add_modes_noedid(connector, 1920, 1080);
- } else {
- amdgpu_dm_connector_ddc_get_modes(connector, edid);
-- amdgpu_dm_connector_add_common_modes(encoder, connector);
-+ if (connector->connector_type != DRM_MODE_CONNECTOR_eDP)
-+ amdgpu_dm_connector_add_common_modes(encoder, connector);
- amdgpu_dm_connector_add_freesync_modes(connector, edid);
- }
- amdgpu_dm_fbc_init(connector);
---
-GitLab
-
From 8f24ff69523cf3059e23ba6aa41d09b0c00f2986 Mon Sep 17 00:00:00 2001
From: Jeremy Selan <jeremys@valvesoftware.com>
Date: Wed, 28 Apr 2021 14:33:36 -0700