| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2022-07-26 | std.fmt: require specifier for unwrapping ?T and E!T | InKryption | |
| 2022-07-24 | Revert "std.fmt: require specifier for unwrapping ?T and E!T." | Andrew Kelley | |
| This reverts commit 7cbd586ace46a8e8cebab660ebca3cfc049305d9. This is causing a fail to build from source: ``` ./lib/std/fmt.zig:492:17: error: cannot format optional without a specifier (i.e. {?} or {any}) @compileError("cannot format optional without a specifier (i.e. {?} or {any})"); ^ ./src/link/MachO/Atom.zig:544:26: note: called from here log.debug(" RELA({s}) @ {x} => %{d} in object({d})", .{ ^ ``` I looked at the code to fix it but none of those args are optionals. | |||
| 2022-07-24 | std.fmt: require specifier for unwrapping ?T and E!T. | InKryption | |
| Co-authored-by: Veikka Tuominen <git@vexu.eu> | |||
| 2022-06-07 | x64: simplify saving registers to stack in prologue | Jakub Konka | |
| 2022-05-26 | regalloc: use StaticBitSet internally | Jakub Konka | |
| 2022-05-21 | regalloc: test allocating from multiple register claases | Jakub Konka | |
| 2022-05-20 | regalloc: temporarily nerf back to raw ints until stage2 catches up | Jakub Konka | |
| 2022-05-19 | regalloc: make register class bitmask non-optional | Jakub Konka | |
| 2022-05-19 | x64: use StaticBitSet instead of an integer internally in RegisterManager | Jakub Konka | |
| 2022-05-19 | x64: re-enable incremental tests | Jakub Konka | |
| 2022-05-19 | x64: use register classes mask to select between gp and avx | Jakub Konka | |
| 2022-05-19 | regalloc: allow for optional selector mask when allocating | Jakub Konka | |
| 2022-05-19 | x64: merge general purpose with simd register into one bitset | Jakub Konka | |
| This way, we do not have to tweak the `RegisterManager` to handle multiple register types - we have one linear space instead. Additionally we can use the bitset itself to separate the registers into overlapping (the ones that are aliases of differing bitwidths) and nonoverlapping classes (for example, AVX registers do not overlap general purpose registers, thus they can be allocated simultaneously). Another huge benefit of this simple approach is the fact that we can still refer to *all* registers regardless of their class via enum literals which makes the code so much more readable. Finally, `RegisterLock` is universal across different register classes. | |||
| 2022-05-19 | x64: add unordered cmp with EFLAGS | Jakub Konka | |
| 2022-05-19 | x64: load/store to/from AVX registers for f64 | Jakub Konka | |
| 2022-05-07 | regalloc: refactor locking multiple registers at once | Jakub Konka | |
| 2022-05-07 | x64: refactor code to avoid stage1 sema limitations | Jakub Konka | |
| 2022-05-07 | regalloc: rename freeze/unfreeze to lock/unlock registers | Jakub Konka | |
| 2022-05-07 | x64: fix misused register locks | Jakub Konka | |
| 2022-05-07 | regalloc: ensure we only freeze/unfreeze at the outermost scope | Jakub Konka | |
| This prevents a nasty type of bugs where we accidentally unfreeze a register that was frozen purposely in the outer scope, risking accidental realloc of a taken register. Fix CF flags spilling on aarch64 backend. | |||
| 2022-03-18 | stage2 regalloc: fix tryAllocRegs for specific situations | joachimschmidt557 | |
| Previously, tryAllocRegs did not take frozen registers into account when checking if enough registers are available. | |||
| 2022-03-11 | stage2 ARM: implement caller-saved registers | joachimschmidt557 | |
| 2022-03-11 | stage2 regalloc: replace Register.allocIndex with generic indexOfReg | joachimschmidt557 | |
| * callee_preserved_regs and other ABI-specific information have been moved to the respective abi.zig files | |||
| 2022-02-13 | stage2 regalloc: track Inst instead of ?Inst in register mapping | joachimschmidt557 | |
| The information whether a register is allocated to an instruction is already encoded in the free_registers "bitmap". Duplicating that information in the registers map is unnecessary and may lead to performance degradations. | |||
| 2022-02-06 | stage2 regalloc: Introduce error.OutOfRegisters | joachimschmidt557 | |
| 2022-02-03 | stage2: remove the concept of register exceptions | Jakub Konka | |
| 2022-01-28 | stage2 regalloc: Fix bug where regs were not marked as allocated | joachimschmidt557 | |
| 2022-01-26 | stage2 regalloc: Add freezeRegs/unfreezeRegs API | joachimschmidt557 | |
| The freeze/unfreeze API replaces the exceptions API for hopefully preventing bugs in codegen code using the RegisterManager. The exceptions API is still available for backwards compatibility and will be removed once all backends transition to the new freeze/unfreeze API. | |||
| 2021-12-30 | stage2 ARM: implement struct_field_ptr and struct_field_val | joachimschmidt557 | |
| 2021-11-30 | allocgate: std Allocator interface refactor | Lee Cannon | |
| 2021-07-20 | Get register_manager.zig tests to compile - use value '1' as mock Air.Inst.Index | Lewis Gaul | |
| 2021-07-20 | stage2: first pass over Module.zig for AIR memory layout | Andrew Kelley | |
| 2021-07-20 | stage2: first pass over codegen.zig for AIR memory layout | Andrew Kelley | |
| 2021-07-20 | stage2: rework AIR memory layout | Andrew Kelley | |
| This commit changes the AIR file and the documentation of the memory layout. The actual work of modifying the surrounding code (in Sema and codegen) is not yet done. | |||
| 2021-06-21 | fix code broken from previous commit | Jacob G-W | |
| 2021-06-21 | std, src, doc, test: remove unused variables | Jacob G-W | |
| 2021-05-22 | stage2: rename ir.zig to air.zig | Andrew Kelley | |
| We've settled on the nomenclature for the artifacts the compiler pipeline produces: 1. Tokens 2. AST (Abstract Syntax Tree) 3. ZIR (Zig Intermediate Representation) 4. AIR (Analyzed Intermediate Representation) 5. Machine Code Renaming `ir` identifiers to `air` will come with the inevitable air-memory-layout branch that I plan to start after the 0.8.0 release. | |||
| 2021-05-14 | stage2 register manager: clean up API and add more unit tests | joachimschmidt557 | |
| 2021-05-09 | stage2 ARM: Overhaul of genArmBinOp | joachimschmidt557 | |
| 2021-05-08 | update usage of std.testing in stage2 | Veikka Tuominen | |
| 2021-04-25 | stage2 register manager: Use an array instead of a hashmap for tracking | joachimschmidt557 | |
| allocated registers | |||
| 2021-04-16 | stage2 register manager: Add functions for allocating multiple registers | joachimschmidt557 | |
| 2021-04-07 | stage2 regalloc: Add unit test for getReg | joachimschmidt557 | |
| 2021-04-06 | stage2 regalloc: Add getReg and getRegWithoutTracking | joachimschmidt557 | |
| 2021-04-02 | stage2 register_manager: Add unit tests for tryAllocReg and allocReg | joachimschmidt557 | |
| 2021-04-02 | stage2 codegen: Extract register management code into separate file | joachimschmidt557 | |
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index : zig | |
| General-purpose programming language and toolchain for maintaining robust, optimal, and reusable software. https://ziglang.org |
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