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2021-04-07C backend: enumerate all the types in renderTypeAndrew Kelley
Now that we're close to supporting all the types, get rid of the `else` prong and explicitly list out those types that are not yet implemented. Thanks @g-w1
2021-04-06C backend: implement Enum types and valuesAndrew Kelley
They are lowered directly as the integer tag type, with no typedef.
2021-04-05stage2 wasm codegen: refactor to use wasm.buildOpcodegracefu
2021-04-05std/wasm: add buildOpcode to help construction of `Opcode`sgracefu
2021-04-05stage2 wasm: codegen `mul` opgracefu
2021-04-05stage2 wasm: codegen `sub` opgracefu
2021-04-04LLVM sub-arch triple: remove TODO commentAndrew Kelley
See #6542 for more details. Upon investigation, this change is not needed.
2021-04-02stage2: progress towards basic structsAndrew Kelley
Introduce `ResultLoc.none_or_ref` which is used by field access expressions to avoid unnecessary loads when the field access itself will do the load. This turns: ```zig p.y - p.x - p.x ``` from ```zir %14 = load(%4) node_offset:8:12 %15 = field_val(%14, "y") node_offset:8:13 %16 = load(%4) node_offset:8:18 %17 = field_val(%16, "x") node_offset:8:19 %18 = sub(%15, %17) node_offset:8:16 %19 = load(%4) node_offset:8:24 %20 = field_val(%19, "x") node_offset:8:25 ``` to ```zir %14 = field_val(%4, "y") node_offset:8:13 %15 = field_val(%4, "x") node_offset:8:19 %16 = sub(%14, %15) node_offset:8:16 %17 = field_val(%4, "x") node_offset:8:25 ``` Much more compact. This requires `Sema.zirFieldVal` to support both pointers and non-pointers. C backend: Implement typedefs for struct types, as well as the following TZIR instructions: * mul * mulwrap * addwrap * subwrap * ref * struct_field_ptr Note that add, addwrap, sub, subwrap, mul, mulwrap instructions are all incorrect currently and need to be updated to properly handle wrapping and non wrapping for signed and unsigned. C backend: change indentation delta to 1, to make the output smaller and to process fewer bytes. I promise I will add a test case as soon as I fix those warnings that are being printed for my test case.
2021-04-02stage2 AArch64: Add ldrh and ldrb instructionsjoachimschmidt557
2021-03-31Merge pull request #8266 from ziglang/zir-memory-layoutAndrew Kelley
rework ZIR memory layout; overhaul source locations
2021-03-31stage2 AArch64: implement strb and strhjoachimschmidt557
2021-03-28Merge remote-tracking branch 'origin/master' into zir-memory-layoutAndrew Kelley
Wanted to make sure those new test cases still pass. Also grab that CI fix so we can get those green check marks.
2021-03-28stage2: implement sema for @errorToInt and @intToErrorjacob gw
2021-03-23stage2: handle void value in genRet in LLVM backendTimon Kruiper
2021-03-23stage2: rename fail to todo in LLVM backendTimon Kruiper
This way we don't have to pass src to every function and we can simply use the first node as the lazy source location for all the todo errors.
2021-03-22Fix getNot and add test casesLuuk de Gram
2021-03-22Implement more instructions for more control flow supportLuuk de Gram
2021-03-20stage2: restructure LLVM backendTimon Kruiper
The LLVM backend is now structured into 3 different structs, namely Object, DeclGen and FuncGen. Object represents an object that is generated by the LLVM backend. DeclGen is responsible for generating a decl and FuncGen is responsible for generating llvm instructions from tzir in a function.
2021-03-19llvm backend: use new srclocjacob gw
this allows to compile with ninja
2021-03-18stage2: the code is compiling againAndrew Kelley
(with a lot of things commented out)
2021-03-18stage2: get Module and Sema compiling againAndrew Kelley
There are some `@panic("TODO")` in there but I'm trying to get the branch to the point where collaborators can jump in. Next is to repair the seam between LazySrcLoc and codegen's expected absolute file offsets.
2021-03-17zld: use aarch64 for opcodesJakub Konka
2021-03-16stage2 llvm bindings: use correct type for LLVMBool for ABI compatTadeo Kondrak
2021-03-14stage2 llvm bindings: rename LLVMBool to BoolTadeo Kondrak
2021-03-08stage2: error union payload must also be a valid variable typeVeikka Tuominen
2021-03-08stage2 cbe: add error union and error union operationsjacob gw
2021-03-08stage2 cbe: non pointer optionalsVeikka Tuominen
2021-03-08stage2 cbe: errorsVeikka Tuominen
2021-03-08stage2 cbe: regular optional typesVeikka Tuominen
2021-03-08stage2 cbe: pointer like optionalsVeikka Tuominen
2021-03-06stage2: implement var argsVeikka Tuominen
2021-03-02stage2: add support for optionals in the LLVM backendTimon Kruiper
We can now codegen optionals! This includes the following instructions: - is_null - is_null_ptr - is_non_null - is_non_null_ptr - optional_payload - optional_payload_ptr - br_void Also includes a test for optionals.
2021-02-24zig fmt src/Andrew Kelley
2021-02-24Merge remote-tracking branch 'origin/master' into ast-memory-layoutAndrew Kelley
2021-02-21Merge pull request #7960 from Luukdegram/wasm-externVeikka Tuominen
stage2: Add support for extern functions for the wasm backend
2021-02-16std: remove io.AutoIndentingStreamIsaac Freund
This type is not widely applicable enough to be a public part of the public interface of the std. The current implementation in only fully utilized by the zig fmt implementation, which could benefit by even tighter integration as will be demonstrated in the next commit. Therefore, move the current io.AutoIndentingStream to lib/std/zig/render.zig. The C backend of the self hosted compiler also use this type currently, but it does not require anywhere near its full complexity. Therefore, implement a greatly simplified version of this interface in src/codegen/c.zig.
2021-02-09stage2 ARM: fix callee_preserved_regsjoachimschmidt557
Previously, the registers included r0, r1, r2, r3 which are not included in the callee saved registers according to the Procedure Call Standard for the ARM Architecture.
2021-02-05Ensure function indices are correct and fix a memory leakLuuk de Gram
2021-02-05Create type declarations for extern functions and write the 'import' sectionLuuk de Gram
2021-02-01Merge pull request #7827 from Snektron/spirv-setupAndrew Kelley
Stage 2: SPIR-V setup
2021-02-01Merge pull request #7895 from Luukdegram/wasm-control-flowAndrew Kelley
stage2: wasm control flow
2021-02-01stage2: reimplement switchVeikka Tuominen
2021-02-01stage2 cbe: implement not and some bitwise opsVeikka Tuominen
2021-02-01stage2 cbe: implement switchbrVeikka Tuominen
2021-02-01stage2 cbe: block resultsVeikka Tuominen
2021-02-01stage2 cbe: condbr and breaksVeikka Tuominen
2021-02-01stage2 cbe: use AutoIndentingStreamVeikka Tuominen
2021-02-01stage2 cbe: loop instructionVeikka Tuominen
2021-01-26Add tests, fix locals that are created in blocks like loops, and handle all ↵Luuk de Gram
breaks correctly
2021-01-25Merge pull request #7846 from LemonBoy/filtertestAndrew Kelley
stage1: don't filter test blocks with empty label