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2022-03-19stage2: add dbg_block_{begin,end} instructionVeikka Tuominen
2022-03-18CBE: add support for tuplesDaniele Cocca
Also promote tests that are now passing.
2022-03-17stage2: implement `@reduce`Andrew Kelley
Notably, Value.eql and Value.hash are improved to treat NaN as equal to itself, so that Type/Value can be hash map keys. Likewise float hashing normalizes the float value before computing the hash.
2022-03-16CBE: better handling of sentineled slices/arraysDaniele Cocca
Adds the sentinel element to the type name to avoid ambiguous declarations, and outputs the sentinel element (if needed) even in what would otherwise be empty arrays.
2022-03-16stage2 llvm: keep track of inlined functionsVeikka Tuominen
2022-03-16Sema: emit dbg_func around inline callsVeikka Tuominen
2022-03-15CBE: fix output of airMinMax()Daniele Cocca
This was trying to output a ternary operator, but the output was broken by the lack of a '?'.
2022-03-14Merge pull request #11143 from jmc-88/cbeAndrew Kelley
CBE: Implement popCount, byteSwap, bitReverse for ints <= 128 bits
2022-03-14CBE: split {clz,ctz,mod,popCount,byteSwap,bitReverse} by typeDaniele Cocca
This also surfaces the fact that clz, ctz and popCount didn't actually support 128 bit integers, despite what was claimed by 226fcd7c709ec664c5d883042cf7beb3026f66cb. This was partially hidden by the fact that the test code for popCount only exercised 128 bit integers in a comptime context. This commit duplicates that test case for runtime ints too.
2022-03-14stage2: rework Value storage of structs and arraysAndrew Kelley
Now they both use `Value.Tag.aggregate`. Additionally the LLVM backend now has implemented lowering of tuple values.
2022-03-14Remove signed_type from zig_{clz,ctz,popcount}Daniele Cocca
This parameter is only currently needed by zig_byte_swap() and zig_bit_reverse(). This commit adds an option to airBuiltinCall() to allow emitting the signedness information only when needed, removing this unused parameter from the other builtins.
2022-03-14Review suggestion: use hasRuntimeBitsIgnoreComptime()Daniele Cocca
This should cover not only integers, as done in 87744a7ea9a2449764a110da4210d7750e3938ee, but also void, enums with a single field, etc... Co-authored-by: Andrew Kelley <andrew@ziglang.org>
2022-03-13CBE: implement popCount, byteSwap, bitReverse for ints <= 128 bitsDaniele Cocca
This folds the airCountZeroes() code from 226fcd7c709ec664c5d883042cf7beb3026f66cb back into airBuiltinCall(), since most of these builtins happen to require the same arguments and can be unified under a common function signature.
2022-03-13CBE: skip 0 bit integers from function signaturesDaniele Cocca
This was already done for void types, and needs to be done for 0 bit integer types as well to align the rendered function signatures with the effective size of extra.data.args_len as seen by airCall().
2022-03-13stage2: add debug info for locals in the LLVM backendAndrew Kelley
Adds 2 new AIR instructions: * dbg_var_ptr * dbg_var_val Sema no longer emits dbg_stmt AIR instructions when strip=true. LLVM backend: fixed lowerPtrToVoid when calling ptrAlignment on the element type is problematic. LLVM backend: fixed alloca instructions improperly getting debug location annotated, causing chaotic debug info behavior. zig_llvm.cpp: fixed incorrect bindings for a function that should use unsigned integers for line and column. A bunch of C test cases regressed because the new dbg_var AIR instructions caused their operands to be alive, exposing latent bugs. Mostly it's just a problem that the C backend lowers mutable and const slices to the same C type, so we need to represent that in the C backend instead of printing two duplicate typedefs.
2022-03-11CBE: implement clz, ctz for ints <= 128 bitsDaniele Cocca
2022-03-11stage2: implement `@shuffle` at runtimeVeikka Tuominen
2022-03-11stage2: passing threadlocal tests for x86_64-linuxAndrew Kelley
* use the real start code for LLVM backend with x86_64-linux - there is still a check for zig_backend after initializing the TLS area to skip some stuff. * introduce new AIR instructions and implement them for the LLVM backend. They are the same as `call` except with a modifier. - call_always_tail - call_never_tail - call_never_inline * LLVM backend calls hasRuntimeBitsIgnoringComptime in more places to avoid unnecessarily depending on comptimeOnly being resolved for some types. * LLVM backend: remove duplicate code for setting linkage and value name. The canonical place for this is in `updateDeclExports`. * LLVM backend: do some assembly template massaging to make `%%` rendered as `%`. More hacks will be needed to make inline assembly catch up with stage1.
2022-03-06stage2: rework `@mulAdd`Andrew Kelley
* mul_add AIR instruction: use `pl_op` instead of `ty_pl`. The type is always the same as the operand; no need to waste bytes redundantly storing the type. * AstGen: use coerced_ty for all the operands except for one which we use to communicate the type. * Sema: use the correct source location for requireRuntimeBlock in handling of `@mulAdd`. * native backends: handle liveness even for the functions that are TODO. * C backend: implement `@mulAdd`. It lowers to libc calls. * LLVM backend: make `@mulAdd` handle all float types. - improved fptrunc and fpext to handle f80 with compiler-rt calls. * Value.mulAdd: handle all float types and use the `@mulAdd` builtin. * behavior tests: revert the changes to testing `@mulAdd`. These changes broke the test coverage, making it only tested at compile-time. Improved f80 support: * std.math.fma handles f80 * move fma functions from freestanding libc to compiler-rt - add __fmax and fmal - make __fmax and fmaq only exported when they don't alias fmal. - make their linkage weak just like the rest of compiler-rt symbols. * removed `longDoubleIsF128` and replaced it with `longDoubleIs` which takes a type as a parameter. The implementation is now more accurate and handles more targets. Similarly, in stage2 the function CTypes.sizeInBits is more accurate for long double for more targets.
2022-03-06stage2: implement `@mulAdd` for scalar floatsJohn Schmidt
2022-03-03stage2: cleanups to wasm memory intrinsicsAndrew Kelley
* AIR: use pl_op instead of ty_pl for wasm_memory_size. No need to store the type because the type is always `u32`. * AstGen: use coerced_ty for `@wasmMemorySize` and `@wasmMemoryGrow` and do the coercions in Sema. * Sema: use more accurate source locations for errors. * Provide more information in the compiler error message. * Codegen: use liveness data to avoid lowering unused `@wasmMemorySize`. * LLVM backend: add implementation - I wasn't able to test it because we are hitting a linker error for `-target wasm32-wasi -fLLVM`. * C backend: use `zig_unimplemented()` instead of silently doing wrong behavior for these builtins. * behavior tests: branch only on stage2_arch for inclusion of the wasm.zig file. We would change it to `builtin.cpu.arch` but that is causing a compiler crash on some backends.
2022-03-03cbe: Implement wasm builtinsLuuk de Gram
This implements the wasm builtins by lowering to builtins that are supported by c-compilers. In this case: Clang. This also simplifies the `AIR` instruction as it now uses the payload field of `ty_pl` and `pl_op` directly to store the index argument rather than storing it inside Extra. This saves us 4 bytes per builtin call.
2022-03-03wasm: Implement `@wasmMemoryGrow` builtinLuuk de Gram
Similarly to the other wasm builtin, this implements the grow variation where the memory index is a comptime known value. The operand as well as the result are runtime values. This also verifies during semantic analysis the target we're building for is wasm, or else emits a compilation error. This means that other backends do not have to handle this AIR instruction, other than the wasm and LLVM backends.
2022-02-28stage2: fix frame_address AIR instructionAndrew Kelley
Various places were assuming different union tags. Now it is consistently a no-op instruction, just like the similar instruction ret_addr.
2022-02-28stage2: implement `@frameAddress`Veikka Tuominen
2022-02-26stage2: implement `@unionInit`Andrew Kelley
The ZIR instruction `union_init_ptr` is renamed to `union_init`. I made it always use by-value semantics for now, not taking the time to invest in result location semantics, in case we decide to change the rules for unions. This way is much simpler. There is a new AIR instruction: union_init. This is for a comptime known tag, runtime-known field value. vector_init is renamed to aggregate_init, which solves a TODO comment.
2022-02-24stage2: implement fieldParentPtrVeikka Tuominen
2022-02-22Merge pull request #10929 from davidmrt98/cbeVeikka Tuominen
stage2: C backend: fix codegen for field_ptr/elem_ptr values
2022-02-19stage2: implement errunion_payload_ptr_setVeikka Tuominen
2022-02-19stage2: correct use of .unwrap_err_union_* in LLVM and C backendVeikka Tuominen
2022-02-19C backend: adjust order of parameters in renderDeclNameDavid Martschenko
2022-02-19C backend: fix codegen for field_ptr/elem_ptr valuesDavid Martschenko
2022-02-19Merge pull request #10924 from ziglang/air-independence-dayAndrew Kelley
AIR independence day
2022-02-18stage2: make AIR not reference ZIR for inline assemblyAndrew Kelley
Instead it stores all the information it needs to into AIR. closes #10784
2022-02-18stage2: Implement `@bitReverse` and `@byteSwap`Cody Tapscott
This change implements the above built-ins for Sema and the LLVM backend. Other backends have had placeholders added for lowering.
2022-02-16Fix 2D array support for C backendCody Tapscott
This updates the C backend to use proper array types. In order to do that, this commit also: - fixes up elem_ptr and field_ptr handling - adds `renderTypecast` (renders in C typecast format, e.g. "int* [10]") - adds a bit special handling for undefined pointers, which is necessary to support slice/elem_ptr to undefined decls
2022-02-16cbe: Add `writeCValueDeref` and small re-factorCody Tapscott
2022-02-09stage2: implement all builtin floatops for f{16,32,64}John Schmidt
- Merge `floatop.zig` and `floatop_stage1.zig` since most tests now pass on stage2. - Add more behavior tests for a bunch of functions.
2022-02-07stage2: implement @sqrt for f{16,32,64}John Schmidt
Support for f128, comptime_float, and c_longdouble require improvements to compiler_rt and will implemented in a later PR. Some of the code in this commit could be made more generic, for instance `llvm.airSqrt` could probably be `llvm.airUnaryMath`, but let's cross that bridge when we get to it.
2022-02-06stage2: add new Decl subtype, ExternFnJakub Konka
`ExternFn` will contain a maybe-lib-name if it was defined with the `extern` keyword like so ```zig extern "c" fn write(usize, usize, usize) usize; ``` `lib_name` will live as long as `ExternFn` decl does.
2022-01-30stage2: implement shl_exact and shr_exactAndrew Kelley
These produce an undefined value when one bits are shifted out. New AIR instruction: shr_exact.
2022-01-25c backend: use an explicit map of reserved identsAndrew Kelley
rather than unconditionally prepending double underscore to all identifiers. Also, use the prefix `zig_e_` instead of `__`. Also, avoid triggering this escaping when rendering an identifier and there has already been a prefix printed.
2022-01-24stage2: rework a lot of stuffAndrew Kelley
AstGen: * rename the known_has_bits flag to known_non_opv to make it better reflect what it actually means. * add a known_comptime_only flag. * make the flags take advantage of identifiers of primitives and the fact that zig has no shadowing. * correct the known_non_opv flag for function bodies. Sema: * Rename `hasCodeGenBits` to `hasRuntimeBits` to better reflect what it does. - This function got a bit more complicated in this commit because of the duality of function bodies: on one hand they have runtime bits, but on the other hand they require being comptime known. * WipAnonDecl now takes a LazySrcDecl parameter and performs the type resolutions that it needs during finish(). * Implement comptime `@ptrToInt`. Codegen: * Improved handling of lowering decl_ref; make it work for comptime-known ptr-to-int values. - This same change had to be made many different times; perhaps we should look into merging the implementations of `genTypedValue` across x86, arm, aarch64, and riscv.
2022-01-24Cleanup unnecessary switches in union logicCody Tapscott
2022-01-24Run `zig fmt`Cody Tapscott
2022-01-24Add `union` support to the C backend.Cody Tapscott
There are some differences vs. the union encoding in the LLVM backend: - Tagged unions with a 0-bit payload do not become their tag type. Instead, they are a struct with an empty `union` as their payload field. - We do not order the `payload`/`tag` storage based on their alignment
2022-01-24Fix rendering of `void` function argsCody Tapscott
2022-01-24Add support for rendering `.enum_numbered`Cody Tapscott
2022-01-24Avoid identifier conflicts with reserved C keywordsCody Tapscott
2022-01-24Add support for rendering `.elem_ptr`Cody Tapscott