| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2020-11-16 | Move leb128 and remove trivial *mem functions as discussed in #5588 (#6876) | tgschultz | |
| * Move leb128 out of debug and remove trivial *mem functions as discussed in #5588 * Turns out one of the *Mem functions was used by MachO. Replaced with trivial use of FixedBufferStream. | |||
| 2020-11-11 | stage2 aarch64: add genCall for aarch64 MachO | Jakub Konka | |
| 2020-11-11 | stage2 aarch64: add .memory prong in genSetReg | Jakub Konka | |
| 2020-11-11 | stage2 ARM: start implementing genCall for ELF + genSetReg immediates | joachimschmidt557 | |
| 2020-11-11 | stage2 aarch64: add more instructions | joachimschmidt557 | |
| 2020-11-11 | Add move wide with zero (movz) instruction | Jakub Konka | |
| 2020-11-11 | Add basic genSetReg for aarch64 | Jakub Konka | |
| 2020-11-11 | Implement genAsm on aarch64 | Jakub Konka | |
| Add remaining PCS info: param and return registers in procedure calls. | |||
| 2020-11-11 | stage2 aarch64: add codegen/aarch64.zig | joachimschmidt557 | |
| 2020-11-07 | stage2 ARM: miscellaneous improvements | joachimschmidt557 | |
| 2020-10-30 | stage2: switch put swap condbr and block | Vexu | |
| condbr is noreturn so having the other way around caused subsequent cases to be eliminated as dead | |||
| 2020-10-30 | stage2: switch ranges and multi item prongs | Vexu | |
| 2020-10-30 | stage2: switch emit zir | Vexu | |
| 2020-10-30 | stage2: basic switch analysis | Vexu | |
| 2020-10-25 | stage2 ARM: genSetStack and genSetReg from stack | joachimschmidt557 | |
| 2020-10-25 | stage2 ARM: enable backpatching return statement | joachimschmidt557 | |
| 2020-10-25 | stage2 ARM: better immediate loading feat. movw and movt | joachimschmidt557 | |
| 2020-10-07 | fixups for the previous commit | Andrew Kelley | |
| * std.fs.File.copyRange and copyRangeAll return u64 instead of usize - the returned value is how much of the `len` is transferred, so the types should match. This removes the need for an `@intCast`. * fix typo that removed a subtraction * Fix the size of codegen.AnyMCValue which gave me a compile error when I tried to build self-hosted for i386-linux. * restore the coercion to u64 of syms_sect.sh_info. We want to make sure the multiplication happens with 64 bits and not the smaller type used by the ELF format. * fix another offset parameter in link/Elf.zig to be u64 instead of usize * add a nice little TODO note to help out Jakub * FmtError already has FileTooBig in it; we just need to return it. | |||
| 2020-10-05 | Turn zig fmt back on in various src/ files | joachimschmidt557 | |
| 2020-10-04 | Merge pull request #6255 from joachimschmidt557/stage2-arm | Andrew Kelley | |
| stage2 ARM: more instructions, return values, parameters | |||
| 2020-10-04 | Redo local symbols and offsets tracking to match Elf's approach | Jakub Konka | |
| 2020-10-04 | Add missing ensureCapacity call in codegen | Jakub Konka | |
| 2020-10-04 | Fix after rebase and enable stage2 tests for macOS | Jakub Konka | |
| Also, rewrites codegen section to store symbol address in a register to then later invoke `callq` on the register. | |||
| 2020-10-02 | stage2 ARM: Add push, pop alias instructions; non-leaf functions | joachimschmidt557 | |
| Non-leaf functions now work. Combined with simple parameters and return types, this allows more complicated programs than Hello World to be correctly compiled. | |||
| 2020-10-02 | stage2 ARM: Add stm, ldm variants and misc. additions | joachimschmidt557 | |
| 2020-10-02 | stage2 ARM: start adding more instructions, return values, parameters | joachimschmidt557 | |
| 2020-09-21 | rename src-self-hosted/ to src/ | Andrew Kelley | |
