| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2023-02-20 | aarch64: alloc new mcv in bitcast if cannot reuse operand | Jakub Konka | |
| 2023-02-20 | x86: alloc new mcv in bitcast if cannot reuse operand | Jakub Konka | |
| Implement missing pointees when ptr is in register. | |||
| 2023-02-19 | implement `writeToMemory`/`readFromMemory` for pointers | Veikka Tuominen | |
| 2023-02-18 | update std lib and compiler sources to new for loop syntax | Andrew Kelley | |
| 2023-02-03 | link: remove `FnData` and make it self-owned | Luuk de Gram | |
| This finishes the work started in #14502 where atoms are owned by the linker themselves. This now makes debug atoms fully owned by dwarf, and no information is left stored on the decl. | |||
| 2023-02-02 | Merge pull request #14502 from ziglang/link-owned-atoms | Jakub Konka | |
| link: move ownership of linker atom from frontend to the linkers | |||
| 2023-02-01 | link: remove union types which are now internal to backends | Jakub Konka | |
| 2023-02-01 | link: make Wasm atoms fully owned by the linker | Luuk de Gram | |
| 2023-02-01 | link: decouple DI atoms from linker atoms, and manage them in Dwarf linker | Jakub Konka | |
| 2023-02-01 | link: make Plan9 atoms fully owned by the linker | Jakub Konka | |
| 2023-01-31 | link: make Coff atoms fully owned by the linker | Jakub Konka | |
| 2023-01-31 | link: make Elf atoms fully owned by the linker | Jakub Konka | |
| 2023-01-31 | wasm: apply request change | Techatrix | |
| 2023-01-31 | wasm: correctly handle optional slices | Techatrix | |
| 2023-01-31 | link: make MachO atoms fully owned by the linker | Jakub Konka | |
| 2023-01-29 | stage2 AArch64: move copy-register-arg-to-stack code to fn prologue | joachimschmidt557 | |
| This enhances the debugging experience as upon encountering a breakpoint in a function, all arguments passed as registers have already been moved to the stack, ready to be inspected by the debugger. | |||
| 2023-01-27 | wasm: migrate to new non-allocateDeclIndexes API | Luuk de Gram | |
| 2023-01-26 | coff: migrate to new non-allocateDeclIndexes API | Jakub Konka | |
| 2023-01-26 | elf: migrate to new non-allocateDeclIndexes API | Jakub Konka | |
| 2023-01-26 | self-hosted: clean up calling logic for x86_64 and aarch64 across linkers | Jakub Konka | |
| 2023-01-26 | macho: completely remove allocateDeclIndexes in favor of linker tracking | Jakub Konka | |
| 2023-01-25 | self-hosted: rename codegen Result.appended to Result.ok | Jakub Konka | |
| 2023-01-25 | self-hosted: remove unused `externally_managed` prong for Decls code | Jakub Konka | |
| 2023-01-22 | stage2 ARM: add basic debug info for locals | joachimschmidt557 | |
| Also disables one behavior test which was failing | |||
| 2023-01-14 | llvm: correctly handle C ABI structs with f32/f64 alignment differences | Veikka Tuominen | |
| Closes #13830 | |||
| 2023-01-14 | add C ABI tests for exotic float types | Veikka Tuominen | |
| 2023-01-03 | stage2 AArch64: bump up alignment of stack items fitting in regs | joachimschmidt557 | |
| This enables us to use more efficient loading and storing for these small stack items | |||
| 2022-12-31 | Merge pull request #14130 from Vexu/debug-info | Veikka Tuominen | |
| Debug info fixes | |||
| 2022-12-30 | x86_64: remove extra whitespace | Manlio Perillo | |
| Remove extra whitespace at the end of a line in Emit.zig, in regions where zig fmt is off. | |||
| 2022-12-30 | fix generic function arg debug info referencing wrong parameter | Veikka Tuominen | |
| Closes #14123 | |||
| 2022-12-29 | stage2 AArch64: implement errUnion{Err,Payload} for registers | joachimschmidt557 | |
| 2022-12-27 | stage2 AArch64: implement field_parent_ptr | joachimschmidt557 | |
| 2022-12-27 | stage2 AArch64: unify callee-preserved regs on all targets | joachimschmidt557 | |
| also enables many passing behavior tests | |||
| 2022-12-21 | wasm: refactor extended instructions | Luuk de Gram | |
| The extended instructions starting with opcode `0xFC` are refactored to make the work the same as the SIMD instructions. This means a `Mir` instruction no longer contains a field 'secondary'. Instead, we use the `payload` field to store the index into the extra list which contains the extended opcode value. In case of instructions such as 'memory.fill' which also have an immediate value, such values will also be stored in the extra list right after the instruction itself. This makes each `Mir` instruction smaller. | |||
| 2022-12-20 | llvm: fix C ABI for <=256 bit vectors | Veikka Tuominen | |
| Closes #13918 | |||
| 2022-12-18 | Merge pull request #13914 from Vexu/variadic | Andrew Kelley | |
| implement defining C variadic functions | |||
| 2022-12-17 | std.builtin: rename Type.UnionField and Type.StructField's field_type to type | r00ster91 | |
| 2022-12-17 | implement defining C variadic functions | Veikka Tuominen | |
| 2022-12-15 | port packed vector elem ptr logic from stage1 | Veikka Tuominen | |
| Closes #12812 Closes #13925 | |||
| 2022-12-13 | Merge pull request #13907 from Vexu/call-merge | Andrew Kelley | |
| Remove `stack` option from `@call` | |||
| 2022-12-13 | remove `stack` option from `@call` | Veikka Tuominen | |
| 2022-12-12 | wasm: `splat` for vector elements divisible by 8 | Luuk de Gram | |
| This implements `@splat` for vectors where the element type is divisible by 8 and a power of two. This is fairly simple as we can store the values directly within the virtual stack. But for all other sizes, we must first shift and bitwise-or the values before we can store them to fit them like a packed-struct, rather than an array. | |||
| 2022-12-12 | wasm: implement the 'splat' instruction part 1 | Luuk de Gram | |
| This implements `airSplat` for the native WebAssembly backend when the features 'simd128' or 'relaxed-simd' are enabled. The commit supports splat where the value lives in the linear memory segment, as well as on the stack. This saves a lot of instruction cost. When it detects the element type is not 8, 16, 32 or 64 bits, the backend will instead use the same strategy as if the features where disabled. | |||
| 2022-12-12 | wasm: load+store simd immediate values | Luuk de Gram | |
| This implements loading and storing immediate values representing a vector with exactly 128 bits. When the vector does not equal to 128 bits, or when the simd128 or relaxed-simd features are disabled the value will be treated as an array instead. | |||
| 2022-12-10 | stage2: sparc64: Implement airMinMax | Koakuma | |
| 2022-12-10 | stage2: sparc64: Implement airBitReverse | Koakuma | |
| 2022-12-10 | stage2: sparc64: Add more types for genTypedValue | Koakuma | |
| 2022-12-10 | stage2: sparc64: Log generated function name for debug purposes | Koakuma | |
| 2022-12-10 | stage2: sparc64: Implement atomic ops | Koakuma | |
| 2022-12-10 | stage2: sparc64: Implement stack argument | Koakuma | |
 |
index : zig | |
| General-purpose programming language and toolchain for maintaining robust, optimal, and reusable software. https://ziglang.org |
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