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path: root/src/arch/x86_64/CodeGen.zig
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2022-03-11stage2 regalloc: replace Register.allocIndex with generic indexOfRegjoachimschmidt557
* callee_preserved_regs and other ABI-specific information have been moved to the respective abi.zig files
2022-03-11stage2: implement `@shuffle` at runtimeVeikka Tuominen
2022-03-11stage2: passing threadlocal tests for x86_64-linuxAndrew Kelley
* use the real start code for LLVM backend with x86_64-linux - there is still a check for zig_backend after initializing the TLS area to skip some stuff. * introduce new AIR instructions and implement them for the LLVM backend. They are the same as `call` except with a modifier. - call_always_tail - call_never_tail - call_never_inline * LLVM backend calls hasRuntimeBitsIgnoringComptime in more places to avoid unnecessarily depending on comptimeOnly being resolved for some types. * LLVM backend: remove duplicate code for setting linkage and value name. The canonical place for this is in `updateDeclExports`. * LLVM backend: do some assembly template massaging to make `%%` rendered as `%`. More hacks will be needed to make inline assembly catch up with stage1.
2022-03-06stage2: rework `@mulAdd`Andrew Kelley
* mul_add AIR instruction: use `pl_op` instead of `ty_pl`. The type is always the same as the operand; no need to waste bytes redundantly storing the type. * AstGen: use coerced_ty for all the operands except for one which we use to communicate the type. * Sema: use the correct source location for requireRuntimeBlock in handling of `@mulAdd`. * native backends: handle liveness even for the functions that are TODO. * C backend: implement `@mulAdd`. It lowers to libc calls. * LLVM backend: make `@mulAdd` handle all float types. - improved fptrunc and fpext to handle f80 with compiler-rt calls. * Value.mulAdd: handle all float types and use the `@mulAdd` builtin. * behavior tests: revert the changes to testing `@mulAdd`. These changes broke the test coverage, making it only tested at compile-time. Improved f80 support: * std.math.fma handles f80 * move fma functions from freestanding libc to compiler-rt - add __fmax and fmal - make __fmax and fmaq only exported when they don't alias fmal. - make their linkage weak just like the rest of compiler-rt symbols. * removed `longDoubleIsF128` and replaced it with `longDoubleIs` which takes a type as a parameter. The implementation is now more accurate and handles more targets. Similarly, in stage2 the function CTypes.sizeInBits is more accurate for long double for more targets.
2022-03-06stage2: implement `@mulAdd` for scalar floatsJohn Schmidt
2022-03-06x64: fix (un)wrapping error unions + refactorJakub Konka
2022-03-03wasm: Implement `@wasmMemoryGrow` builtinLuuk de Gram
Similarly to the other wasm builtin, this implements the grow variation where the memory index is a comptime known value. The operand as well as the result are runtime values. This also verifies during semantic analysis the target we're building for is wasm, or else emits a compilation error. This means that other backends do not have to handle this AIR instruction, other than the wasm and LLVM backends.
2022-03-02codegen: handle elem_ptr when lowering to memoryJakub Konka
* x64: handle storing from-to non-stack memory
2022-03-02x64: fix bug in lowering optionals directly to immediateJakub Konka
2022-03-02x64: fix incorrect calc of rdi spill stack loc for backpatchingJakub Konka
2022-03-02x64: fix intCast to properly clear out dest registerJakub Konka
2022-03-02x64: rectify and add missing optionals bitsJakub Konka
Includes changes/additions to: * `wrap_optional` * `optional_payload` * `isNull` helper
2022-03-01codegen: lower field_ptr to memory across linking backendsJakub Konka
This requires generating an addend for the target relocation as the field pointer might point at a field inner to the container.
2022-03-01x64: fix array to slice implJakub Konka
2022-03-01x64: impl airMemset using inline memsetJakub Konka
2022-03-01x64: impl airMemcpy using inline memcpyJakub Konka
2022-02-28x64: pass more behavior testsJakub Konka
2022-02-28x64: implement get_union_tag for registerJakub Konka
2022-02-28x64: clean up loadMemPtrIntoRegister abstractionJakub Konka
2022-02-28codegen: fix padding calculation for error unions when loweringJakub Konka
* do not track `rdi` register before `call` inst, but instead freeze it from further use, until `call` has been realised * pass more error union tests
2022-02-28x64: impl unwrap_errunion_payload and unwrap_errunion_err for registerJakub Konka
2022-02-28stage2: fix frame_address AIR instructionAndrew Kelley
Various places were assuming different union tags. Now it is consistently a no-op instruction, just like the similar instruction ret_addr.
2022-02-28stage2: implement `@frameAddress`Veikka Tuominen
2022-02-28x64: fix switch condition mir; pass more union testsJakub Konka
2022-02-28x64: fix store with ABI size > 8 on stack; pass union testsJakub Konka
2022-02-28x64: impl airGetUnionTagJakub Konka
2022-02-28x64: make lowerUnnamedConst a fallthrough conditionJakub Konka
2022-02-28x64: impl airSetUnionTagJakub Konka
2022-02-26stage2: implement `@unionInit`Andrew Kelley
The ZIR instruction `union_init_ptr` is renamed to `union_init`. I made it always use by-value semantics for now, not taking the time to invest in result location semantics, in case we decide to change the rules for unions. This way is much simpler. There is a new AIR instruction: union_init. This is for a comptime known tag, runtime-known field value. vector_init is renamed to aggregate_init, which solves a TODO comment.
2022-02-25x64+aarch64: check for pointer to zero-bit type when lowering declJakub Konka
Unless the pointer is a pointer to a function, if the pointee type has zero-bits, we need to return `MCValue.none` as the `Decl` has not been lowered to memory, and therefore, any GOT reference will be wrong.
2022-02-25aarch64: check if type has runtime bits before allocating mem ptrJakub Konka
2022-02-24stage2: implement fieldParentPtrVeikka Tuominen
2022-02-23x64: account for multiple returns from functionsJakub Konka
This is necessary to correctly adjust for spilling of the %rdi register in the callee.
2022-02-22x64: disable printing results on macos until I fix the linkerJakub Konka
Hopefully, this will make the CI green, and in the meantime I can fix the bugs in the MachO linker.
2022-02-22x64: spill compare flags between blocks, extern calls, and cmp instsJakub Konka
This is just the first step towards the final solution as to get here I had omit a safety assert check in `getResolvedInst` helper.
2022-02-22x64: add naive impl of else in switchJakub Konka
2022-02-22x64: fix lowering of error unions (we didn't pad to alignment)Jakub Konka
* fix returning large values on stack from procedure calls - we need to explicitly specify source and dest base registers for `genSetStack` as well
2022-02-22x64: add basic, naive impl of switchJakub Konka
2022-02-22x64: add basic impl of shl for integersJakub Konka
2022-02-22x64: add basic impl of minimum builtin for intsJakub Konka
2022-02-22x64: implement unwrap_err_payload and unwrap_err_err for stack offsetJakub Konka
2022-02-22codegen: lower error_set and error_unionJakub Konka
2022-02-22x64: recover address in rdi if was spilledJakub Konka
2022-02-22x64: pass pointer to stack for return value in .rdi registerJakub Konka
2022-02-22x64: first, really horrible attempt at returning values on stackJakub Konka
2022-02-22x64: reorder resolving call params: return values first, then paramsJakub Konka
2022-02-22x64: sub is non-commutativeJakub Konka
2022-02-21Merge pull request #10925 from Vexu/stage2Andrew Kelley
stage2: support anon init through error unions and optionals
2022-02-19stage2: implement errunion_payload_ptr_setVeikka Tuominen
2022-02-19x64: clean up implementation of divs, mod, rem for integersJakub Konka