aboutsummaryrefslogtreecommitdiff
path: root/src/arch/x86_64/CodeGen.zig
AgeCommit message (Collapse)Author
2022-05-03Merge pull request #11571 from ziglang/stage2-test-behaviorAndrew Kelley
progress towards stage2 behavior tests for all targets passing with the LLVM backend
2022-05-03x86_64: use math.zig to check isPowerOfTwo and calc log2_intJakub Konka
2022-05-02stage2: improve inline asm stage1 compatibilityAndrew Kelley
* outputs can have names and be referenced with template replacements the same as inputs. * fix print_air.zig not decoding correctly. * LLVM backend: use a table for template names for simplicity
2022-04-27add new builtin function `@tan`Andrew Kelley
The reason for having `@tan` is that we already have `@sin` and `@cos` because some targets have machine code instructions for them, but in the case that the implementation needs to go into compiler-rt, sin, cos, and tan all share a common dependency which includes a table of data. To avoid duplicating this table of data, we promote tan to become a builtin alongside sin and cos. ZIR: The tag enum is at capacity so this commit moves `field_call_bind_named` to be `extended`. I measured this as one of the least used tags in the zig codebase. Fix libc math suffix for `f32` being wrong in both stage1 and stage2. stage1: add missing libc prefix for float functions.
2022-04-20stage2: use indexes for Decl objectsAndrew Kelley
Rather than allocating Decl objects with an Allocator, we instead allocate them with a SegmentedList. This provides four advantages: * Stable memory so that one thread can access a Decl object while another thread allocates additional Decl objects from this list. * It allows us to use u32 indexes to reference Decl objects rather than pointers, saving memory in Type, Value, and dependency sets. * Using integers to reference Decl objects rather than pointers makes serialization trivial. * It provides a unique integer to be used for anonymous symbol names, avoiding multi-threaded contention on an atomic counter.
2022-04-15stage2: lower u128, and refactor some bits in x64Jakub Konka
2022-04-14stage2: progress towards stage3Andrew Kelley
* The `@bitCast` workaround is removed in favor of `@ptrCast` properly doing element casting for slice element types. This required an enhancement both to stage1 and stage2. * stage1 incorrectly accepts `.{}` instead of `{}`. stage2 code that abused this is fixed. * Make some parameters comptime to support functions in switch expressions (as opposed to making them function pointers). * Avoid relying on local temporaries being mutable. * Workarounds for when stage1 and stage2 disagree on function pointer types. * Workaround recursive formatting bug with a `@panic("TODO")`. * Remove unreachable `else` prongs for some inferred error sets. All in effort towards #89.
2022-04-13macho,x64: resolve debug info relocs for RIP-based addressingJakub Konka
Sometimes we will want to generate debug info for a constant that has been lowered to memory and not copied anywhere else. For this we will need to defer resolution on PIE platforms until all locals (including GOT entries) have been allocated.
2022-04-13stage2,x64: deref memory if referenced via GOT for local varsJakub Konka
2022-04-13stage2,x64: generate debug info for local vars at hardcoded mem addrJakub Konka
2022-04-13stage2,x64: recursively mark decls as alive when loweringJakub Konka
2022-04-12Liveness: modify encoding to support over 32 operandsAndrew Kelley
Prior to this, Liveness encoded `asm`, `call`, and `aggregate_init` with a single 32-bit integer, allowing up to 35 operands (3 are provided by the regular tomb_bits). However, the Zig language allows function calls with more than 35 arguments, inline assembly with more than 35 inputs, and anonymous tuples with more than 35 elements. The new encoding stores an index to the extra array instead of the bits directly, and then as many extra elements as needed to encode all the operands. The MSB is used as a flag to tell which element is the last one, allowing for 31 bits per element. Prior to this, print_air did not bother correctly printing tombstones for these instructions; now it does. In addition to updating the BigTomb iteration logic in the machine code backends, this commit extracts the common logic into the Liveness namespace.
2022-04-07Liveness: utilize Air.refToIndexAndrew Kelley
2022-04-04dwarf: emit debug info for local variables on x86_64Jakub Konka
Add support for emitting debug info for local variables within a subprogram. This required moving bits responsible for populating the debug info back to `CodeGen` from `Emit` as we require the operand to be resolved at callsite plus we need to know its type. Without enforcing this, we could end up with a `dead` mcv.
2022-04-01x64: implement add/sub with wrapping and xor opJakub Konka
2022-03-31stage2: handle assembly input namesVeikka Tuominen
2022-03-30Merge pull request #11342 from ziglang/stage2-x64-mul-divJakub Konka
x64: use all available registers (caller and callee), and fix how we multiply (fixes @mulWithOverflow for byte-size operands)
2022-03-29stage2: implement `@intToError` with safetyAndrew Kelley
This commit introduces a new AIR instruction `cmp_lt_errors_len`. It's specific to this use case for two reasons: * The total number of errors is not stable during semantic analysis; it can only be reliably checked when flush() is called. So the backend that is lowering the instruction must emit a relocation of some kind and then populate it during flush(). * The fewer AIR instructions in memory, the better for compiler performance, so we squish complex meanings into AIR tags without hesitation. The instruction is implemented only in the LLVM backend so far. It does this by creating a simple function which is gutted and re-populated with each flush(). AstGen now uses ResultLoc.coerced_ty for `@intToError` and Sema does the coercion.
2022-03-30x64: spill .rdi to stack if expecting return value saved on stackJakub Konka
Since .rdi is not part of the callee saved registers, it needs to be proactively spilled to the stack so that we don't clobber the return address where to save the return value.
2022-03-30x64: track callee and caller saved registersJakub Konka
This is now required to correctly track and spill registers required for some ops such `mul` or `div` (both required use of `.rax` and `.rdx` registers).
2022-03-30x64: clean up instruction tracking for div/mul opsJakub Konka
2022-03-30x64: redo @mulWithOverflow using rax/rdx based multiplicationJakub Konka
2022-03-30x64: clean up abstraction for generating integer divisionJakub Konka
2022-03-28x64: partially fix genImul, enable overflow testsJakub Konka
2022-03-28x64: implement add, sub and mul with overflowJakub Konka
2022-03-27dwarf: track type relocation state in Dwarf moduleJakub Konka
2022-03-26Merge pull request #11289 from schmee/stage2-selectAndrew Kelley
stage2: implement `@select`
2022-03-25stage2 x86_64: remove MCValue.embedded_in_codejoachimschmidt557
2022-03-25sema: use `pl_op` for `@select`John Schmidt
2022-03-25stage2: implement `@select`John Schmidt
2022-03-24x64: fix for 32bit buildsJakub Konka
2022-03-24x64: account for signed ints in struct_field_val when struct fits in a registerJakub Konka
2022-03-24x64: fix struct_field_val for structs fitting in registerJakub Konka
2022-03-24x64: implement aggregate_init for arraysJakub Konka
2022-03-24x64: implement aggregate_init for structsJakub Konka
2022-03-22stage2: lazy `@alignOf`Andrew Kelley
Add a `target` parameter to every function that deals with Type and Value.
2022-03-21stage2: add AIR instruction `cmp_vector`William Sengir
The existing `cmp_*` instructions get their result type from `lhs`, but vector comparison will always return a vector of bools with only the length derived from its operands. This necessitates the creation of a new AIR instruction.
2022-03-21Merge pull request #11195 from mparadinha/float-to-intJakub Konka
stage2: x86_64: implement `@floatToInt` for `f32` and `f64`
2022-03-21x64: refactor fix reg aliasing in genSetRegJakub Konka
2022-03-21stage2: x86_64: use correct register size when loading things from memorymparadinha
2022-03-21stage2: x86_64: implement `ptr_elem_val`mparadinha
The codegen for this is almost identical to `ptr_elem_ptr` except there's an extra `mov` at the end to replace the pointer with the value it points to, "in-place" (which can be done in a single instruction without any extra registers).
2022-03-21stage2: add way to print values with typesVeikka Tuominen
2022-03-19stage2: add dbg_block_{begin,end} instructionVeikka Tuominen
2022-03-17stage2: implement `@reduce`Andrew Kelley
Notably, Value.eql and Value.hash are improved to treat NaN as equal to itself, so that Type/Value can be hash map keys. Likewise float hashing normalizes the float value before computing the hash.
2022-03-16stage2: x86_64: floatToInt for f32 and f64mparadinha
2022-03-16stage2 llvm: keep track of inlined functionsVeikka Tuominen
2022-03-16Sema: emit dbg_func around inline callsVeikka Tuominen
2022-03-13stage2: add debug info for locals in the LLVM backendAndrew Kelley
Adds 2 new AIR instructions: * dbg_var_ptr * dbg_var_val Sema no longer emits dbg_stmt AIR instructions when strip=true. LLVM backend: fixed lowerPtrToVoid when calling ptrAlignment on the element type is problematic. LLVM backend: fixed alloca instructions improperly getting debug location annotated, causing chaotic debug info behavior. zig_llvm.cpp: fixed incorrect bindings for a function that should use unsigned integers for line and column. A bunch of C test cases regressed because the new dbg_var AIR instructions caused their operands to be alive, exposing latent bugs. Mostly it's just a problem that the C backend lowers mutable and const slices to the same C type, so we need to represent that in the C backend instead of printing two duplicate typedefs.
2022-03-12stage2 x86_64: Fix assertion in getResolvedInstValuejoachimschmidt557
2022-03-11Merge pull request #11120 from Vexu/stage2Andrew Kelley
Stage2: make std.rand tests pass