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Age	Commit message (Expand)	Author
2021-04-01	stage2: implement structs in the frontend	Andrew Kelley
2021-04-01	stage2: implement struct init syntax with ptr result loc	Andrew Kelley
2021-03-31	stage2: finish implementation of LazySrcLoc	Andrew Kelley
2021-03-31	stage2: finish source location reworkings in the branch	Andrew Kelley
2021-03-31	astgen: improved handling of coercion	Andrew Kelley
2021-03-29	Sema: implement switch expressions	Andrew Kelley
2021-03-28	stage2: guidance on how to implement switch expressions	Andrew Kelley
2021-03-28	stage2: fix error sets	Andrew Kelley
2021-03-28	stage2: implement sema for @errorToInt and @intToError	jacob gw
2021-03-28	AstGen: pass GenZir as the first arg, not Module	Isaac Freund
2021-03-28	AstGen: scope result location related functions	Isaac Freund
2021-03-28	stage2: rename WipZirCode => AstGen, astgen.zig => AstGen.zig	Isaac Freund
2021-03-26	stage2: implement bitwise expr and error literals	Andrew Kelley
2021-03-26	stage2: implement source location: .node_offset_var_decl_ty	Andrew Kelley
2021-03-25	stage2: improve source locations of Decl access	Andrew Kelley
2021-03-25	stage2: implement inline while	Andrew Kelley
2021-03-24	stage2: clean up break / noreturn astgen	Andrew Kelley
2021-03-24	astgen: implement breaking from a block	Timon Kruiper
2021-03-24	stage2: fix memory leak when updating a function	Andrew Kelley
2021-03-24	stage2: further cleanups regarding zir.Inst.Ref	Andrew Kelley
2021-03-24	stage2: make zir.Inst.Ref a non-exhaustive enum	Isaac Freund
2021-03-23	stage2: comment out failing test cases; implement more things	Andrew Kelley
2021-03-23	stage2: fix while loops	Andrew Kelley
2021-03-23	astgen: fixups regarding var decls and rl_ptr	Andrew Kelley
2021-03-23	stage2: implement inttype ZIR	Andrew Kelley
2021-03-23	stage2: fix comptimeExpr and comptime function calls	Andrew Kelley
2021-03-23	stage2: add helper functions to clean up astgen Ref/Index	Andrew Kelley
2021-03-23	stage2: fix two return types to be Ref not Index	Isaac Freund
2021-03-22	stage2: fix `if` expressions	Andrew Kelley
2021-03-22	astgen: improve the ensure_unused_result elision	Andrew Kelley
2021-03-22	stage2: Sema improvements and boolean logic astgen	Andrew Kelley
2021-03-23	stage2: remove all async related code	Isaac Freund
2021-03-22	fix calculation in ensureCapacity	Dimenus
2021-03-22	astgen: implement array types	Isaac Freund
2021-03-21	Sema: implement arithmetic	Andrew Kelley
2021-03-22	astgen: implement bool_and/bool_or	Isaac Freund
2021-03-21	zir: add negate/negate_wrap, implement astgen	Isaac Freund
2021-03-20	stage2: fix memory management of ZIR code	Andrew Kelley
2021-03-20	astgen: implement inline assembly	Andrew Kelley
2021-03-20	astgen: implement function calls	Andrew Kelley
2021-03-19	astgen: support blocks	Andrew Kelley
2021-03-19	stage2: first pass at repairing ZIR printing	Andrew Kelley
2021-03-19	Sema: allocate inst_map with arena where appropriate	Andrew Kelley
2021-03-19	stage2: fix some math oopsies and typos	Andrew Kelley
2021-03-19	stage2: fix export source locations not being relative to Decl	Andrew Kelley
2021-03-19	llvm backend: use new srcloc	jacob gw
2021-03-19	zir-memory-layout: astgen: fill in identifier	jacob gw
2021-03-18	stage2: the code is compiling again	Andrew Kelley
2021-03-18	stage2: get Module and Sema compiling again	Andrew Kelley
2021-03-17	stage2: Module and Sema are compiling again	Andrew Kelley