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2021-03-31astgen: improved handling of coercionAndrew Kelley
GenZir struct now has rl_ty_inst field which tracks the result location type (if any) a block expects all of its results to be coerced to. Remove a redundant coercion on const local initialization with a specified type. Switch expressions, during elision of store_to_block_ptr instructions, now re-purpose them to be type coercion when the block has a type in the result location.
2021-03-31Sema: implement switch validation for rangesAndrew Kelley
2021-03-31AstGen: improve switch expressionsAndrew Kelley
* use the proper result location strategy even when there are noreturn prongs in the switch expression * when using break_operand strategy, actually omit the store_to_block_ptr instructions rather than eliding them. * for both strategies, properly handle noreturn prongs.
2021-03-30AstGen: switch expressions properly handle result locationsAndrew Kelley
2021-03-30stage2: rework AstGen for switch expressionsAndrew Kelley
The switch_br ZIR instructions are now switch_block instructions. This avoids a pointless block always surrounding a switchbr in emitted ZIR code. Introduce typeof_elem ZIR instruction for getting the type of the element of a pointer value in 1 instruction. Change typeof to be un_node, not un_tok. Introduce switch_capture ZIR instructions for obtaining the capture value of switch prongs. Introduce Sema.resolveBody for when you want to extract a *Inst out of a block and you know that there is only going to be 1 break from it. What's not working yet: AstGen does not correctly elide store instructions when it turns out that the result location does not need to be used as a pointer. Also Sema validation code for duplicate switch items is not yet implemented.
2021-03-29Sema: implement switch expressionsAndrew Kelley
The logic for putting ranges into the else prong is moved from AstGen to Sema. However, logic to emit multi-items the same as single-items cannot be done until TZIR supports mapping multiple items to the same block of code. This will be simple to represent when we do the upcoming TZIR memory layout changes. Not yet implemented in this commit is the validation of duplicate values. The trick is going to be emitting error messages with accurate source locations, without adding extra source nodes to the ZIR switch instruction. This will be done by computing the respective AST node based on the switch node (which we do have available), only when a compile error occurs and we need to know the source location to attach the message to.
2021-03-28stage2: guidance on how to implement switch expressionsAndrew Kelley
Here's what I think the ZIR should be. AstGen is not yet implemented to match this, and the main implementation of analyzeSwitch in Sema is not yet implemented to match it either. Here are some example byte size reductions from master branch, with the ZIR memory layout from this commit: ``` switch (foo) { a => 1, b => 2, c => 3, d => 4, } ``` 184 bytes (master) => 40 bytes (this branch) ``` switch (foo) { a, b => 1, c..d, e, f => 2, g => 3, else => 4, } ``` 240 bytes (master) => 80 bytes (this branch)
2021-03-28stage2: fix error setsAndrew Kelley
2021-03-28stage2: implement sema for @errorToInt and @intToErrorjacob gw
2021-03-28AstGen: pass *GenZir as the first arg, not *ModuleIsaac Freund
This avoids the unnecessary scope.getGenZir() virtual call for both convenience and performance.
2021-03-28AstGen: scope result location related functionsIsaac Freund
2021-03-28stage2: rename WipZirCode => AstGen, astgen.zig => AstGen.zigIsaac Freund