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2022-07-28std: rename std.Target.systemz to .s390xMeghan Denny
2022-07-01update CPU features to LLVM 14Andrew Kelley
Notable changes: `_i386`, `_i486`, and `_i686` are renamed to `i386`, `i486`, and `i686` respectively. `std.zig.fmtId` is enhanced to support formatting `i386` as `@"i386"`. Some CPU features which are actually CPU models have been properly flattened, such as `apple_a12`, `apple_a13`, `apple_a7`, `cortex_a78c`, `exynos_m4`, `neoverse_e1`, `neoverse_n1`, `neoverse_n2`, `neoverse_v1`. Some CPU features have been added and some have been removed, following LLVM's lead. CSky CPU features support is added.
2021-08-15update target CPU features with LLVM 13 rc1 dataAndrew Kelley
2021-08-12compiler-rt: do not depend on `usingnamespace`Andrew Kelley
The idea is to depend on this language feature as little as possible with the hopes that it can be adjusted to be less of an anti-pattern. This also helps self-hosted, which does not yet implement `usingnamespace`, get closer to being able to build compiler-rt.
2021-06-17Fix `lakemont` CpuModel (#9099)d18g
Lakemont has no x86, no MMX, no SSE and no way of handling any fp-math. In theory LLVM is able to implicitly use the soft-float emulation library calls to legalize any such operation but, given Zig's use of many non-standard features, sometimes we hit a weak spot in the X86 codegen backend. Consider this as a work-around for this LLVM problem, fixing the problem in LLVM is not so high in my todo list as the target is pretty niche and Intel axed it in '19. (Commit message by @LemonBoy)
2021-05-20Run `zig fmt` on src/ and lib/std/Isaac Freund
This replaces callconv(.Inline) with the more idiomatic inline keyword.
2021-05-14SPIR-V: Add generated SPIR-V featuresRobin Voetter
2021-05-03std: Add two more ARM CPUs to the known CPU listLemonBoy
Modeled after GCC's description.
2021-04-20target: drop `ppc32` and prefer `ppc`Michael Dusan
- original PR #7949 (incorrectly) patched a generated-file and changes have subsequently been lost/overwritten - fix #7947 in a different way: drop `ppc32` because `ppc` already exists
2021-02-27update ARM target CPU featuresAndrew Kelley
This completes the process. All target CPU features are now auto-generated by the tools/update_cpu_features.zig script, which contains all the overrides. Invoking this tool against LLVM 12rc2 now produces an empty git diff.
2021-02-27tools/update_cpu_features: add a "flatten" featureAndrew Kelley
and use it to clean up aarch64 target CPU features
2021-02-27tools/update_cpu_features: better patching APIAndrew Kelley
With this change, added & modified cpus & features participate in the same pruning system, and sorting takes into account the zig name, not the pre-modified llvm name. The modified target files in this commit are due to the improved sorting and pruning. The script now fully supports extra cpus & features.
2021-02-27update amdgpu target CPU featuresAndrew Kelley
2021-02-27update RISC-V target CPU featuresAndrew Kelley
2021-02-27update most target CPU features to llvm12Andrew Kelley
The tools/update_cpu_features script is coming along, and generates correct information for all these targets. The remaining targets are: * arm * aarch64 * amdgpu * riscv I will commit them once the issues with the updater tool are resolved.
2021-02-27update x86 CPU featuresAndrew Kelley
2021-02-25Merge remote-tracking branch 'origin/master' into llvm12Andrew Kelley
Conflicts: * src/clang.zig * src/llvm.zig - this file got moved to src/llvm/bindings.zig in master branch so I had to put the new LLVM arch/os enum tags into it. * lib/std/target.zig, src/stage1/target.cpp - haiku had an inconsistency with its default target ABI, gnu vs eabi. In this commit we make it gnu in both places to match the latest changes by @hoanga. * src/translate_c.zig
2021-02-04target: map zig ppc32 → llvm ppcMichael Dusan
- llvm does not accept `ppc32` as a CPU type closes #7947
2020-12-31Year++Frank Denis
2020-12-16update the CPU target features and modelsAndrew Kelley
Rather than directly pasting the output from the target-details-generator tool, we have to look at the diff line by line and decide how to incorporate the changes. The baseline abstraction is something that Zig provides. The changes to x86 appear to be incorrect. After LLVM commit 3ad09fd03c51823aeb0bcbd7898aada33e9228d6 the CPU features are stored in a different data layout in their tables, and so we need to update the target details extraction tool to match.
2020-12-16Update target detailsJakub Konka
llvm commit b2851aea80e5a8f0cfd6c3c5a56a6b00fb28c6b6 zig-llvm-target-details-generator commit 4299674ecabeb668b0d84285cd1b41a652a391b1
2020-10-24Use correct names for generic SPARC targetsKoakuma
LLVM calls generic sparc32 CPUs "v8" and generic sparc64 CPUs "v9".
2020-08-21Merge remote-tracking branch 'origin/master' into llvm11Andrew Kelley
2020-08-20add license header to all std lib filesAndrew Kelley
add SPDX license identifier copyright ownership is zig contributors
2020-08-18Merge remote-tracking branch 'origin/master' into llvm11Andrew Kelley
2020-08-13Add "ppc" prefix to number-modeled CPUs (#6006)Koakuma
This is to prevent "expected token 'Symbol', found 'IntLiteral'" errors when building zig files.
2020-08-04update target CPU features from llvm 10 to 11rc1Andrew Kelley
2020-07-11use typeInfo instead of hardcoded tables in std.TargetVexu
2020-06-12Add strict_align to pre-v6 ARM targetsCarter Sande
This matches GCC's and Clang's default behavior for these targets.
2020-03-03Merge remote-tracking branch 'origin/master' into llvm10Andrew Kelley
2020-02-26arm baseline CPU is v7a rather than v6mAndrew Kelley
v6m is thumb-mode and the baseline should probably be an 'a' variant.
2020-02-25Merge remote-tracking branch 'origin/master' into llvm10Andrew Kelley
2020-02-21update ARM cpu models to correctly include the sub-archAndrew Kelley
2020-02-20arm: clarify which CPU features are sub-architecturesAndrew Kelley
versus which ones are instruction sets.
2020-02-20Revert "arm: clean up the messy sub-architecture & CPU features"Andrew Kelley
This reverts commit 96f45c27b65307fe4abd5d1fb1cf314b1f493d8e.
2020-02-19remove the concept of "sub-architecture"Andrew Kelley
in favor of CPU features. Also rearrange the `std.Target` data structure. * note: `@import("builtin")` was already deprecated in favor of `@import("std").builtin`. * `std.builtin.arch` is now deprecated in favor of `std.builtin.cpu.arch`. * `std.Target.CpuFeatures.Cpu` is now `std.Target.Cpu.Model`. * `std.Target.CpuFeatures` is now `std.Target.Cpu`. * `std.Target` no longer has an `arch` field. Instead it has a `cpu` field, which has `arch`, `model`, and `features`. * `std.Target` no longer has a `cpu_features` field. * `std.Target.Arch` is moved to `std.Target.Cpu.Arch` and it is an enum instead of a tagged union. * `std.Target.parseOs` is moved to `std.Target.Os.parse`. * `std.Target.parseAbi` is moved to `std.Target.Abi.parse`. * `std.Target.parseArchSub` is only for arch now and moved to `std.Target.Cpu.Arch.parse`. * `std.Target.parse` is improved to accept CPU name and features. * `std.Target.Arch.getBaselineCpuFeatures` is moved to `std.Target.Cpu.baseline`. * `std.Target.allCpus` is renamed to `std.Target.allCpuModels`. * `std.Target.defaultAbi` is moved to `std.Target.Abi.default`. * Significant cleanup of aarch64 and arm CPU features, resulting in the needed bit count for cpu feature set going from 174 to 138. * Add `std.Target.Cpu.Feature.Set.addFeatureSet` for merging feature sets together. `-target-feature` and `-target-cpu` are removed in favor of `-mcpu`, to conform to established conventions, and it gains additional power to support cpu features. The syntax is: -mcpu=name+on1+on2-off1-off2 closes #4261
2020-02-19arm: clean up the messy sub-architecture & CPU featuresAndrew Kelley
2020-02-19clean up arm CPU featuresAndrew Kelley
* remove "cpu features" that are actually just processors * rename `v8` to `v8a`. this matches the corresponding change to target/aarch64.zig * rename types in preparation for removing sub-architecture from `std.Target`. I have other files changed in my dirty working tree, but about to make some changes to arm.zig that I don't want batched with this commit.
2020-02-17enable behavior and std lib tests for RISC-V 64-bitAndrew Kelley
closes #3338
2020-02-14Merge remote-tracking branch 'origin/master' into llvm10Andrew Kelley
2020-02-11riscv: Remove 'relax' from the baseline cpu featuresLemonBoy
LLD doesn't implement relaxations at the moment.
2020-02-04re-apply: these are not real CPU featuresAndrew Kelley
The commit 70ee818d21c44ec0031b997916694327eb9fc37f (update target CPUs and features with llvm10's data) accidentally reverted 6793af8d8b370cefc0a1fccbcf1c9fd1a24c7378. This un-reverts it.
2020-01-30set llvm cpu features to null for exynosm1,exynosm2Andrew Kelley
llvm dropped support for these features
2020-01-30update target CPUs and features with llvm10's dataAndrew Kelley
based on zig-llvm-target-details-generator commit 3aef1b9b4415ed3acfaea4ce8bc233e213548f71
2020-01-23fix incorrect list of sub-arches for aarch64Andrew Kelley
tests use older sub-arch that works in the older qemu
2020-01-23use an older arm64 sub-arch for test suiteAndrew Kelley
hopefully this avoids the older qemu version crashing
2020-01-22aarch64: less feature-full baseline CPUAndrew Kelley
2020-01-22std.Target.CpuFeatures is now a struct with both CPU and feature setAndrew Kelley
Previously it was a tagged union which was one of: * baseline * a specific CPU * a set of features Now, it's possible to have a CPU but also modify the CPU's feature set on top of that. This is closer to what LLVM does. This is more correct because Zig's notion of CPUs (and LLVM's) is not exact CPU models. For example "skylake" is not one very specific model; there are several different pieces of hardware that match "skylake" that have different feature sets enabled.
2020-01-21lazily compute the full cpu features dependenciesAndrew Kelley
2020-01-21hit a comptime limitation with computing dense setsAndrew Kelley
generated by cgit v1.2.3 (git 2.39.1) at 2025-12-29 00:08:50 +0000