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Closes #21818.
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This will mainly be used when targeting our wasm2c implementation which has no
problem with zero-length bulk memory operations, as a non-standard extension.
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See: https://github.com/WebAssembly/tool-conventions/pull/235
This is not *quite* using the same features as the spec'd lime1 model because
LLVM 19 doesn't have the level of feature granularity that we need for that.
This will be fixed once we upgrade to LLVM 20.
Part of #21818.
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Most of this commit is whitespace changes, moving to use RLS
for assigning the `CpuModel`
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The compiler actually doesn't need any functional changes for this: Sema
does reification based on the tag indices of `std.builtin.Type` already!
So, no zig1.wasm update is necessary.
This change is necessary to disallow name clashes between fields and
decls on a type, which is a prerequisite of #9938.
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From https://ziglang.org/documentation/master/#Names:
> If `x` is callable, and `x`'s return type is `type`, then `x` should
> be `TitleCase`.
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release/18.x branch, commit 78b99c73ee4b96fe9ce0e294d4632326afb2db42
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