1 files changed, 63 insertions, 10 deletions
diff --git a/src/target.zig b/src/target.zig
index ec34a23f0d..1f8a567f03 100644
--- a/src/target.zig
+++ b/src/target.zig
@@ -436,35 +436,88 @@ pub fn llvmMachineAbi(target: std.Target) ?[:0]const u8 {
     }
 }
 
-/// This function returns 1 if function alignment is not observable or settable.
+/// This function returns 1 if function alignment is not observable or settable. Note that this
+/// value will not necessarily match the backend's default function alignment (e.g. for LLVM).
 pub fn defaultFunctionAlignment(target: std.Target) Alignment {
+    // Overrides of the minimum for performance.
     return switch (target.cpu.arch) {
-        .arm, .armeb => .@"4",
-        .aarch64, .aarch64_be => .@"4",
-        .sparc, .sparc64 => .@"4",
-        .riscv64 => .@"2",
-        else => .@"1",
+        .csky,
+        .thumb,
+        .thumbeb,
+        .xcore,
+        => .@"4",
+        .aarch64,
+        .aarch64_be,
+        .hexagon,
+        .powerpc,
+        .powerpcle,
+        .powerpc64,
+        .powerpc64le,
+        .s390x,
+        .x86,
+        .x86_64,
+        => .@"16",
+        .loongarch32,
+        .loongarch64,
+        => .@"32",
+        else => minFunctionAlignment(target),
     };
 }
 
+/// This function returns 1 if function alignment is not observable or settable.
 pub fn minFunctionAlignment(target: std.Target) Alignment {
     return switch (target.cpu.arch) {
+        .riscv32,
+        .riscv64,
+        => if (std.Target.riscv.featureSetHasAny(target.cpu.features, .{ .c, .zca })) .@"2" else .@"4",
+        .thumb,
+        .thumbeb,
+        .csky,
+        .m68k,
+        .msp430,
+        .s390x,
+        .xcore,
+        => .@"2",
+        .arc,
         .arm,
         .armeb,
         .aarch64,
         .aarch64_be,
-        .riscv32,
-        .riscv64,
+        .hexagon,
+        .lanai,
+        .loongarch32,
+        .loongarch64,
+        .mips,
+        .mipsel,
+        .powerpc,
+        .powerpcle,
+        .powerpc64,
+        .powerpc64le,
         .sparc,
         .sparc64,
-        => .@"2",
+        .xtensa,
+        => .@"4",
+        .bpfel,
+        .bpfeb,
+        .mips64,
+        .mips64el,
+        => .@"8",
+        .ve,
+        => .@"16",
         else => .@"1",
     };
 }
 
 pub fn supportsFunctionAlignment(target: std.Target) bool {
     return switch (target.cpu.arch) {
-        .wasm32, .wasm64 => false,
+        .nvptx,
+        .nvptx64,
+        .spirv,
+        .spirv32,
+        .spirv64,
+        .wasm32,
+        .wasm64,
+        => false,
         else => true,
     };
 }