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-rw-r--r--lib/std/coff.zig17
-rw-r--r--lib/std/elf.zig38
2 files changed, 0 insertions, 55 deletions
diff --git a/lib/std/coff.zig b/lib/std/coff.zig
index ca05ce3cf9..da7dc0bcda 100644
--- a/lib/std/coff.zig
+++ b/lib/std/coff.zig
@@ -1060,23 +1060,6 @@ pub const MachineType = enum(u16) {
WCEMIPSV2 = 0x169,
_,
-
- pub fn toTargetCpuArch(machine_type: MachineType) ?std.Target.Cpu.Arch {
- return switch (machine_type) {
- .ARM => .arm,
- .POWERPC => .powerpc,
- .RISCV32 => .riscv32,
- .THUMB => .thumb,
- .I386 => .x86,
- .ARM64 => .aarch64,
- .RISCV64 => .riscv64,
- .X64 => .x86_64,
- .LOONGARCH32 => .loongarch32,
- .LOONGARCH64 => .loongarch64,
- // there's cases we don't (yet) handle
- else => null,
- };
- }
};
pub const CoffError = error{
diff --git a/lib/std/elf.zig b/lib/std/elf.zig
index af3f1813e2..aefaca4bef 100644
--- a/lib/std/elf.zig
+++ b/lib/std/elf.zig
@@ -1646,44 +1646,6 @@ pub const EM = enum(u16) {
FRV = 0x5441,
_,
-
- pub fn toTargetCpuArch(em: EM) ?std.Target.Cpu.Arch {
- return switch (em) {
- .AVR => .avr,
- .MSP430 => .msp430,
- .ARC => .arc,
- .ARM => .arm,
- .HEXAGON => .hexagon,
- .@"68K" => .m68k,
- .MIPS => .mips,
- .MIPS_RS3_LE => .mipsel,
- .PPC => .powerpc,
- .SPARC => .sparc,
- .@"386" => .x86,
- .XCORE => .xcore,
- .CSR_KALIMBA => .kalimba,
- .LANAI => .lanai,
- .AARCH64 => .aarch64,
- .PPC64 => .powerpc64,
- .RISCV => .riscv64,
- .X86_64 => .x86_64,
- .BPF => .bpfel,
- .SPARCV9 => .sparc64,
- .S390 => .s390x,
- .SPU_2 => .spu_2,
- // FIXME:
- // No support for .loongarch32 yet so it is safe to assume we are on .loongarch64.
- //
- // However, when e_machine is .LOONGARCH, we should check
- // ei_class's value to decide the CPU architecture.
- // - ELFCLASS32 => .loongarch32
- // - ELFCLASS64 => .loongarch64
- .LOONGARCH => .loongarch64,
- // there's many cases we don't (yet) handle, or will never have a
- // zig target cpu arch equivalent (such as null).
- else => null,
- };
- }
};
pub const GRP_COMDAT = 1;