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-rw-r--r--lib/std/zig/system/arm.zig87
1 files changed, 56 insertions, 31 deletions
diff --git a/lib/std/zig/system/arm.zig b/lib/std/zig/system/arm.zig
index c8c3f6a851..ed3f76d023 100644
--- a/lib/std/zig/system/arm.zig
+++ b/lib/std/zig/system/arm.zig
@@ -22,32 +22,34 @@ pub const cpu_models = struct {
// implementer = 0x41
const ARM = [_]E{
- E{ .part = 0x926, .m32 = &A32.arm926ej_s, .m64 = null },
- E{ .part = 0xb02, .m32 = &A32.mpcore, .m64 = null },
- E{ .part = 0xb36, .m32 = &A32.arm1136j_s, .m64 = null },
- E{ .part = 0xb56, .m32 = &A32.arm1156t2_s, .m64 = null },
- E{ .part = 0xb76, .m32 = &A32.arm1176jz_s, .m64 = null },
- E{ .part = 0xc05, .m32 = &A32.cortex_a5, .m64 = null },
- E{ .part = 0xc07, .m32 = &A32.cortex_a7, .m64 = null },
- E{ .part = 0xc08, .m32 = &A32.cortex_a8, .m64 = null },
- E{ .part = 0xc09, .m32 = &A32.cortex_a9, .m64 = null },
- E{ .part = 0xc0d, .m32 = &A32.cortex_a17, .m64 = null },
- E{ .part = 0xc0f, .m32 = &A32.cortex_a15, .m64 = null },
- E{ .part = 0xc0e, .m32 = &A32.cortex_a17, .m64 = null },
- E{ .part = 0xc14, .m32 = &A32.cortex_r4, .m64 = null },
- E{ .part = 0xc15, .m32 = &A32.cortex_r5, .m64 = null },
- E{ .part = 0xc17, .m32 = &A32.cortex_r7, .m64 = null },
- E{ .part = 0xc18, .m32 = &A32.cortex_r8, .m64 = null },
- E{ .part = 0xc20, .m32 = &A32.cortex_m0, .m64 = null },
- E{ .part = 0xc21, .m32 = &A32.cortex_m1, .m64 = null },
- E{ .part = 0xc23, .m32 = &A32.cortex_m3, .m64 = null },
- E{ .part = 0xc24, .m32 = &A32.cortex_m4, .m64 = null },
- E{ .part = 0xc27, .m32 = &A32.cortex_m7, .m64 = null },
- E{ .part = 0xc60, .m32 = &A32.cortex_m0plus, .m64 = null },
- E{ .part = 0xd01, .m32 = &A32.cortex_a32, .m64 = null },
+ E{ .part = 0x926, .m32 = &A32.arm926ej_s },
+ E{ .part = 0xb02, .m32 = &A32.mpcore },
+ E{ .part = 0xb36, .m32 = &A32.arm1136j_s },
+ E{ .part = 0xb56, .m32 = &A32.arm1156t2_s },
+ E{ .part = 0xb76, .m32 = &A32.arm1176jz_s },
+ E{ .part = 0xc05, .m32 = &A32.cortex_a5 },
+ E{ .part = 0xc07, .m32 = &A32.cortex_a7 },
+ E{ .part = 0xc08, .m32 = &A32.cortex_a8 },
+ E{ .part = 0xc09, .m32 = &A32.cortex_a9 },
+ E{ .part = 0xc0d, .m32 = &A32.cortex_a17 },
+ E{ .part = 0xc0e, .m32 = &A32.cortex_a17 },
+ E{ .part = 0xc0f, .m32 = &A32.cortex_a15 },
+ E{ .part = 0xc14, .m32 = &A32.cortex_r4 },
+ E{ .part = 0xc15, .m32 = &A32.cortex_r5 },
+ E{ .part = 0xc17, .m32 = &A32.cortex_r7 },
+ E{ .part = 0xc18, .m32 = &A32.cortex_r8 },
+ E{ .part = 0xc20, .m32 = &A32.cortex_m0 },
+ E{ .part = 0xc21, .m32 = &A32.cortex_m1 },
+ E{ .part = 0xc23, .m32 = &A32.cortex_m3 },
+ E{ .part = 0xc24, .m32 = &A32.cortex_m4 },
+ E{ .part = 0xc27, .m32 = &A32.cortex_m7 },
+ E{ .part = 0xc60, .m32 = &A32.cortex_m0plus },
+ E{ .part = 0xd01, .m32 = &A32.cortex_a32 },
+ E{ .part = 0xd02, .m64 = &A64.cortex_a34 },
E{ .part = 0xd03, .m32 = &A32.cortex_a53, .m64 = &A64.cortex_a53 },
E{ .part = 0xd04, .m32 = &A32.cortex_a35, .m64 = &A64.cortex_a35 },
E{ .part = 0xd05, .m32 = &A32.cortex_a55, .m64 = &A64.cortex_a55 },
+ E{ .part = 0xd06, .m64 = &A64.cortex_a65 },
E{ .part = 0xd07, .m32 = &A32.cortex_a57, .m64 = &A64.cortex_a57 },
E{ .part = 0xd08, .m32 = &A32.cortex_a72, .m64 = &A64.cortex_a72 },
E{ .part = 0xd09, .m32 = &A32.cortex_a73, .m64 = &A64.cortex_a73 },
@@ -55,16 +57,38 @@ pub const cpu_models = struct {
E{ .part = 0xd0b, .m32 = &A32.cortex_a76, .m64 = &A64.cortex_a76 },
E{ .part = 0xd0c, .m32 = &A32.neoverse_n1, .m64 = &A64.neoverse_n1 },
E{ .part = 0xd0d, .m32 = &A32.cortex_a77, .m64 = &A64.cortex_a77 },
- E{ .part = 0xd13, .m32 = &A32.cortex_r52, .m64 = null },
- E{ .part = 0xd20, .m32 = &A32.cortex_m23, .m64 = null },
- E{ .part = 0xd21, .m32 = &A32.cortex_m33, .m64 = null },
+ E{ .part = 0xd0e, .m32 = &A32.cortex_a76ae, .m64 = &A64.cortex_a76ae },
+ E{ .part = 0xd13, .m32 = &A32.cortex_r52 },
+ E{ .part = 0xd14, .m64 = &A64.cortex_r82ae },
+ E{ .part = 0xd15, .m64 = &A64.cortex_r82 },
+ E{ .part = 0xd16, .m32 = &A32.cortex_r52plus },
+ E{ .part = 0xd20, .m32 = &A32.cortex_m23 },
+ E{ .part = 0xd21, .m32 = &A32.cortex_m33 },
+ E{ .part = 0xd40, .m32 = &A32.neoverse_v1, .m64 = &A64.neoverse_v1 },
E{ .part = 0xd41, .m32 = &A32.cortex_a78, .m64 = &A64.cortex_a78 },
+ E{ .part = 0xd42, .m32 = &A32.cortex_a78ae, .m64 = &A64.cortex_a78ae },
+ E{ .part = 0xd43, .m64 = &A64.cortex_a65ae },
+ E{ .part = 0xd44, .m32 = &A32.cortex_x1, .m64 = &A64.cortex_x1 },
+ E{ .part = 0xd46, .m64 = &A64.cortex_a510 },
+ E{ .part = 0xd47, .m32 = &A32.cortex_a710, .m64 = &A64.cortex_a710 },
+ E{ .part = 0xd48, .m64 = &A64.cortex_x2 },
+ E{ .part = 0xd49, .m32 = &A32.neoverse_n2, .m64 = &A64.neoverse_n2 },
+ E{ .part = 0xd4a, .m64 = &A64.neoverse_e1 },
E{ .part = 0xd4b, .m32 = &A32.cortex_a78c, .m64 = &A64.cortex_a78c },
E{ .part = 0xd4c, .m32 = &A32.cortex_x1c, .m64 = &A64.cortex_x1c },
- E{ .part = 0xd44, .m32 = &A32.cortex_x1, .m64 = &A64.cortex_x1 },
- E{ .part = 0xd02, .m64 = &A64.cortex_a34 },
- E{ .part = 0xd06, .m64 = &A64.cortex_a65 },
- E{ .part = 0xd43, .m64 = &A64.cortex_a65ae },
+ E{ .part = 0xd4d, .m64 = &A64.cortex_a715 },
+ E{ .part = 0xd4e, .m64 = &A64.cortex_x3 },
+ E{ .part = 0xd4f, .m64 = &A64.neoverse_v2 },
+ E{ .part = 0xd80, .m64 = &A64.cortex_a520 },
+ E{ .part = 0xd81, .m64 = &A64.cortex_a720 },
+ E{ .part = 0xd82, .m64 = &A64.cortex_x4 },
+ E{ .part = 0xd83, .m64 = &A64.neoverse_v3ae },
+ E{ .part = 0xd84, .m64 = &A64.neoverse_v3 },
+ E{ .part = 0xd85, .m64 = &A64.cortex_x925 },
+ E{ .part = 0xd87, .m64 = &A64.cortex_a725 },
+ E{ .part = 0xd88, .m64 = &A64.cortex_a520ae },
+ E{ .part = 0xd89, .m64 = &A64.cortex_a720ae },
+ E{ .part = 0xd8e, .m64 = &A64.neoverse_n3 },
};
// implementer = 0x42
const Broadcom = [_]E{
@@ -97,6 +121,7 @@ pub const cpu_models = struct {
};
// implementer = 0x51
const Qualcomm = [_]E{
+ E{ .part = 0x001, .m64 = &A64.oryon_1 },
E{ .part = 0x06f, .m32 = &A32.krait },
E{ .part = 0x201, .m64 = &A64.kryo, .m32 = &A64.kryo },
E{ .part = 0x205, .m64 = &A64.kryo, .m32 = &A64.kryo },
@@ -110,7 +135,7 @@ pub const cpu_models = struct {
E{ .part = 0xc00, .m64 = &A64.falkor },
E{ .part = 0xc01, .m64 = &A64.saphira },
};
-
+ // implementer = 0x61
const Apple = [_]E{
E{ .part = 0x022, .m64 = &A64.apple_m1 },
E{ .part = 0x023, .m64 = &A64.apple_m1 },
generated by cgit v1.2.3 (git 2.39.1) at 2025-12-27 21:28:05 +0000