diff options
| -rw-r--r-- | src/arch/x86_64/CodeGen.zig | 18 | ||||
| -rw-r--r-- | test/behavior/cast.zig | 3 | ||||
| -rw-r--r-- | test/behavior/int128.zig | 1 |
3 files changed, 6 insertions, 16 deletions
diff --git a/src/arch/x86_64/CodeGen.zig b/src/arch/x86_64/CodeGen.zig index 15bf51489a..00dc4503ca 100644 --- a/src/arch/x86_64/CodeGen.zig +++ b/src/arch/x86_64/CodeGen.zig @@ -1934,7 +1934,7 @@ fn genBody(self: *Self, body: []const Air.Inst.Index) InnerError!void { .ptr_elem_ptr => try self.airPtrElemPtr(inst), .inferred_alloc, .inferred_alloc_comptime => unreachable, - .unreach => if (self.wantSafety()) try self.airTrap() else self.finishAirBookkeeping(), + .unreach => self.finishAirBookkeeping(), .optional_payload => try self.airOptionalPayload(inst), .optional_payload_ptr => try self.airOptionalPayloadPtr(inst), @@ -9813,8 +9813,7 @@ fn genSetReg(self: *Self, dst_reg: Register, ty: Type, src_mcv: MCValue) InnerEr .register_overflow, .reserved_frame, => unreachable, - .undef => if (self.wantSafety()) - try self.genSetReg(dst_reg.to64(), Type.usize, .{ .immediate = 0xaaaaaaaaaaaaaaaa }), + .undef => {}, .eflags => |cc| try self.asmSetccRegister(dst_reg.to8(), cc), .immediate => |imm| { if (imm == 0) { @@ -10098,8 +10097,7 @@ fn genSetMem(self: *Self, base: Memory.Base, disp: i32, ty: Type, src_mcv: MCVal }; switch (src_mcv) { .none, .unreach, .dead, .reserved_frame => unreachable, - .undef => if (self.wantSafety()) - try self.genInlineMemset(dst_ptr_mcv, .{ .immediate = 0xaa }, .{ .immediate = abi_size }), + .undef => {}, .immediate => |imm| switch (abi_size) { 1, 2, 4 => { const immediate = if (ty.isSignedInt(mod)) @@ -12016,16 +12014,6 @@ fn resolveCallingConventionValues( return result; } -/// TODO support scope overrides. Also note this logic is duplicated with `Module.wantSafety`. -fn wantSafety(self: *Self) bool { - return switch (self.bin_file.options.optimize_mode) { - .Debug => true, - .ReleaseSafe => true, - .ReleaseFast => false, - .ReleaseSmall => false, - }; -} - fn fail(self: *Self, comptime format: []const u8, args: anytype) InnerError { @setCold(true); assert(self.err_msg == null); diff --git a/test/behavior/cast.zig b/test/behavior/cast.zig index 34d18f6717..e9f44898c1 100644 --- a/test/behavior/cast.zig +++ b/test/behavior/cast.zig @@ -334,10 +334,11 @@ test "*const ?[*]const T to [*c]const [*c]const T" { try expect(b[0][1] == 'k'); } -test "array coersion to undefined at runtime" { +test "array coercion to undefined at runtime" { if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; + if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; @setRuntimeSafety(true); diff --git a/test/behavior/int128.zig b/test/behavior/int128.zig index 42f0b00922..2413ab65ed 100644 --- a/test/behavior/int128.zig +++ b/test/behavior/int128.zig @@ -28,6 +28,7 @@ test "undefined 128 bit int" { if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; + if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; @setRuntimeSafety(true); |