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-rw-r--r--doc/langref.html.in2
-rw-r--r--lib/compiler/aro/aro/target.zig4
-rw-r--r--lib/compiler_rt/atomics.zig2
-rw-r--r--lib/std/Target.zig171
-rw-r--r--lib/std/Thread.zig12
-rw-r--r--lib/std/c.zig4
-rw-r--r--lib/std/os/linux.zig2
-rw-r--r--lib/std/os/linux/loongarch64.zig3
-rw-r--r--lib/std/os/linux/mips64.zig45
-rw-r--r--lib/std/os/linux/tls.zig3
-rw-r--r--lib/std/zig/target.zig4
-rw-r--r--src/Compilation.zig4
-rw-r--r--src/Sema.zig10
-rw-r--r--src/Zcu.zig3
-rw-r--r--src/codegen/llvm.zig30
-rw-r--r--src/link/SpirV.zig10
-rw-r--r--src/target.zig6
-rw-r--r--test/llvm_targets.zig4
-rw-r--r--test/tests.zig15
19 files changed, 181 insertions, 153 deletions
diff --git a/doc/langref.html.in b/doc/langref.html.in
index 9a80fbd194..fc7f4c5461 100644
--- a/doc/langref.html.in
+++ b/doc/langref.html.in
@@ -575,7 +575,7 @@
</tr>
<tr>
<th scope="row">{#syntax#}f80{#endsyntax#}</th>
- <td><code class="c">double</code></td>
+ <td><code class="c">long double</code></td>
<td>80-bit floating point (64-bit mantissa) IEEE-754-2008 80-bit extended precision</td>
</tr>
<tr>
diff --git a/lib/compiler/aro/aro/target.zig b/lib/compiler/aro/aro/target.zig
index a876723302..87b362aeb1 100644
--- a/lib/compiler/aro/aro/target.zig
+++ b/lib/compiler/aro/aro/target.zig
@@ -626,7 +626,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
.windows => "windows",
.zos => "zos",
.haiku => "haiku",
- .minix => "minix",
.rtems => "rtems",
.aix => "aix",
.cuda => "cuda",
@@ -650,9 +649,8 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
.visionos => "xros",
.driverkit => "driverkit",
.shadermodel => "shadermodel",
- .liteos => "liteos",
.opencl,
- .glsl450,
+ .opengl,
.vulkan,
.plan9,
.other,
diff --git a/lib/compiler_rt/atomics.zig b/lib/compiler_rt/atomics.zig
index e82b6ab055..2e5989336c 100644
--- a/lib/compiler_rt/atomics.zig
+++ b/lib/compiler_rt/atomics.zig
@@ -30,7 +30,7 @@ const largest_atomic_size = switch (arch) {
// On SPARC systems that lacks CAS and/or swap instructions, the only
// available atomic operation is a test-and-set (`ldstub`), so we force
// every atomic memory access to go through the lock.
- .sparc => if (cpu.features.featureSetHas(.hasleoncasa)) @sizeOf(usize) else 0,
+ .sparc => if (std.Target.sparc.featureSetHas(builtin.cpu.features, .hasleoncasa)) @sizeOf(usize) else 0,
// XXX: On x86/x86_64 we could check the presence of cmpxchg8b/cmpxchg16b
// and set this parameter accordingly.
diff --git a/lib/std/Target.zig b/lib/std/Target.zig
index 759c1156c3..1d08e7faf3 100644
--- a/lib/std/Target.zig
+++ b/lib/std/Target.zig
@@ -17,53 +17,60 @@ pub const Os = struct {
pub const Tag = enum {
freestanding,
- dragonfly,
- freebsd,
+ other,
+
+ contiki,
+ elfiamcu,
fuchsia,
- ios,
+ hermit,
+
+ aix,
+ haiku,
+ hurd,
linux,
- ps3,
- macos,
+ plan9,
+ rtems,
+ serenity,
+ zos,
+
+ dragonfly,
+ freebsd,
netbsd,
openbsd,
+
+ driverkit,
+ ios,
+ macos,
+ tvos,
+ visionos,
+ watchos,
+
+ illumos,
solaris,
- uefi,
+
windows,
- zos,
- haiku,
- minix,
- rtems,
- aix,
- cuda,
- nvcl,
- amdhsa,
+ uefi,
+
+ ps3,
ps4,
ps5,
- elfiamcu,
- tvos,
- watchos,
- driverkit,
- visionos,
- mesa3d,
- contiki,
- amdpal,
- hermit,
- hurd,
- wasi,
+
emscripten,
- shadermodel,
- liteos,
- serenity,
+ wasi,
+
+ amdhsa,
+ amdpal,
+ cuda,
+ mesa3d,
+ nvcl,
opencl,
- glsl450,
+ opengl,
+ shadermodel,
vulkan,
- plan9,
- illumos,
- other,
// LLVM tags deliberately omitted:
- // - kfreebsd
// - darwin
+ // - kfreebsd
// - nacl
pub inline fn isDarwin(tag: Tag) bool {
@@ -142,7 +149,6 @@ pub const Os = struct {
.ps3,
.zos,
.haiku,
- .minix,
.rtems,
.aix,
.cuda,
@@ -159,10 +165,9 @@ pub const Os = struct {
.emscripten,
.driverkit,
.shadermodel,
- .liteos,
.uefi,
.opencl, // TODO: OpenCL versions
- .glsl450, // TODO: GLSL versions
+ .opengl, // TODO: GLSL versions
.vulkan,
.plan9,
.illumos,
@@ -373,7 +378,6 @@ pub const Os = struct {
.ps3,
.zos,
.haiku,
- .minix,
.rtems,
.aix,
.cuda,
@@ -390,10 +394,9 @@ pub const Os = struct {
.emscripten,
.driverkit,
.shadermodel,
- .liteos,
.uefi,
.opencl, // TODO: OpenCL versions
- .glsl450, // TODO: GLSL versions
+ .opengl, // TODO: GLSL versions
.vulkan,
.plan9,
.illumos,
@@ -571,7 +574,6 @@ pub const Os = struct {
.fuchsia,
.ps3,
.zos,
- .minix,
.rtems,
.aix,
.cuda,
@@ -589,10 +591,9 @@ pub const Os = struct {
.emscripten,
.driverkit,
.shadermodel,
- .liteos,
.uefi,
.opencl,
- .glsl450,
+ .opengl,
.vulkan,
.plan9,
.other,
@@ -676,7 +677,6 @@ pub const Abi = enum {
.dragonfly,
.ps3,
.zos,
- .minix,
.rtems,
.aix,
.cuda,
@@ -704,9 +704,8 @@ pub const Abi = enum {
.wasi,
.emscripten,
=> .musl,
- .liteos => .ohos,
- .opencl, // TODO: SPIR-V ABIs with Linkage capability
- .glsl450,
+ .opencl,
+ .opengl,
.vulkan,
.plan9, // TODO specify abi
.macos,
@@ -1001,17 +1000,22 @@ pub const Cpu = struct {
};
pub const Arch = enum {
+ amdgcn,
+ arc,
arm,
armeb,
+ thumb,
+ thumbeb,
aarch64,
aarch64_be,
- arc,
avr,
bpfel,
bpfeb,
csky,
dxil,
hexagon,
+ kalimba,
+ lanai,
loongarch32,
loongarch64,
m68k,
@@ -1020,51 +1024,46 @@ pub const Cpu = struct {
mips64,
mips64el,
msp430,
+ nvptx,
+ nvptx64,
powerpc,
powerpcle,
powerpc64,
powerpc64le,
- amdgcn,
riscv32,
riscv64,
+ s390x,
sparc,
sparc64,
- s390x,
- thumb,
- thumbeb,
- x86,
- x86_64,
- xcore,
- xtensa,
- nvptx,
- nvptx64,
spirv,
spirv32,
spirv64,
- kalimba,
- lanai,
+ spu_2,
+ ve,
wasm32,
wasm64,
- ve,
- spu_2,
+ x86,
+ x86_64,
+ xcore,
+ xtensa,
// LLVM tags deliberately omitted:
// - aarch64_32
- // - r600
- // - sparcel
- // - tce
- // - tcele
- // - le32
- // - le64
// - amdil
// - amdil64
+ // - le32
+ // - le64
+ // - r600
// - hsail
// - hsail64
- // - spir
- // - spir64
- // - shave
// - renderscript32
// - renderscript64
+ // - shave
+ // - sparcel
+ // - spir
+ // - spir64
+ // - tce
+ // - tcele
pub inline fn isX86(arch: Arch) bool {
return switch (arch) {
@@ -1164,7 +1163,7 @@ pub const Cpu = struct {
pub inline fn isSpirV(arch: Arch) bool {
return switch (arch) {
- .spirv32, .spirv64 => true,
+ .spirv, .spirv32, .spirv64 => true,
else => false,
};
}
@@ -1349,8 +1348,8 @@ pub const Cpu = struct {
/// Returns whether this architecture supports the address space
pub fn supportsAddressSpace(arch: Arch, address_space: std.builtin.AddressSpace) bool {
- const is_nvptx = arch == .nvptx or arch == .nvptx64;
- const is_spirv = arch == .spirv32 or arch == .spirv64;
+ const is_nvptx = arch.isNvptx();
+ const is_spirv = arch.isSpirV();
const is_gpu = is_nvptx or is_spirv or arch == .amdgcn;
return switch (address_space) {
.generic => true,
@@ -1379,7 +1378,7 @@ pub const Cpu = struct {
.x86, .x86_64 => "x86",
.nvptx, .nvptx64 => "nvptx",
.wasm32, .wasm64 => "wasm",
- .spirv32, .spirv64 => "spirv",
+ .spirv, .spirv32, .spirv64 => "spirv",
else => @tagName(arch),
};
}
@@ -1402,7 +1401,7 @@ pub const Cpu = struct {
.amdgcn => &amdgpu.all_features,
.riscv32, .riscv64 => &riscv.all_features,
.sparc, .sparc64 => &sparc.all_features,
- .spirv32, .spirv64 => &spirv.all_features,
+ .spirv, .spirv32, .spirv64 => &spirv.all_features,
.s390x => &s390x.all_features,
.x86, .x86_64 => &x86.all_features,
.xtensa => &xtensa.all_features,
@@ -1432,7 +1431,7 @@ pub const Cpu = struct {
.amdgcn => comptime allCpusFromDecls(amdgpu.cpu),
.riscv32, .riscv64 => comptime allCpusFromDecls(riscv.cpu),
.sparc, .sparc64 => comptime allCpusFromDecls(sparc.cpu),
- .spirv32, .spirv64 => comptime allCpusFromDecls(spirv.cpu),
+ .spirv, .spirv32, .spirv64 => comptime allCpusFromDecls(spirv.cpu),
.s390x => comptime allCpusFromDecls(s390x.cpu),
.x86, .x86_64 => comptime allCpusFromDecls(x86.cpu),
.xtensa => comptime allCpusFromDecls(xtensa.cpu),
@@ -1522,7 +1521,7 @@ pub const Cpu = struct {
.amdgcn => &amdgpu.cpu.generic,
.riscv32 => &riscv.cpu.generic_rv32,
.riscv64 => &riscv.cpu.generic_rv64,
- .spirv32, .spirv64 => &spirv.cpu.generic,
+ .spirv, .spirv32, .spirv64 => &spirv.cpu.generic,
.sparc => &sparc.cpu.generic,
.sparc64 => &sparc.cpu.v9, // 64-bit SPARC needs v9 as the baseline
.s390x => &s390x.cpu.generic,
@@ -1539,12 +1538,12 @@ pub const Cpu = struct {
pub fn baseline(arch: Arch) *const Model {
return switch (arch) {
.arm, .armeb, .thumb, .thumbeb => &arm.cpu.baseline,
- .hexagon => &hexagon.cpu.hexagonv60,
+ .hexagon => &hexagon.cpu.hexagonv60, // gcc/clang do not have a generic hexagon model.
.riscv32 => &riscv.cpu.baseline_rv32,
.riscv64 => &riscv.cpu.baseline_rv64,
.x86 => &x86.cpu.pentium4,
.nvptx, .nvptx64 => &nvptx.cpu.sm_20,
- .s390x => &s390x.cpu.arch8,
+ .s390x => &s390x.cpu.arch8, // gcc/clang do not have a generic s390x model.
.sparc => &sparc.cpu.v9, // glibc does not work with 'plain' v8.
.loongarch64 => &loongarch.cpu.loongarch64,
@@ -1624,10 +1623,6 @@ pub inline fn isGnuLibC(target: Target) bool {
return target.os.tag.isGnuLibC(target.abi);
}
-pub inline fn supportsNewStackCall(target: Target) bool {
- return !target.cpu.arch.isWasm();
-}
-
pub inline fn isSpirV(target: Target) bool {
return target.cpu.arch.isSpirV();
}
@@ -1656,7 +1651,7 @@ pub inline fn hasDynamicLinker(target: Target) bool {
.windows,
.emscripten,
.opencl,
- .glsl450,
+ .opengl,
.vulkan,
.plan9,
.other,
@@ -1824,7 +1819,7 @@ pub const DynamicLinker = struct {
.emscripten,
.wasi,
.opencl,
- .glsl450,
+ .opengl,
.vulkan,
.other,
.plan9,
@@ -1838,7 +1833,6 @@ pub const DynamicLinker = struct {
.fuchsia,
.ps3,
.zos,
- .minix,
.rtems,
.aix,
.cuda,
@@ -1854,7 +1848,6 @@ pub const DynamicLinker = struct {
.hurd,
.driverkit,
.shadermodel,
- .liteos,
=> none,
};
}
@@ -2139,7 +2132,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
.illumos,
.haiku,
.fuchsia,
- .minix,
.serenity,
=> switch (target.cpu.arch) {
.msp430 => switch (c_type) {
@@ -2341,10 +2333,9 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
.contiki,
.hermit,
.hurd,
- .glsl450,
+ .opengl,
.driverkit,
.shadermodel,
- .liteos,
=> @panic("TODO specify the C integer and float type sizes for this OS"),
}
}
diff --git a/lib/std/Thread.zig b/lib/std/Thread.zig
index dadf50e5ad..b84f0274bc 100644
--- a/lib/std/Thread.zig
+++ b/lib/std/Thread.zig
@@ -1130,6 +1130,10 @@ const LinuxThreadImpl = struct {
[len] "r" (self.mapped.len),
: "memory"
),
+ // We set `sp` to the address of the current function as a workaround for a Linux
+ // kernel bug that caused syscalls to return EFAULT if the stack pointer is invalid.
+ // The bug was introduced in 46e12c07b3b9603c60fc1d421ff18618241cb081 and fixed in
+ // 7928eb0370d1133d0d8cd2f5ddfca19c309079d5.
.mips, .mipsel => asm volatile (
\\ move $sp, $25
\\ li $2, 4091 # SYS_munmap
@@ -1145,11 +1149,11 @@ const LinuxThreadImpl = struct {
: "memory"
),
.mips64, .mips64el => asm volatile (
- \\ li $2, 4091 # SYS_munmap
+ \\ li $2, 5011 # SYS_munmap
\\ move $4, %[ptr]
\\ move $5, %[len]
\\ syscall
- \\ li $2, 4001 # SYS_exit
+ \\ li $2, 5058 # SYS_exit
\\ li $4, 0
\\ syscall
:
@@ -1159,8 +1163,8 @@ const LinuxThreadImpl = struct {
),
.powerpc, .powerpcle, .powerpc64, .powerpc64le => asm volatile (
\\ li 0, 91 # SYS_munmap
- \\ mr %[ptr], 3
- \\ mr %[len], 4
+ \\ mr 3, %[ptr]
+ \\ mr 4, %[len]
\\ sc
\\ li 0, 1 # SYS_exit
\\ li 3, 0
diff --git a/lib/std/c.zig b/lib/std/c.zig
index e006420f5c..92d36dd135 100644
--- a/lib/std/c.zig
+++ b/lib/std/c.zig
@@ -6619,7 +6619,7 @@ pub const Stat = switch (native_os) {
};
pub const pthread_mutex_t = switch (native_os) {
- .linux, .minix => extern struct {
+ .linux => extern struct {
data: [data_len]u8 align(@alignOf(usize)) = [_]u8{0} ** data_len,
const data_len = switch (native_abi) {
@@ -6716,7 +6716,7 @@ pub const pthread_cond_t = switch (native_os) {
magic: u16 = 0x4356,
data: u64 = 0,
},
- .fuchsia, .minix, .emscripten => extern struct {
+ .fuchsia, .emscripten => extern struct {
data: [48]u8 align(@alignOf(usize)) = [_]u8{0} ** 48,
},
else => void,
diff --git a/lib/std/os/linux.zig b/lib/std/os/linux.zig
index 95d1175e9a..67468641c9 100644
--- a/lib/std/os/linux.zig
+++ b/lib/std/os/linux.zig
@@ -6573,7 +6573,7 @@ pub const tc_lflag_t = if (is_mips) packed struct(tcflag_t) {
PENDIN: bool = false,
TOSTOP: bool = false,
EXTPROC: bool = false,
- _17: u16 = 0,
+ _17: u15 = 0,
} else if (is_ppc) packed struct(tcflag_t) {
ECHOKE: bool = false,
ECHOE: bool = false,
diff --git a/lib/std/os/linux/loongarch64.zig b/lib/std/os/linux/loongarch64.zig
index 83cabcf1d5..def3915494 100644
--- a/lib/std/os/linux/loongarch64.zig
+++ b/lib/std/os/linux/loongarch64.zig
@@ -201,3 +201,6 @@ pub const ucontext_t = extern struct {
};
pub const Elf_Symndx = u32;
+
+/// TODO
+pub const getcontext = {};
diff --git a/lib/std/os/linux/mips64.zig b/lib/std/os/linux/mips64.zig
index 5089ba6fd3..579d41ca75 100644
--- a/lib/std/os/linux/mips64.zig
+++ b/lib/std/os/linux/mips64.zig
@@ -118,9 +118,6 @@ pub fn syscall5(number: SYS, arg1: usize, arg2: usize, arg3: usize, arg4: usize,
);
}
-// NOTE: The o32 calling convention requires the callee to reserve 16 bytes for
-// the first four arguments even though they're passed in $a0-$a3.
-
pub fn syscall6(
number: SYS,
arg1: usize,
@@ -175,10 +172,44 @@ pub fn syscall7(
);
}
-const CloneFn = *const fn (arg: usize) callconv(.C) u8;
-
-/// This matches the libc clone function.
-pub extern fn clone(func: CloneFn, stack: usize, flags: u32, arg: usize, ptid: *i32, tls: usize, ctid: *i32) usize;
+pub fn clone() callconv(.Naked) usize {
+ // __clone(func, stack, flags, arg, ptid, tls, ctid)
+ // 3, 4, 5, 6, 7, 8, 9
+ //
+ // syscall(SYS_clone, flags, stack, ptid, tls, ctid)
+ // 2 4, 5, 6, 7, 8
+ asm volatile (
+ \\ # Save function pointer and argument pointer on new thread stack
+ \\ and $5, $5, -16
+ \\ dsubu $5, $5, 16
+ \\ sd $4, 0($5)
+ \\ sd $7, 8($5)
+ \\ # Shuffle (fn,sp,fl,arg,ptid,tls,ctid) to (fl,sp,ptid,tls,ctid)
+ \\ move $4, $6
+ \\ move $6, $8
+ \\ move $7, $9
+ \\ move $8, $10
+ \\ li $2, 5055 # SYS_clone
+ \\ syscall
+ \\ beq $7, $0, 1f
+ \\ nop
+ \\ jr $ra
+ \\ dsubu $2, $0, $2
+ \\1:
+ \\ beq $2, $0, 1f
+ \\ nop
+ \\ jr $ra
+ \\ nop
+ \\1:
+ \\ ld $25, 0($sp)
+ \\ ld $4, 8($sp)
+ \\ jalr $25
+ \\ nop
+ \\ move $4, $2
+ \\ li $2, 5058 # SYS_exit
+ \\ syscall
+ );
+}
pub fn restore() callconv(.Naked) noreturn {
asm volatile (
diff --git a/lib/std/os/linux/tls.zig b/lib/std/os/linux/tls.zig
index 251d4084aa..d785539434 100644
--- a/lib/std/os/linux/tls.zig
+++ b/lib/std/os/linux/tls.zig
@@ -88,6 +88,7 @@ const current_variant: Variant = switch (native_arch) {
=> .I_modified,
.hexagon,
.s390x,
+ .sparc,
.sparc64,
.x86,
.x86_64,
@@ -309,7 +310,7 @@ pub fn setThreadPointer(addr: usize) void {
: "r0"
);
},
- .sparc64 => {
+ .sparc, .sparc64 => {
asm volatile (
\\ mov %[addr], %%g7
:
diff --git a/lib/std/zig/target.zig b/lib/std/zig/target.zig
index 6cc3b40227..b248f21d6a 100644
--- a/lib/std/zig/target.zig
+++ b/lib/std/zig/target.zig
@@ -28,6 +28,10 @@ pub const available_libcs = [_]ArchOsAbi{
.{ .arch = .thumb, .os = .linux, .abi = .gnueabihf },
.{ .arch = .thumb, .os = .linux, .abi = .musleabi },
.{ .arch = .thumb, .os = .linux, .abi = .musleabihf },
+ .{ .arch = .thumbeb, .os = .linux, .abi = .gnueabi },
+ .{ .arch = .thumbeb, .os = .linux, .abi = .gnueabihf },
+ .{ .arch = .thumbeb, .os = .linux, .abi = .musleabi },
+ .{ .arch = .thumbeb, .os = .linux, .abi = .musleabihf },
.{ .arch = .arm, .os = .windows, .abi = .gnu },
.{ .arch = .csky, .os = .linux, .abi = .gnueabi, .glibc_min = .{ .major = 2, .minor = 29, .patch = 0 } },
.{ .arch = .csky, .os = .linux, .abi = .gnueabihf, .glibc_min = .{ .major = 2, .minor = 29, .patch = 0 } },
diff --git a/src/Compilation.zig b/src/Compilation.zig
index 01a5772e23..d7dabd5164 100644
--- a/src/Compilation.zig
+++ b/src/Compilation.zig
@@ -6266,7 +6266,7 @@ fn canBuildLibCompilerRt(target: std.Target, use_llvm: bool) bool {
else => {},
}
switch (target.cpu.arch) {
- .spirv32, .spirv64 => return false,
+ .spirv, .spirv32, .spirv64 => return false,
else => {},
}
return switch (target_util.zigBackend(target, use_llvm)) {
@@ -6284,7 +6284,7 @@ fn canBuildZigLibC(target: std.Target, use_llvm: bool) bool {
else => {},
}
switch (target.cpu.arch) {
- .spirv32, .spirv64 => return false,
+ .spirv, .spirv32, .spirv64 => return false,
else => {},
}
return switch (target_util.zigBackend(target, use_llvm)) {
diff --git a/src/Sema.zig b/src/Sema.zig
index 20daa78e9a..4fcb9c98c8 100644
--- a/src/Sema.zig
+++ b/src/Sema.zig
@@ -10038,11 +10038,11 @@ fn finishFunc(
else => "x86_64",
},
.Kernel => switch (arch) {
- .nvptx, .nvptx64, .amdgcn, .spirv32, .spirv64 => null,
+ .nvptx, .nvptx64, .amdgcn, .spirv, .spirv32, .spirv64 => null,
else => "nvptx, amdgcn and SPIR-V",
},
.Fragment, .Vertex => switch (arch) {
- .spirv32, .spirv64 => null,
+ .spirv, .spirv32, .spirv64 => null,
else => "SPIR-V",
},
})) |allowed_platform| {
@@ -26703,7 +26703,7 @@ fn zirWorkItem(
switch (target.cpu.arch) {
// TODO: Allow for other GPU targets.
- .amdgcn, .spirv64, .spirv32 => {},
+ .amdgcn, .spirv, .spirv64, .spirv32 => {},
else => {
return sema.fail(block, builtin_src, "builtin only available on GPU targets; targeted architecture is {s}", .{@tagName(target.cpu.arch)});
},
@@ -37323,9 +37323,9 @@ pub fn analyzeAsAddressSpace(
const target = pt.zcu.getTarget();
const arch = target.cpu.arch;
- const is_nv = arch == .nvptx or arch == .nvptx64;
+ const is_nv = arch.isNvptx();
const is_amd = arch == .amdgcn;
- const is_spirv = arch == .spirv32 or arch == .spirv64;
+ const is_spirv = arch.isSpirV();
const is_gpu = is_nv or is_amd or is_spirv;
const supported = switch (address_space) {
diff --git a/src/Zcu.zig b/src/Zcu.zig
index bcb331b597..10fa45a62b 100644
--- a/src/Zcu.zig
+++ b/src/Zcu.zig
@@ -2910,6 +2910,7 @@ pub fn atomicPtrAlignment(
.s390x,
.wasm64,
.ve,
+ .spirv,
.spirv64,
.loongarch64,
=> 64,
@@ -2919,8 +2920,6 @@ pub fn atomicPtrAlignment(
=> 128,
.x86_64 => if (std.Target.x86.featureSetHas(target.cpu.features, .cx16)) 128 else 64,
-
- .spirv => @panic("TODO what should this value be?"),
};
if (ty.toIntern() == .bool_type) return .none;
diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig
index b900c15d82..6453ea04a3 100644
--- a/src/codegen/llvm.zig
+++ b/src/codegen/llvm.zig
@@ -110,7 +110,7 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
.netbsd => "netbsd",
.openbsd => "openbsd",
.solaris, .illumos => "solaris",
- .windows => "windows",
+ .windows, .uefi => "windows",
.zos => "zos",
.haiku => "haiku",
.rtems => "rtems",
@@ -128,21 +128,18 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
.hurd => "hurd",
.wasi => "wasi",
.emscripten => "emscripten",
- .uefi => "windows",
.macos => "macosx",
.ios => "ios",
.tvos => "tvos",
.watchos => "watchos",
.driverkit => "driverkit",
.shadermodel => "shadermodel",
- .liteos => "liteos",
.visionos => "xros",
.serenity => "serenity",
.vulkan => "vulkan",
- .glsl450,
+ .opengl,
.plan9,
- .minix,
.contiki,
.other,
=> "unknown",
@@ -207,15 +204,7 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
pub fn targetOs(os_tag: std.Target.Os.Tag) llvm.OSType {
return switch (os_tag) {
- .freestanding,
- .other,
- .opencl,
- .glsl450,
- .plan9,
- .minix,
- .contiki,
- => .UnknownOS,
-
+ .freestanding => .UnknownOS,
.windows, .uefi => .Win32,
.dragonfly => .DragonFly,
.freebsd => .FreeBSD,
@@ -234,6 +223,7 @@ pub fn targetOs(os_tag: std.Target.Os.Tag) llvm.OSType {
.cuda => .CUDA,
.nvcl => .NVCL,
.amdhsa => .AMDHSA,
+ .opencl => .UnknownOS, // https://llvm.org/docs/SPIRVUsage.html#target-triples
.ps4 => .PS4,
.ps5 => .PS5,
.elfiamcu => .ELFIAMCU,
@@ -248,9 +238,14 @@ pub fn targetOs(os_tag: std.Target.Os.Tag) llvm.OSType {
.emscripten => .Emscripten,
.driverkit => .DriverKit,
.shadermodel => .ShaderModel,
- .liteos => .LiteOS,
.vulkan => .Vulkan,
.serenity => .Serenity,
+
+ .opengl,
+ .plan9,
+ .contiki,
+ .other,
+ => .UnknownOS,
};
}
@@ -11763,6 +11758,7 @@ fn backendSupportsF16(target: std.Target) bool {
.mipsel,
.mips64,
.mips64el,
+ .s390x,
=> false,
.aarch64 => std.Target.aarch64.featureSetHas(target.cpu.features, .fp_armv8),
else => true,
@@ -11774,7 +11770,9 @@ fn backendSupportsF16(target: std.Target) bool {
/// or if it produces miscompilations.
fn backendSupportsF128(target: std.Target) bool {
return switch (target.cpu.arch) {
- .amdgcn => false,
+ .amdgcn,
+ .sparc,
+ => false,
.aarch64 => std.Target.aarch64.featureSetHas(target.cpu.features, .fp_armv8),
else => true,
};
diff --git a/src/link/SpirV.zig b/src/link/SpirV.zig
index e97c80c3fe..f76ceec2f5 100644
--- a/src/link/SpirV.zig
+++ b/src/link/SpirV.zig
@@ -80,12 +80,12 @@ pub fn createEmpty(
errdefer self.deinit();
switch (target.cpu.arch) {
- .spirv32, .spirv64 => {},
+ .spirv, .spirv32, .spirv64 => {},
else => unreachable, // Caught by Compilation.Config.resolve.
}
switch (target.os.tag) {
- .opencl, .glsl450, .vulkan => {},
+ .opencl, .opengl, .vulkan => {},
else => unreachable, // Caught by Compilation.Config.resolve.
}
@@ -290,7 +290,7 @@ fn writeCapabilities(spv: *SpvModule, target: std.Target) !void {
// TODO: Integrate with a hypothetical feature system
const caps: []const spec.Capability = switch (target.os.tag) {
.opencl => &.{ .Kernel, .Addresses, .Int8, .Int16, .Int64, .Float64, .Float16, .Vector16, .GenericPointer },
- .glsl450 => &.{.Shader},
+ .opengl => &.{.Shader},
.vulkan => &.{ .Shader, .VariablePointersStorageBuffer, .Int8, .Int16, .Int64, .Float64, .Float16 },
else => unreachable, // TODO
};
@@ -311,13 +311,13 @@ fn writeMemoryModel(spv: *SpvModule, target: std.Target) !void {
.spirv64 => spec.AddressingModel.Physical64,
else => unreachable, // TODO
},
- .glsl450, .vulkan => spec.AddressingModel.Logical,
+ .opengl, .vulkan => spec.AddressingModel.Logical,
else => unreachable, // TODO
};
const memory_model: spec.MemoryModel = switch (target.os.tag) {
.opencl => .OpenCL,
- .glsl450 => .GLSL450,
+ .opengl => .GLSL450,
.vulkan => .GLSL450,
else => unreachable,
};
diff --git a/src/target.zig b/src/target.zig
index eb48b7b2e6..6246656fdc 100644
--- a/src/target.zig
+++ b/src/target.zig
@@ -196,7 +196,7 @@ pub fn supportsStackProtector(target: std.Target, backend: std.builtin.CompilerB
else => {},
}
switch (target.cpu.arch) {
- .spirv32, .spirv64 => return false,
+ .spirv, .spirv32, .spirv64 => return false,
else => {},
}
return switch (backend) {
@@ -207,7 +207,7 @@ pub fn supportsStackProtector(target: std.Target, backend: std.builtin.CompilerB
pub fn clangSupportsStackProtector(target: std.Target) bool {
return switch (target.cpu.arch) {
- .spirv32, .spirv64 => return false,
+ .spirv, .spirv32, .spirv64 => return false,
else => true,
};
}
@@ -220,7 +220,7 @@ pub fn supportsReturnAddress(target: std.Target) bool {
return switch (target.cpu.arch) {
.wasm32, .wasm64 => target.os.tag == .emscripten,
.bpfel, .bpfeb => false,
- .spirv32, .spirv64 => false,
+ .spirv, .spirv32, .spirv64 => false,
else => true,
};
}
diff --git a/test/llvm_targets.zig b/test/llvm_targets.zig
index 71dc9e30a3..76b9e668fa 100644
--- a/test/llvm_targets.zig
+++ b/test/llvm_targets.zig
@@ -90,10 +90,10 @@ const targets = [_]std.Target.Query{
.{ .cpu_arch = .sparc64, .os_tag = .freestanding, .abi = .none },
.{ .cpu_arch = .sparc64, .os_tag = .linux, .abi = .gnu },
//.{ .cpu_arch = .spirv32, .os_tag = .opencl, .abi = .none },
- //.{ .cpu_arch = .spirv32, .os_tag = .glsl450, .abi = .none },
+ //.{ .cpu_arch = .spirv32, .os_tag = .opengl, .abi = .none },
//.{ .cpu_arch = .spirv32, .os_tag = .vulkan, .abi = .none },
//.{ .cpu_arch = .spirv64, .os_tag = .opencl, .abi = .none },
- //.{ .cpu_arch = .spirv64, .os_tag = .glsl450, .abi = .none },
+ //.{ .cpu_arch = .spirv64, .os_tag = .opengl, .abi = .none },
//.{ .cpu_arch = .spirv64, .os_tag = .vulkan, .abi = .none },
.{ .cpu_arch = .thumb, .os_tag = .freestanding, .abi = .none },
.{ .cpu_arch = .thumbeb, .os_tag = .freestanding, .abi = .none },
diff --git a/test/tests.zig b/test/tests.zig
index b80017d915..1b3ef6ad74 100644
--- a/test/tests.zig
+++ b/test/tests.zig
@@ -296,14 +296,13 @@ const test_targets = blk: {
}) catch unreachable,
.link_libc = true,
},
- // https://github.com/ziglang/zig/issues/3287
- //.{
- // .target = std.Target.Query.parse(.{
- // .arch_os_abi = "arm-linux-gnueabihf",
- // .cpu_features = "generic+v8a",
- // }) catch unreachable,
- // .link_libc = true,
- //},
+ .{
+ .target = std.Target.Query.parse(.{
+ .arch_os_abi = "arm-linux-gnueabihf",
+ .cpu_features = "generic+v8a",
+ }) catch unreachable,
+ .link_libc = true,
+ },
.{
.target = .{
generated by cgit v1.2.3 (git 2.39.1) at 2025-12-27 21:54:16 +0000