diff options
| author | Alex Rønne Petersen <alex@alexrp.com> | 2025-01-24 00:50:39 +0100 |
|---|---|---|
| committer | Alex Rønne Petersen <alex@alexrp.com> | 2025-02-17 19:17:55 +0100 |
| commit | 2fe32ef847dd2f19113b86036357beeddbd08f05 (patch) | |
| tree | 911bf7a5f1fdef22457078eaf056cbbe2e66eafd /src | |
| parent | 5248f0a9095bac52b5a066c0ea0a317439e6cf2f (diff) | |
| download | zig-2fe32ef847dd2f19113b86036357beeddbd08f05.tar.gz zig-2fe32ef847dd2f19113b86036357beeddbd08f05.zip | |
std.Target: Remove Cpu.Arch.propeller2 and use a CPU feature instead.
Diffstat (limited to 'src')
| -rw-r--r-- | src/Sema.zig | 5 | ||||
| -rw-r--r-- | src/Type.zig | 2 | ||||
| -rw-r--r-- | src/Zcu.zig | 3 | ||||
| -rw-r--r-- | src/codegen/llvm.zig | 7 | ||||
| -rw-r--r-- | src/target.zig | 3 |
5 files changed, 8 insertions, 12 deletions
diff --git a/src/Sema.zig b/src/Sema.zig index c513962d89..a9d9ccb908 100644 --- a/src/Sema.zig +++ b/src/Sema.zig @@ -37271,6 +37271,7 @@ pub fn analyzeAsAddressSpace( const is_spirv = arch.isSpirV(); const is_gpu = is_nv or is_amd or is_spirv; + // TODO: Deduplicate with `std.Target.Cpu.Arch.supportsAddressSpace`. const supported = switch (address_space) { // TODO: on spir-v only when os is opencl. .generic => true, @@ -37283,8 +37284,8 @@ pub fn analyzeAsAddressSpace( // TODO this should also check how many flash banks the cpu has .flash, .flash1, .flash2, .flash3, .flash4, .flash5 => arch == .avr, - .cog, .hub => arch.isPropeller(), - .lut => (arch == .propeller2), + .cog, .hub => arch == .propeller, + .lut => arch == .propeller and std.Target.propeller.featureSetHas(target.cpu.features, .p2), }; if (!supported) { diff --git a/src/Type.zig b/src/Type.zig index 0f03380b73..7ddd43b034 100644 --- a/src/Type.zig +++ b/src/Type.zig @@ -1647,7 +1647,7 @@ pub fn maxIntAlignment(target: std.Target) u16 { .avr => 1, .msp430 => 2, .xcore => 4, - .propeller1, .propeller2 => 4, + .propeller => 4, .arm, .armeb, diff --git a/src/Zcu.zig b/src/Zcu.zig index 1c7b4d2876..89a2a8df6d 100644 --- a/src/Zcu.zig +++ b/src/Zcu.zig @@ -3619,8 +3619,7 @@ pub fn atomicPtrAlignment( .spirv32, .loongarch32, .xtensa, - .propeller1, - .propeller2, + .propeller, => 32, .amdgcn, diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig index 25b49d2b35..4556e07e10 100644 --- a/src/codegen/llvm.zig +++ b/src/codegen/llvm.zig @@ -98,8 +98,7 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 { .ve => "ve", .kalimba, - .propeller1, - .propeller2, + .propeller, => unreachable, // Gated by hasLlvmSupport(). }; @@ -11834,7 +11833,6 @@ fn toLlvmCallConvTag(cc_tag: std.builtin.CallingConvention.Tag, target: std.Targ .m68k_gnu, .msp430_eabi, .propeller1_sysv, - .propeller2_sysv, .s390x_sysv, .s390x_sysv_vx, .ve_sysv, @@ -13023,8 +13021,7 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void { // LLVM does does not have a backend for these. .kalimba, - .propeller1, - .propeller2, + .propeller, => unreachable, } } diff --git a/src/target.zig b/src/target.zig index 9487d0937e..d978757bc9 100644 --- a/src/target.zig +++ b/src/target.zig @@ -195,8 +195,7 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool { // No LLVM backend exists. .kalimba, - .propeller1, - .propeller2, + .propeller, => false, }; } |
