std.Target: add tags and info for alpha, hppa, microblaze, sh

5 files changed, 54 insertions, 3 deletions

diff --git a/src/Sema.zig b/src/Sema.zig
index 3361d1a59c..be4b777eeb 100644
--- a/src/Sema.zig
+++ b/src/Sema.zig
@@ -9043,8 +9043,10 @@ const calling_conventions_supporting_var_args = [_]std.builtin.CallingConvention
     .aarch64_aapcs_win,
     .aarch64_vfabi,
     .aarch64_vfabi_sve,
+    .alpha_osf,
     .arm_aapcs,
     .arm_aapcs_vfp,
+    .microblaze_std,
     .mips64_n64,
     .mips64_n32,
     .mips_o32,
@@ -9068,6 +9070,8 @@ const calling_conventions_supporting_var_args = [_]std.builtin.CallingConvention
     .csky_sysv,
     .hexagon_sysv,
     .hexagon_sysv_hvx,
+    .hppa_elf,
+    .hppa64_elf,
     .lanai_sysv,
     .loongarch64_lp64,
     .loongarch32_ilp32,
@@ -9078,6 +9082,8 @@ const calling_conventions_supporting_var_args = [_]std.builtin.CallingConvention
     .or1k_sysv,
     .s390x_sysv,
     .s390x_sysv_vx,
+    .sh_gnu,
+    .sh_renesas,
     .ve_sysv,
     .xcore_xs1,
     .xcore_xs2,
diff --git a/src/codegen/c.zig b/src/codegen/c.zig
index bf9be70529..cf0519e1f1 100644
--- a/src/codegen/c.zig
+++ b/src/codegen/c.zig
@@ -8106,6 +8106,8 @@ fn toCallingConvention(cc: std.builtin.CallingConvention, zcu: *Zcu) ?[]const u8
             inline else => |m| "interrupt(\"" ++ @tagName(m) ++ "\")",
         },
 
+        .sh_renesas => "renesas",
+
         .m68k_rtd => "m68k_rtd",
 
         .avr_interrupt,
diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig
index b922ae0704..8c6f5f973f 100644
--- a/src/codegen/llvm.zig
+++ b/src/codegen/llvm.zig
@@ -106,10 +106,17 @@ pub fn targetTriple(allocator: Allocator, target: *const std.Target) ![]const u8
         .wasm64 => "wasm64",
         .ve => "ve",
 
+        .alpha,
         .arceb,
+        .hppa,
+        .hppa64,
         .kalimba,
+        .microblaze,
+        .microblazeel,
         .or1k,
         .propeller,
+        .sh,
+        .sheb,
         .xtensaeb,
         => unreachable, // Gated by hasLlvmSupport().
     };
@@ -475,10 +482,17 @@ pub fn dataLayout(target: *const std.Target) []const u8 {
         .loongarch64 => "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128",
         .xtensa => "e-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32",
 
+        .alpha,
         .arceb,
+        .hppa,
+        .hppa64,
         .kalimba,
+        .microblaze,
+        .microblazeel,
         .or1k,
         .propeller,
+        .sh,
+        .sheb,
         .xtensaeb,
         => unreachable, // Gated by hasLlvmSupport().
     };
@@ -11908,6 +11922,8 @@ fn toLlvmCallConvTag(cc_tag: std.builtin.CallingConvention.Tag, target: *const s
         .aarch64_aapcs,
         .aarch64_aapcs_darwin,
         .aarch64_aapcs_win,
+        .alpha_osf,
+        .microblaze_std,
         .mips64_n64,
         .mips64_n32,
         .mips_o32,
@@ -11930,6 +11946,8 @@ fn toLlvmCallConvTag(cc_tag: std.builtin.CallingConvention.Tag, target: *const s
         .csky_sysv,
         .hexagon_sysv,
         .hexagon_sysv_hvx,
+        .hppa_elf,
+        .hppa64_elf,
         .lanai_sysv,
         .loongarch64_lp64,
         .loongarch32_ilp32,
@@ -11940,6 +11958,8 @@ fn toLlvmCallConvTag(cc_tag: std.builtin.CallingConvention.Tag, target: *const s
         .propeller_sysv,
         .s390x_sysv,
         .s390x_sysv_vx,
+        .sh_gnu,
+        .sh_renesas,
         .ve_sysv,
         .xcore_xs1,
         .xcore_xs2,
@@ -13111,10 +13131,17 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {
         },
 
         // LLVM does does not have a backend for these.
+        .alpha,
         .arceb,
+        .hppa,
+        .hppa64,
         .kalimba,
+        .microblaze,
+        .microblazeel,
         .or1k,
         .propeller,
+        .sh,
+        .sheb,
         .xtensaeb,
         => unreachable,
     }
diff --git a/src/link/Dwarf.zig b/src/link/Dwarf.zig
index a9cfefa2c4..2ecac73c1c 100644
--- a/src/link/Dwarf.zig
+++ b/src/link/Dwarf.zig
@@ -3905,6 +3905,8 @@ fn updateLazyType(
 
                     .m68k_rtd => .LLVM_M68kRTD,
 
+                    .sh_renesas => .GNU_renesas_sh,
+
                     .amdgcn_kernel => .LLVM_OpenCLKernel,
                     .nvptx_kernel,
                     .spirv_kernel,
diff --git a/src/target.zig b/src/target.zig
index a5de66a68d..bd0708b3d8 100644
--- a/src/target.zig
+++ b/src/target.zig
@@ -216,10 +216,17 @@ pub fn hasLlvmSupport(target: *const std.Target, ofmt: std.Target.ObjectFormat)
         => false,
 
         // No LLVM backend exists.
+        .alpha,
         .arceb,
+        .hppa,
+        .hppa64,
         .kalimba,
+        .microblaze,
+        .microblazeel,
         .or1k,
         .propeller,
+        .sh,
+        .sheb,
         .xtensaeb,
         => false,
     };
@@ -709,19 +716,26 @@ pub fn minFunctionAlignment(target: *const std.Target) Alignment {
         .csky,
         .m68k,
         .msp430,
+        .sh,
+        .sheb,
         .s390x,
         .xcore,
         => .@"2",
+        .aarch64,
+        .aarch64_be,
+        .alpha,
         .arc,
         .arceb,
         .arm,
         .armeb,
-        .aarch64,
-        .aarch64_be,
         .hexagon,
+        .hppa,
+        .hppa64,
         .lanai,
         .loongarch32,
         .loongarch64,
+        .microblaze,
+        .microblazeel,
         .mips,
         .mipsel,
         .powerpc,
@@ -733,8 +747,8 @@ pub fn minFunctionAlignment(target: *const std.Target) Alignment {
         .xtensa,
         .xtensaeb,
         => .@"4",
-        .bpfel,
         .bpfeb,
+        .bpfel,
         .mips64,
         .mips64el,
         => .@"8",