diff options
| author | Vexu <git@vexu.eu> | 2019-12-17 00:24:23 +0200 |
|---|---|---|
| committer | Vexu <git@vexu.eu> | 2019-12-23 11:55:00 +0200 |
| commit | ab7fc33c8342583a8323c19a2596b7e4cd0c5e90 (patch) | |
| tree | d76ac2acf85ea9aea83c5eff701bccc8295ea888 /src/zig_llvm.cpp | |
| parent | 8bb1e0444951b7b83254277c52534c7ab58fd135 (diff) | |
| download | zig-ab7fc33c8342583a8323c19a2596b7e4cd0c5e90.tar.gz zig-ab7fc33c8342583a8323c19a2596b7e4cd0c5e90.zip | |
add zig llvm wrapper for atomicrmw
Diffstat (limited to 'src/zig_llvm.cpp')
| -rw-r--r-- | src/zig_llvm.cpp | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/src/zig_llvm.cpp b/src/zig_llvm.cpp index 852475c3c4..7ecb717047 100644 --- a/src/zig_llvm.cpp +++ b/src/zig_llvm.cpp @@ -1096,6 +1096,56 @@ bool ZigLLDLink(ZigLLVM_ObjectFormatType oformat, const char **args, size_t arg_ abort(); } +static AtomicRMWInst::BinOp toLLVMRMWBinOp(enum ZigLLVM_AtomicRMWBinOp BinOp) { + switch (BinOp) { + default: + case ZigLLVMAtomicRMWBinOpXchg: return AtomicRMWInst::Xchg; + case ZigLLVMAtomicRMWBinOpAdd: return AtomicRMWInst::Add; + case ZigLLVMAtomicRMWBinOpSub: return AtomicRMWInst::Sub; + case ZigLLVMAtomicRMWBinOpAnd: return AtomicRMWInst::And; + case ZigLLVMAtomicRMWBinOpNand: return AtomicRMWInst::Nand; + case ZigLLVMAtomicRMWBinOpOr: return AtomicRMWInst::Or; + case ZigLLVMAtomicRMWBinOpXor: return AtomicRMWInst::Xor; + case ZigLLVMAtomicRMWBinOpMax: return AtomicRMWInst::Max; + case ZigLLVMAtomicRMWBinOpMin: return AtomicRMWInst::Min; + case ZigLLVMAtomicRMWBinOpUMax: return AtomicRMWInst::UMax; + case ZigLLVMAtomicRMWBinOpUMin: return AtomicRMWInst::UMin; + case ZigLLVMAtomicRMWBinOpFAdd: return AtomicRMWInst::FAdd; + case ZigLLVMAtomicRMWBinOpFSub: return AtomicRMWInst::FSub; + } +} + +static AtomicOrdering toLLVMOrdering(LLVMAtomicOrdering Ordering) { + switch (Ordering) { + default: + case LLVMAtomicOrderingNotAtomic: return AtomicOrdering::NotAtomic; + case LLVMAtomicOrderingUnordered: return AtomicOrdering::Unordered; + case LLVMAtomicOrderingMonotonic: return AtomicOrdering::Monotonic; + case LLVMAtomicOrderingAcquire: return AtomicOrdering::Acquire; + case LLVMAtomicOrderingRelease: return AtomicOrdering::Release; + case LLVMAtomicOrderingAcquireRelease: return AtomicOrdering::AcquireRelease; + case LLVMAtomicOrderingSequentiallyConsistent: return AtomicOrdering::SequentiallyConsistent; + } +} + +inline LLVMAttributeRef wrap(Attribute Attr) { + return reinterpret_cast<LLVMAttributeRef>(Attr.getRawPointer()); +} + +inline Attribute unwrap(LLVMAttributeRef Attr) { + return Attribute::fromRawPointer(Attr); +} + +LLVMValueRef ZigLLVMBuildAtomicRMW(LLVMBuilderRef B, enum ZigLLVM_AtomicRMWBinOp op, + LLVMValueRef PTR, LLVMValueRef Val, + LLVMAtomicOrdering ordering, LLVMBool singleThread) +{ + AtomicRMWInst::BinOp intop = toLLVMRMWBinOp(op); + return wrap(unwrap(B)->CreateAtomicRMW(intop, unwrap(PTR), + unwrap(Val), toLLVMOrdering(ordering), + singleThread ? SyncScope::SingleThread : SyncScope::System)); +} + static_assert((Triple::ArchType)ZigLLVM_UnknownArch == Triple::UnknownArch, ""); static_assert((Triple::ArchType)ZigLLVM_arm == Triple::arm, ""); static_assert((Triple::ArchType)ZigLLVM_armeb == Triple::armeb, ""); |
