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| author | Alex Rønne Petersen <alex@alexrp.com> | 2025-06-30 07:01:35 +0200 |
|---|---|---|
| committer | Alex Rønne Petersen <alex@alexrp.com> | 2025-07-01 18:16:40 +0200 |
| commit | 07114e6bc69106fb77beb879a8a2f78a4ba4b256 (patch) | |
| tree | a3d4833ac74c53c13520e5508140f68ed7ee8b4f /src/zig_llvm.cpp | |
| parent | aa7b32d78189a66bb1fb62fd9735be5d15651d5b (diff) | |
| download | zig-07114e6bc69106fb77beb879a8a2f78a4ba4b256.tar.gz zig-07114e6bc69106fb77beb879a8a2f78a4ba4b256.zip | |
llvm: Disable the machine outliner pass on RISC-V
Diffstat (limited to 'src/zig_llvm.cpp')
| -rw-r--r-- | src/zig_llvm.cpp | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/src/zig_llvm.cpp b/src/zig_llvm.cpp index cb624ea256..fe4e421dc3 100644 --- a/src/zig_llvm.cpp +++ b/src/zig_llvm.cpp @@ -260,6 +260,16 @@ ZIG_EXTERN_C bool ZigLLVMTargetMachineEmitToFile(LLVMTargetMachineRef targ_machi TargetMachine &target_machine = *reinterpret_cast<TargetMachine*>(targ_machine_ref); + if (options->allow_fast_isel) { + target_machine.setO0WantsFastISel(true); + } else { + target_machine.setFastISel(false); + } + + if (!options->allow_machine_outliner) { + target_machine.setMachineOutliner(false); + } + Module &llvm_module = *unwrap(module_ref); // Pipeline configurations @@ -385,12 +395,6 @@ ZIG_EXTERN_C bool ZigLLVMTargetMachineEmitToFile(LLVMTargetMachineRef targ_machi } } - if (options->allow_fast_isel) { - target_machine.setO0WantsFastISel(true); - } else { - target_machine.setFastISel(false); - } - // Optimization phase module_pm.run(llvm_module, module_am); |