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| author | Andrew Kelley <andrew@ziglang.org> | 2019-08-16 16:52:45 -0400 |
|---|---|---|
| committer | Andrew Kelley <andrew@ziglang.org> | 2019-08-16 16:52:45 -0400 |
| commit | c39bb3ebc49096af45f3a69d4742e5f4d50cab62 (patch) | |
| tree | 1e7cc87e0d474cf25310dae784f502e1c8e2b72f /src/target.cpp | |
| parent | 6529658ad861bc47e9641081bb953ba54f21a1ae (diff) | |
| download | zig-c39bb3ebc49096af45f3a69d4742e5f4d50cab62.tar.gz zig-c39bb3ebc49096af45f3a69d4742e5f4d50cab62.zip | |
target: add missing switch case
Diffstat (limited to 'src/target.cpp')
| -rw-r--r-- | src/target.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/target.cpp b/src/target.cpp index 346772ce13..8b533f4af6 100644 --- a/src/target.cpp +++ b/src/target.cpp @@ -686,6 +686,8 @@ const char *target_subarch_name(ZigLLVM_SubArchType subarch) { return "v8m_baseline"; case ZigLLVM_ARMSubArch_v8m_mainline: return "v8m_mainline"; + case ZigLLVM_ARMSubArch_v8_1m_mainline: + return "v8_1m_mainline"; case ZigLLVM_ARMSubArch_v7: return "v7"; case ZigLLVM_ARMSubArch_v7em: |