aboutsummaryrefslogtreecommitdiff
path: root/src/target.cpp
diff options
context:
space:
mode:
authorAndrew Kelley <andrew@ziglang.org>2019-11-25 18:46:17 -0500
committerAndrew Kelley <andrew@ziglang.org>2019-11-25 18:46:17 -0500
commit4261fa3c49be715355c9623102bad0bf93d537a3 (patch)
treeba8da3ef0611a547fe67c61ed2d42d4ea67e6d2e /src/target.cpp
parent659c1bdeeebce7bf32e122be6a728fe727112c56 (diff)
downloadzig-4261fa3c49be715355c9623102bad0bf93d537a3.tar.gz
zig-4261fa3c49be715355c9623102bad0bf93d537a3.zip
move logic to the appropriate layers; add new compile error
Diffstat (limited to 'src/target.cpp')
-rw-r--r--src/target.cpp6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/target.cpp b/src/target.cpp
index 8fd7d7055f..538f836f24 100644
--- a/src/target.cpp
+++ b/src/target.cpp
@@ -1458,6 +1458,10 @@ const char *arch_stack_pointer_register_name(ZigLLVM_ArchType arch) {
case ZigLLVM_mipsel:
return "sp";
+ case ZigLLVM_wasm32:
+ case ZigLLVM_wasm64:
+ return nullptr; // known to be not available
+
case ZigLLVM_amdgcn:
case ZigLLVM_amdil:
case ZigLLVM_amdil64:
@@ -1491,8 +1495,6 @@ const char *arch_stack_pointer_register_name(ZigLLVM_ArchType arch) {
case ZigLLVM_systemz:
case ZigLLVM_tce:
case ZigLLVM_tcele:
- case ZigLLVM_wasm32:
- case ZigLLVM_wasm64:
case ZigLLVM_xcore:
case ZigLLVM_ppc:
case ZigLLVM_ppc64: