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authorLemonBoy <thatlemon@gmail.com>2020-01-29 19:08:15 +0100
committerAndrew Kelley <andrew@ziglang.org>2020-01-29 16:05:14 -0500
commit59bc1d272120bd860cc3cd1f894a2a4e08fc1f3f (patch)
tree0b7eb6fd36762579a141d152b10e0d60b540b217 /src/ir.cpp
parent4fad16284ec30962689723c7eaca05a77df14673 (diff)
downloadzig-59bc1d272120bd860cc3cd1f894a2a4e08fc1f3f.tar.gz
zig-59bc1d272120bd860cc3cd1f894a2a4e08fc1f3f.zip
Fix edge case in switch with single else
ir_gen_switch_expr doesn't set the switch_br field at all if there are zero cases, detect this situation and handle it gracefully. Closes #4322
Diffstat (limited to 'src/ir.cpp')
-rw-r--r--src/ir.cpp4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/ir.cpp b/src/ir.cpp
index fb7613cf90..149c8fbdc9 100644
--- a/src/ir.cpp
+++ b/src/ir.cpp
@@ -22768,7 +22768,9 @@ static IrInstGen *ir_analyze_instruction_switch_else_var(IrAnalyze *ira,
}
// Make note of the errors handled by other cases
ErrorTableEntry **errors = allocate<ErrorTableEntry *>(ira->codegen->errors_by_index.length);
- for (size_t case_i = 0; case_i < instruction->switch_br->case_count; case_i += 1) {
+ // We may not have any case in the switch if this is a lone else
+ const size_t switch_cases = instruction->switch_br ? instruction->switch_br->case_count : 0;
+ for (size_t case_i = 0; case_i < switch_cases; case_i += 1) {
IrInstSrcSwitchBrCase *br_case = &instruction->switch_br->cases[case_i];
IrInstGen *case_expr = br_case->value->child;
if (case_expr->value->type->id == ZigTypeIdErrorSet) {